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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb

 kernel/arch/x86/pci/fixup.c
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@@ -7,6 +7,7 @@
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 #include <linux/dmi.h>
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 #include <linux/pci.h>
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 #include <linux/vgaarb.h>
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+#include <asm/amd_nb.h>
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 #include <asm/hpet.h>
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 #include <asm/pci_x86.h>
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@@ -557,12 +558,12 @@
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  * Device [8086:2fc0]
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  * Erratum HSE43
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  * CONFIG_TDP_NOMINAL CSR Implemented at Incorrect Offset
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- * http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-spec-update.html
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+ * https://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-spec-update.html
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  *
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  * Devices [8086:6f60,6fa0,6fc0]
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  * Erratum BDF2
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  * PCI BARs in the Home Agent Will Return Non-Zero Values During Enumeration
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- * http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v4-spec-update.html
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+ * https://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v4-spec-update.html
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  */
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 static void pci_invalid_bar(struct pci_dev *dev)
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 {
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@@ -587,7 +588,7 @@
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 static void pci_fixup_amd_ehci_pme(struct pci_dev *dev)
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 {
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 	dev_info(&dev->dev, "PME# does not work under D3, disabling it\n");
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-	dev->pme_support &= ~((PCI_PM_CAP_PME_D3 | PCI_PM_CAP_PME_D3cold)
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+	dev->pme_support &= ~((PCI_PM_CAP_PME_D3hot | PCI_PM_CAP_PME_D3cold)
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 		>> PCI_PM_CAP_PME_SHIFT);
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 }
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 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x7808, pci_fixup_amd_ehci_pme);
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@@ -824,3 +825,23 @@
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 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7910, rs690_fix_64bit_dma);
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 #endif
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+
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+#ifdef CONFIG_AMD_NB
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+
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+#define AMD_15B8_RCC_DEV2_EPF0_STRAP2                                  0x10136008
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+#define AMD_15B8_RCC_DEV2_EPF0_STRAP2_NO_SOFT_RESET_DEV2_F0_MASK       0x00000080L
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+
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+static void quirk_clear_strap_no_soft_reset_dev2_f0(struct pci_dev *dev)
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+{
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+	u32 data;
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+
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+	if (!amd_smn_read(0, AMD_15B8_RCC_DEV2_EPF0_STRAP2, &data)) {
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+		data &= ~AMD_15B8_RCC_DEV2_EPF0_STRAP2_NO_SOFT_RESET_DEV2_F0_MASK;
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+		if (amd_smn_write(0, AMD_15B8_RCC_DEV2_EPF0_STRAP2, data))
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+			pci_err(dev, "Failed to write data 0x%x\n", data);
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+	} else {
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+		pci_err(dev, "Failed to read data\n");
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+	}
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+}
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+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15b8, quirk_clear_strap_no_soft_reset_dev2_f0);
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+#endif