.. | .. |
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6 | 6 | |
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7 | 7 | #undef DEBUG |
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8 | 8 | |
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9 | | -#include <linux/dma-noncoherent.h> |
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| 9 | +#include <linux/dma-map-ops.h> |
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10 | 10 | #include <linux/device.h> |
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11 | 11 | #include <linux/kernel.h> |
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12 | 12 | #include <linux/platform_device.h> |
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.. | .. |
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15 | 15 | #include <linux/vmalloc.h> |
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16 | 16 | #include <linux/export.h> |
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17 | 17 | |
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18 | | -#include <asm/pgalloc.h> |
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| 18 | +#include <asm/cacheflush.h> |
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19 | 19 | |
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20 | 20 | #if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE) |
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21 | | - |
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22 | | -void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, |
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23 | | - gfp_t flag, unsigned long attrs) |
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| 21 | +void arch_dma_prep_coherent(struct page *page, size_t size) |
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24 | 22 | { |
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25 | | - struct page *page, **map; |
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26 | | - pgprot_t pgprot; |
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27 | | - void *addr; |
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28 | | - int i, order; |
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| 23 | + cache_push(page_to_phys(page), size); |
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| 24 | +} |
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29 | 25 | |
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30 | | - pr_debug("dma_alloc_coherent: %d,%x\n", size, flag); |
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31 | | - |
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32 | | - size = PAGE_ALIGN(size); |
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33 | | - order = get_order(size); |
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34 | | - |
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35 | | - page = alloc_pages(flag, order); |
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36 | | - if (!page) |
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37 | | - return NULL; |
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38 | | - |
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39 | | - *handle = page_to_phys(page); |
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40 | | - map = kmalloc(sizeof(struct page *) << order, flag & ~__GFP_DMA); |
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41 | | - if (!map) { |
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42 | | - __free_pages(page, order); |
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43 | | - return NULL; |
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| 26 | +pgprot_t pgprot_dmacoherent(pgprot_t prot) |
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| 27 | +{ |
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| 28 | + if (CPU_IS_040_OR_060) { |
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| 29 | + pgprot_val(prot) &= ~_PAGE_CACHE040; |
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| 30 | + pgprot_val(prot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S; |
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| 31 | + } else { |
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| 32 | + pgprot_val(prot) |= _PAGE_NOCACHE030; |
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44 | 33 | } |
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45 | | - split_page(page, order); |
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46 | | - |
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47 | | - order = 1 << order; |
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48 | | - size >>= PAGE_SHIFT; |
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49 | | - map[0] = page; |
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50 | | - for (i = 1; i < size; i++) |
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51 | | - map[i] = page + i; |
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52 | | - for (; i < order; i++) |
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53 | | - __free_page(page + i); |
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54 | | - pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY); |
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55 | | - if (CPU_IS_040_OR_060) |
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56 | | - pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S; |
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57 | | - else |
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58 | | - pgprot_val(pgprot) |= _PAGE_NOCACHE030; |
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59 | | - addr = vmap(map, size, VM_MAP, pgprot); |
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60 | | - kfree(map); |
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61 | | - |
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62 | | - return addr; |
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| 34 | + return prot; |
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63 | 35 | } |
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64 | | - |
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65 | | -void arch_dma_free(struct device *dev, size_t size, void *addr, |
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66 | | - dma_addr_t handle, unsigned long attrs) |
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67 | | -{ |
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68 | | - pr_debug("dma_free_coherent: %p, %x\n", addr, handle); |
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69 | | - vfree(addr); |
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70 | | -} |
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71 | | - |
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72 | 36 | #else |
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73 | 37 | |
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74 | 38 | #include <asm/cacheflush.h> |
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.. | .. |
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97 | 61 | |
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98 | 62 | #endif /* CONFIG_MMU && !CONFIG_COLDFIRE */ |
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99 | 63 | |
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100 | | -void arch_sync_dma_for_device(struct device *dev, phys_addr_t handle, |
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101 | | - size_t size, enum dma_data_direction dir) |
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| 64 | +void arch_sync_dma_for_device(phys_addr_t handle, size_t size, |
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| 65 | + enum dma_data_direction dir) |
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102 | 66 | { |
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103 | 67 | switch (dir) { |
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104 | 68 | case DMA_BIDIRECTIONAL: |
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.. | .. |
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112 | 76 | pr_err_ratelimited("dma_sync_single_for_device: unsupported dir %u\n", |
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113 | 77 | dir); |
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114 | 78 | break; |
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115 | | - } |
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116 | | -} |
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117 | | - |
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118 | | -void arch_setup_pdev_archdata(struct platform_device *pdev) |
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119 | | -{ |
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120 | | - if (pdev->dev.coherent_dma_mask == DMA_MASK_NONE && |
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121 | | - pdev->dev.dma_mask == NULL) { |
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122 | | - pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); |
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123 | | - pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; |
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124 | 79 | } |
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125 | 80 | } |
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