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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb

 kernel/arch/ia64/include/uapi/asm/gcc_intrin.h
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@@ -31,7 +31,7 @@
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 extern void ia64_bad_param_for_getreg (void);
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-#define ia64_native_setreg(regnum, val)						\
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+#define ia64_setreg(regnum, val)						\
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 ({										\
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 	switch (regnum) {							\
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 	    case _IA64_REG_PSR_L:						\
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@@ -60,7 +60,7 @@
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 	}									\
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 })
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-#define ia64_native_getreg(regnum)						\
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+#define ia64_getreg(regnum)							\
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 ({										\
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 	__u64 ia64_intri_res;							\
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 										\
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@@ -384,7 +384,7 @@
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 #define ia64_invala() asm volatile ("invala" ::: "memory")
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-#define ia64_native_thash(addr)							\
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+#define ia64_thash(addr)							\
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 ({										\
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 	unsigned long ia64_intri_res;						\
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 	asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr));	\
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@@ -437,10 +437,10 @@
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 #define ia64_set_pmd(index, val)						\
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 	asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
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-#define ia64_native_set_rr(index, val)							\
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+#define ia64_set_rr(index, val)							\
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 	asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
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-#define ia64_native_get_cpuid(index)							\
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+#define ia64_get_cpuid(index)								\
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 ({											\
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 	unsigned long ia64_intri_res;							\
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 	asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index));	\
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@@ -476,33 +476,33 @@
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 })
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-#define ia64_native_get_pmd(index)						\
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+#define ia64_get_pmd(index)							\
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 ({										\
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 	unsigned long ia64_intri_res;						\
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 	asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
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 	ia64_intri_res;								\
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 })
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-#define ia64_native_get_rr(index)						\
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+#define ia64_get_rr(index)							\
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 ({										\
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 	unsigned long ia64_intri_res;						\
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 	asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index));	\
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 	ia64_intri_res;								\
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 })
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-#define ia64_native_fc(addr)	asm volatile ("fc %0" :: "r"(addr) : "memory")
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+#define ia64_fc(addr)	asm volatile ("fc %0" :: "r"(addr) : "memory")
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 #define ia64_sync_i()	asm volatile (";; sync.i" ::: "memory")
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-#define ia64_native_ssm(mask)	asm volatile ("ssm %0":: "i"((mask)) : "memory")
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-#define ia64_native_rsm(mask)	asm volatile ("rsm %0":: "i"((mask)) : "memory")
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+#define ia64_ssm(mask)	asm volatile ("ssm %0":: "i"((mask)) : "memory")
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+#define ia64_rsm(mask)	asm volatile ("rsm %0":: "i"((mask)) : "memory")
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 #define ia64_sum(mask)	asm volatile ("sum %0":: "i"((mask)) : "memory")
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 #define ia64_rum(mask)	asm volatile ("rum %0":: "i"((mask)) : "memory")
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 #define ia64_ptce(addr)	asm volatile ("ptc.e %0" :: "r"(addr))
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-#define ia64_native_ptcga(addr, size)						\
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+#define ia64_ptcga(addr, size)							\
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 do {										\
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 	asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory");	\
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 	ia64_dv_serialize_data();						\
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@@ -607,7 +607,7 @@
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         }								\
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 })
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-#define ia64_native_intrin_local_irq_restore(x)			\
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+#define ia64_intrin_local_irq_restore(x)			\
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 do {								\
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 	asm volatile (";;   cmp.ne p6,p7=%0,r0;;"		\
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 		      "(p6) ssm psr.i;"				\