forked from ~ljy/RK356X_SDK_RELEASE

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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb 
 kernel/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
....@@ -4,6 +4,7 @@
44  */
55 
66 #include "meson-gx.dtsi"
7
+#include "meson-gx-mali450.dtsi"
78 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
89 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
910 #include <dt-bindings/clock/gxbb-clkc.h>
....@@ -60,6 +61,29 @@
6061 	};
6162 };
6263 
64
+&aiu {
65
+	compatible = "amlogic,aiu-gxbb", "amlogic,aiu";
66
+	clocks = <&clkc CLKID_AIU_GLUE>,
67
+		 <&clkc CLKID_I2S_OUT>,
68
+		 <&clkc CLKID_AOCLK_GATE>,
69
+		 <&clkc CLKID_CTS_AMCLK>,
70
+		 <&clkc CLKID_MIXER_IFACE>,
71
+		 <&clkc CLKID_IEC958>,
72
+		 <&clkc CLKID_IEC958_GATE>,
73
+		 <&clkc CLKID_CTS_MCLK_I958>,
74
+		 <&clkc CLKID_CTS_I958>;
75
+	clock-names = "pclk",
76
+		      "i2s_pclk",
77
+		      "i2s_aoclk",
78
+		      "i2s_mclk",
79
+		      "i2s_mixer",
80
+		      "spdif_pclk",
81
+		      "spdif_aoclk",
82
+		      "spdif_mclk",
83
+		      "spdif_mclk_sel";
84
+	resets = <&reset RESET_AIU>;
85
+};
86
+
6387 &aobus {
6488 	pinctrl_aobus: pinctrl@14 {
6589 		compatible = "amlogic,meson-gxbb-aobus-pinctrl";
....@@ -81,6 +105,7 @@
81105 			mux {
82106 				groups = "uart_tx_ao_a", "uart_rx_ao_a";
83107 				function = "uart_ao";
108
+				bias-disable;
84109 			};
85110 		};
86111 
....@@ -89,6 +114,7 @@
89114 				groups = "uart_cts_ao_a",
90115 				       "uart_rts_ao_a";
91116 				function = "uart_ao";
117
+				bias-disable;
92118 			};
93119 		};
94120 
....@@ -96,6 +122,7 @@
96122 			mux {
97123 				groups = "uart_tx_ao_b", "uart_rx_ao_b";
98124 				function = "uart_ao_b";
125
+				bias-disable;
99126 			};
100127 		};
101128 
....@@ -104,6 +131,7 @@
104131 				groups = "uart_cts_ao_b",
105132 				       "uart_rts_ao_b";
106133 				function = "uart_ao_b";
134
+				bias-disable;
107135 			};
108136 		};
109137 
....@@ -111,6 +139,7 @@
111139 			mux {
112140 				groups = "remote_input_ao";
113141 				function = "remote_input_ao";
142
+				bias-disable;
114143 			};
115144 		};
116145 
....@@ -119,6 +148,7 @@
119148 				groups = "i2c_sck_ao",
120149 				       "i2c_sda_ao";
121150 				function = "i2c_ao";
151
+				bias-disable;
122152 			};
123153 		};
124154 
....@@ -126,6 +156,7 @@
126156 			mux {
127157 				groups = "pwm_ao_a_3";
128158 				function = "pwm_ao_a_3";
159
+				bias-disable;
129160 			};
130161 		};
131162 
....@@ -133,6 +164,7 @@
133164 			mux {
134165 				groups = "pwm_ao_a_6";
135166 				function = "pwm_ao_a_6";
167
+				bias-disable;
136168 			};
137169 		};
138170 
....@@ -140,6 +172,7 @@
140172 			mux {
141173 				groups = "pwm_ao_a_12";
142174 				function = "pwm_ao_a_12";
175
+				bias-disable;
143176 			};
144177 		};
145178 
....@@ -147,6 +180,7 @@
147180 			mux {
148181 				groups = "pwm_ao_b";
149182 				function = "pwm_ao_b";
183
+				bias-disable;
150184 			};
151185 		};
152186 
....@@ -154,6 +188,7 @@
154188 			mux {
155189 				groups = "i2s_am_clk";
156190 				function = "i2s_out_ao";
191
+				bias-disable;
157192 			};
158193 		};
159194 
....@@ -161,6 +196,7 @@
161196 			mux {
162197 				groups = "i2s_out_ao_clk";
163198 				function = "i2s_out_ao";
199
+				bias-disable;
164200 			};
165201 		};
166202 
....@@ -168,6 +204,7 @@
168204 			mux {
169205 				groups = "i2s_out_lr_clk";
170206 				function = "i2s_out_ao";
207
+				bias-disable;
171208 			};
172209 		};
173210 
....@@ -175,6 +212,7 @@
175212 			mux {
176213 				groups = "i2s_out_ch01_ao";
177214 				function = "i2s_out_ao";
215
+				bias-disable;
178216 			};
179217 		};
180218 
....@@ -182,6 +220,7 @@
182220 			mux {
183221 				groups = "i2s_out_ch23_ao";
184222 				function = "i2s_out_ao";
223
+				bias-disable;
185224 			};
186225 		};
187226 
....@@ -189,6 +228,7 @@
189228 			mux {
190229 				groups = "i2s_out_ch45_ao";
191230 				function = "i2s_out_ao";
231
+				bias-disable;
192232 			};
193233 		};
194234 
....@@ -203,6 +243,7 @@
203243 			mux {
204244 				groups = "spdif_out_ao_13";
205245 				function = "spdif_out_ao";
246
+				bias-disable;
206247 			};
207248 		};
208249 
....@@ -210,6 +251,7 @@
210251 			mux {
211252 				groups = "ao_cec";
212253 				function = "cec_ao";
254
+				bias-disable;
213255 			};
214256 		};
215257 
....@@ -217,48 +259,9 @@
217259 			mux {
218260 				groups = "ee_cec";
219261 				function = "cec_ao";
262
+				bias-disable;
220263 			};
221264 		};
222
-	};
223
-};
224
-
225
-&apb {
226
-	mali: gpu@c0000 {
227
-		compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
228
-		reg = <0x0 0xc0000 0x0 0x40000>;
229
-		interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
230
-			     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
231
-			     <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
232
-			     <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
233
-			     <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
234
-			     <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
235
-			     <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
236
-			     <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
237
-			     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
238
-			     <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
239
-		interrupt-names = "gp", "gpmmu", "pp", "pmu",
240
-			"pp0", "ppmmu0", "pp1", "ppmmu1",
241
-			"pp2", "ppmmu2";
242
-		clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
243
-		clock-names = "bus", "core";
244
-
245
-		/*
246
-		 * Mali clocking is provided by two identical clock paths
247
-		 * MALI_0 and MALI_1 muxed to a single clock by a glitch
248
-		 * free mux to safely change frequency while running.
249
-		 */
250
-		assigned-clocks = <&clkc CLKID_GP0_PLL>,
251
-				  <&clkc CLKID_MALI_0_SEL>,
252
-				  <&clkc CLKID_MALI_0>,
253
-				  <&clkc CLKID_MALI>; /* Glitch free mux */
254
-		assigned-clock-parents = <0>, /* Do Nothing */
255
-					 <&clkc CLKID_GP0_PLL>,
256
-					 <0>, /* Do Nothing */
257
-					 <&clkc CLKID_MALI_0>;
258
-		assigned-clock-rates = <744000000>,
259
-				       <0>, /* Do Nothing */
260
-				       <744000000>,
261
-				       <0>; /* Do Nothing */
262265 	};
263266 };
264267 
....@@ -280,13 +283,20 @@
280283 
281284 &clkc_AO {
282285 	compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
286
+	clocks = <&xtal>, <&clkc CLKID_CLK81>;
287
+	clock-names = "xtal", "mpeg-clk";
288
+};
289
+
290
+&efuse {
291
+	clocks = <&clkc CLKID_EFUSE>;
283292 };
284293 
285294 &ethmac {
286295 	clocks = <&clkc CLKID_ETH>,
287296 		 <&clkc CLKID_FCLK_DIV2>,
288
-		 <&clkc CLKID_MPLL2>;
289
-	clock-names = "stmmaceth", "clkin0", "clkin1";
297
+		 <&clkc CLKID_MPLL2>,
298
+		 <&clkc CLKID_FCLK_DIV2>;
299
+	clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
290300 };
291301 
292302 &gpio_intc {
....@@ -311,6 +321,8 @@
311321 	clkc: clock-controller {
312322 		compatible = "amlogic,gxbb-clkc";
313323 		#clock-cells = <1>;
324
+		clocks = <&xtal>;
325
+		clock-names = "xtal";
314326 	};
315327 };
316328 
....@@ -335,6 +347,16 @@
335347 	clocks = <&clkc CLKID_I2C>;
336348 };
337349 
350
+&mali {
351
+	compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
352
+
353
+	clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
354
+	clock-names = "bus", "core";
355
+
356
+	assigned-clocks = <&clkc CLKID_GP0_PLL>;
357
+	assigned-clock-rates = <744000000>;
358
+};
359
+
338360 &periphs {
339361 	pinctrl_periphs: pinctrl@4b0 {
340362 		compatible = "amlogic,meson-gxbb-periphs-pinctrl";
....@@ -354,11 +376,17 @@
354376 		};
355377 
356378 		emmc_pins: emmc {
357
-			mux {
379
+			mux-0 {
358380 				groups = "emmc_nand_d07",
359
-				       "emmc_cmd",
360
-				       "emmc_clk";
381
+				       "emmc_cmd";
361382 				function = "emmc";
383
+				bias-pull-up;
384
+			};
385
+
386
+			mux-1 {
387
+				groups = "emmc_clk";
388
+				function = "emmc";
389
+				bias-disable;
362390 			};
363391 		};
364392 
....@@ -366,6 +394,7 @@
366394 			mux {
367395 				groups = "emmc_ds";
368396 				function = "emmc";
397
+				bias-pull-down;
369398 			};
370399 		};
371400 
....@@ -373,9 +402,6 @@
373402 			mux {
374403 				groups = "BOOT_8";
375404 				function = "gpio_periphs";
376
-			};
377
-			cfg-pull-down {
378
-				pins = "BOOT_8";
379405 				bias-pull-down;
380406 			};
381407 		};
....@@ -387,6 +413,7 @@
387413 				       "nor_c",
388414 				       "nor_cs";
389415 				function = "nor";
416
+				bias-disable;
390417 			};
391418 		};
392419 
....@@ -396,6 +423,7 @@
396423 					"spi_mosi",
397424 					"spi_sclk";
398425 				function = "spi";
426
+				bias-disable;
399427 			};
400428 		};
401429 
....@@ -403,18 +431,25 @@
403431 			mux {
404432 				groups = "spi_ss0";
405433 				function = "spi";
434
+				bias-disable;
406435 			};
407436 		};
408437 
409438 		sdcard_pins: sdcard {
410
-			mux {
439
+			mux-0 {
411440 				groups = "sdcard_d0",
412441 				       "sdcard_d1",
413442 				       "sdcard_d2",
414443 				       "sdcard_d3",
415
-				       "sdcard_cmd",
416
-				       "sdcard_clk";
444
+				       "sdcard_cmd";
417445 				function = "sdcard";
446
+				bias-pull-up;
447
+			};
448
+
449
+			mux-1 {
450
+				groups = "sdcard_clk";
451
+				function = "sdcard";
452
+				bias-disable;
418453 			};
419454 		};
420455 
....@@ -422,22 +457,25 @@
422457 			mux {
423458 				groups = "CARD_2";
424459 				function = "gpio_periphs";
425
-			};
426
-			cfg-pull-down {
427
-				pins = "CARD_2";
428460 				bias-pull-down;
429461 			};
430462 		};
431463 
432464 		sdio_pins: sdio {
433
-			mux {
465
+			mux-0 {
434466 				groups = "sdio_d0",
435467 				       "sdio_d1",
436468 				       "sdio_d2",
437469 				       "sdio_d3",
438
-				       "sdio_cmd",
439
-				       "sdio_clk";
470
+				       "sdio_cmd";
440471 				function = "sdio";
472
+				bias-pull-up;
473
+			};
474
+
475
+			mux-1 {
476
+				groups = "sdio_clk";
477
+				function = "sdio";
478
+				bias-disable;
441479 			};
442480 		};
443481 
....@@ -445,9 +483,6 @@
445483 			mux {
446484 				groups = "GPIOX_4";
447485 				function = "gpio_periphs";
448
-			};
449
-			cfg-pull-down {
450
-				pins = "GPIOX_4";
451486 				bias-pull-down;
452487 			};
453488 		};
....@@ -456,6 +491,7 @@
456491 			mux {
457492 				groups = "sdio_irq";
458493 				function = "sdio";
494
+				bias-disable;
459495 			};
460496 		};
461497 
....@@ -464,6 +500,7 @@
464500 				groups = "uart_tx_a",
465501 				       "uart_rx_a";
466502 				function = "uart_a";
503
+				bias-disable;
467504 			};
468505 		};
469506 
....@@ -472,6 +509,7 @@
472509 				groups = "uart_cts_a",
473510 				       "uart_rts_a";
474511 				function = "uart_a";
512
+				bias-disable;
475513 			};
476514 		};
477515 
....@@ -480,6 +518,7 @@
480518 				groups = "uart_tx_b",
481519 				       "uart_rx_b";
482520 				function = "uart_b";
521
+				bias-disable;
483522 			};
484523 		};
485524 
....@@ -488,6 +527,7 @@
488527 				groups = "uart_cts_b",
489528 				       "uart_rts_b";
490529 				function = "uart_b";
530
+				bias-disable;
491531 			};
492532 		};
493533 
....@@ -496,6 +536,7 @@
496536 				groups = "uart_tx_c",
497537 				       "uart_rx_c";
498538 				function = "uart_c";
539
+				bias-disable;
499540 			};
500541 		};
501542 
....@@ -504,6 +545,7 @@
504545 				groups = "uart_cts_c",
505546 				       "uart_rts_c";
506547 				function = "uart_c";
548
+				bias-disable;
507549 			};
508550 		};
509551 
....@@ -512,6 +554,7 @@
512554 				groups = "i2c_sck_a",
513555 				       "i2c_sda_a";
514556 				function = "i2c_a";
557
+				bias-disable;
515558 			};
516559 		};
517560 
....@@ -520,6 +563,7 @@
520563 				groups = "i2c_sck_b",
521564 				       "i2c_sda_b";
522565 				function = "i2c_b";
566
+				bias-disable;
523567 			};
524568 		};
525569 
....@@ -528,6 +572,7 @@
528572 				groups = "i2c_sck_c",
529573 				       "i2c_sda_c";
530574 				function = "i2c_c";
575
+				bias-disable;
531576 			};
532577 		};
533578 
....@@ -548,6 +593,7 @@
548593 				       "eth_txd2",
549594 				       "eth_txd3";
550595 				function = "eth";
596
+				bias-disable;
551597 			};
552598 		};
553599 
....@@ -563,6 +609,7 @@
563609 				       "eth_txd0",
564610 				       "eth_txd1";
565611 				function = "eth";
612
+				bias-disable;
566613 			};
567614 		};
568615 
....@@ -570,6 +617,7 @@
570617 			mux {
571618 				groups = "pwm_a_x";
572619 				function = "pwm_a_x";
620
+				bias-disable;
573621 			};
574622 		};
575623 
....@@ -577,6 +625,7 @@
577625 			mux {
578626 				groups = "pwm_a_y";
579627 				function = "pwm_a_y";
628
+				bias-disable;
580629 			};
581630 		};
582631 
....@@ -584,6 +633,7 @@
584633 			mux {
585634 				groups = "pwm_b";
586635 				function = "pwm_b";
636
+				bias-disable;
587637 			};
588638 		};
589639 
....@@ -591,6 +641,7 @@
591641 			mux {
592642 				groups = "pwm_d";
593643 				function = "pwm_d";
644
+				bias-disable;
594645 			};
595646 		};
596647 
....@@ -598,6 +649,7 @@
598649 			mux {
599650 				groups = "pwm_e";
600651 				function = "pwm_e";
652
+				bias-disable;
601653 			};
602654 		};
603655 
....@@ -605,6 +657,7 @@
605657 			mux {
606658 				groups = "pwm_f_x";
607659 				function = "pwm_f_x";
660
+				bias-disable;
608661 			};
609662 		};
610663 
....@@ -612,6 +665,7 @@
612665 			mux {
613666 				groups = "pwm_f_y";
614667 				function = "pwm_f_y";
668
+				bias-disable;
615669 			};
616670 		};
617671 
....@@ -619,6 +673,7 @@
619673 			mux {
620674 				groups = "hdmi_hpd";
621675 				function = "hdmi_hpd";
676
+				bias-disable;
622677 			};
623678 		};
624679 
....@@ -626,6 +681,7 @@
626681 			mux {
627682 				groups = "hdmi_sda", "hdmi_scl";
628683 				function = "hdmi_i2c";
684
+				bias-disable;
629685 			};
630686 		};
631687 
....@@ -633,6 +689,7 @@
633689 			mux {
634690 				groups = "i2sout_ch23_y";
635691 				function = "i2s_out";
692
+				bias-disable;
636693 			};
637694 		};
638695 
....@@ -640,6 +697,7 @@
640697 			mux {
641698 				groups = "i2sout_ch45_y";
642699 				function = "i2s_out";
700
+				bias-disable;
643701 			};
644702 		};
645703 
....@@ -647,6 +705,7 @@
647705 			mux {
648706 				groups = "i2sout_ch67_y";
649707 				function = "i2s_out";
708
+				bias-disable;
650709 			};
651710 		};
652711 
....@@ -654,12 +713,13 @@
654713 			mux {
655714 				groups = "spdif_out_y";
656715 				function = "spdif_out";
716
+				bias-disable;
657717 			};
658718 		};
659719 	};
660720 };
661721 
662
-&pwrc_vpu {
722
+&pwrc {
663723 	resets = <&reset RESET_VIU>,
664724 		 <&reset RESET_VENC>,
665725 		 <&reset RESET_VCBUS>,
....@@ -672,6 +732,9 @@
672732 		 <&reset RESET_VDI6>,
673733 		 <&reset RESET_VENCL>,
674734 		 <&reset RESET_VID_LOCK>;
735
+	reset-names = "viu", "venc", "vcbus", "bt656",
736
+		      "dvin", "rdma", "venci", "vencp",
737
+		      "vdac", "vdi6", "vencl", "vid_lock";
675738 	clocks = <&clkc CLKID_VPU>,
676739 	         <&clkc CLKID_VAPB>;
677740 	clock-names = "vpu", "vapb";
....@@ -734,6 +797,12 @@
734797 	resets = <&reset RESET_SD_EMMC_C>;
735798 };
736799 
800
+&simplefb_hdmi {
801
+	clocks = <&clkc CLKID_HDMI_PCLK>,
802
+		 <&clkc CLKID_CLK81>,
803
+		 <&clkc CLKID_GCLK_VENCI_INT0>;
804
+};
805
+
737806 &spicc {
738807 	clocks = <&clkc CLKID_SPICC>;
739808 	clock-names = "core";
....@@ -772,5 +841,16 @@
772841 
773842 &vpu {
774843 	compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
775
-	power-domains = <&pwrc_vpu>;
844
+	power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
845
+};
846
+
847
+&vdec {
848
+	compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec";
849
+	clocks = <&clkc CLKID_DOS_PARSER>,
850
+		 <&clkc CLKID_DOS>,
851
+		 <&clkc CLKID_VDEC_1>,
852
+		 <&clkc CLKID_VDEC_HEVC>;
853
+	clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
854
+	resets = <&reset RESET_PARSER>;
855
+	reset-names = "esparser";
776856 };