hc
2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb
kernel/arch/arm/boot/dts/s3c2416.dtsi
....@@ -18,52 +18,20 @@
1818 };
1919
2020 cpus {
21
- cpu {
22
- compatible = "arm,arm926ej-s";
23
- };
24
- };
21
+ #address-cells = <1>;
22
+ #size-cells = <0>;
2523
26
- interrupt-controller@4a000000 {
27
- compatible = "samsung,s3c2416-irq";
24
+ cpu@0 {
25
+ device_type = "cpu";
26
+ compatible = "arm,arm926ej-s";
27
+ reg = <0x0>;
28
+ };
2829 };
2930
3031 clocks: clock-controller@4c000000 {
3132 compatible = "samsung,s3c2416-clock";
3233 reg = <0x4c000000 0x40>;
3334 #clock-cells = <1>;
34
- };
35
-
36
- pinctrl@56000000 {
37
- compatible = "samsung,s3c2416-pinctrl";
38
- };
39
-
40
- timer@51000000 {
41
- clocks = <&clocks PCLK_PWM>;
42
- clock-names = "timers";
43
- };
44
-
45
- uart_0: serial@50000000 {
46
- compatible = "samsung,s3c2440-uart";
47
- clock-names = "uart", "clk_uart_baud2",
48
- "clk_uart_baud3";
49
- clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
50
- <&clocks SCLK_UART>;
51
- };
52
-
53
- uart_1: serial@50004000 {
54
- compatible = "samsung,s3c2440-uart";
55
- clock-names = "uart", "clk_uart_baud2",
56
- "clk_uart_baud3";
57
- clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
58
- <&clocks SCLK_UART>;
59
- };
60
-
61
- uart_2: serial@50008000 {
62
- compatible = "samsung,s3c2440-uart";
63
- clock-names = "uart", "clk_uart_baud2",
64
- "clk_uart_baud3";
65
- clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
66
- <&clocks SCLK_UART>;
6735 };
6836
6937 uart_3: serial@5000c000 {
....@@ -98,22 +66,59 @@
9866 <&clocks MUX_HSMMC1>;
9967 status = "disabled";
10068 };
69
+};
10170
102
- watchdog: watchdog@53000000 {
103
- interrupts = <1 9 27 3>;
104
- clocks = <&clocks PCLK_WDT>;
105
- clock-names = "watchdog";
106
- };
71
+&i2c {
72
+ compatible = "samsung,s3c2440-i2c";
73
+ clocks = <&clocks PCLK_I2C0>;
74
+ clock-names = "i2c";
75
+};
10776
108
- rtc: rtc@57000000 {
109
- compatible = "samsung,s3c2416-rtc";
110
- clocks = <&clocks PCLK_RTC>;
111
- clock-names = "rtc";
112
- };
77
+&intc {
78
+ compatible = "samsung,s3c2416-irq";
79
+};
11380
114
- i2c@54000000 {
115
- compatible = "samsung,s3c2440-i2c";
116
- clocks = <&clocks PCLK_I2C0>;
117
- clock-names = "i2c";
118
- };
81
+&pinctrl_0 {
82
+ compatible = "samsung,s3c2416-pinctrl";
83
+};
84
+
85
+&rtc {
86
+ compatible = "samsung,s3c2416-rtc";
87
+ clocks = <&clocks PCLK_RTC>;
88
+ clock-names = "rtc";
89
+};
90
+
91
+&timer {
92
+ clocks = <&clocks PCLK_PWM>;
93
+ clock-names = "timers";
94
+};
95
+
96
+&uart_0 {
97
+ compatible = "samsung,s3c2440-uart";
98
+ clock-names = "uart", "clk_uart_baud2",
99
+ "clk_uart_baud3";
100
+ clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
101
+ <&clocks SCLK_UART>;
102
+};
103
+
104
+&uart_1 {
105
+ compatible = "samsung,s3c2440-uart";
106
+ clock-names = "uart", "clk_uart_baud2",
107
+ "clk_uart_baud3";
108
+ clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
109
+ <&clocks SCLK_UART>;
110
+};
111
+
112
+&uart_2 {
113
+ compatible = "samsung,s3c2440-uart";
114
+ clock-names = "uart", "clk_uart_baud2",
115
+ "clk_uart_baud3";
116
+ clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
117
+ <&clocks SCLK_UART>;
118
+};
119
+
120
+&watchdog {
121
+ interrupts = <1 9 27 3>;
122
+ clocks = <&clocks PCLK_WDT>;
123
+ clock-names = "watchdog";
119124 };