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2024-05-10 37f49e37ab4cb5d0bc4c60eb5c6d4dd57db767bb 
 kernel/arch/arc/include/asm/pgtable.h
....@@ -1,9 +1,6 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
74  *
85  * vineetg: May 2011
96  *  -Folded PAGE_PRESENT (used by VM) and PAGE_VALID (used by MMU) into 1.
....@@ -35,8 +32,7 @@
3532 #ifndef _ASM_ARC_PGTABLE_H
3633 #define _ASM_ARC_PGTABLE_H
3734 
38
-#include <linux/const.h>
39
-#define __ARCH_USE_5LEVEL_HACK
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+#include <linux/bits.h>
4036 #include <asm-generic/pgtable-nopmd.h>
4137 #include <asm/page.h>
4238 #include <asm/mmu.h>	/* to propagate CONFIG_ARC_MMU_VER <n> */
....@@ -111,8 +107,8 @@
111107 #define ___DEF (_PAGE_PRESENT | _PAGE_CACHEABLE)
112108 
113109 /* Set of bits not changed in pte_modify */
114
-#define _PAGE_CHG_MASK	(PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_SPECIAL)
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-
110
+#define _PAGE_CHG_MASK	(PAGE_MASK_PHYS | _PAGE_ACCESSED | _PAGE_DIRTY | \
111
+							   _PAGE_SPECIAL)
116112 /* More Abbrevaited helpers */
117113 #define PAGE_U_NONE     __pgprot(___DEF)
118114 #define PAGE_U_R        __pgprot(___DEF | _PAGE_READ)
....@@ -136,13 +132,7 @@
136132 #define PTE_BITS_IN_PD0		(_PAGE_GLOBAL | _PAGE_PRESENT | _PAGE_HW_SZ)
137133 #define PTE_BITS_RWX		(_PAGE_EXECUTE | _PAGE_WRITE | _PAGE_READ)
138134 
139
-#ifdef CONFIG_ARC_HAS_PAE40
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-#define PTE_BITS_NON_RWX_IN_PD1	(0xff00000000 | PAGE_MASK | _PAGE_CACHEABLE)
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-#define MAX_POSSIBLE_PHYSMEM_BITS 40
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-#else
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-#define PTE_BITS_NON_RWX_IN_PD1	(PAGE_MASK | _PAGE_CACHEABLE)
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-#define MAX_POSSIBLE_PHYSMEM_BITS 32
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-#endif
135
+#define PTE_BITS_NON_RWX_IN_PD1	(PAGE_MASK_PHYS | _PAGE_CACHEABLE)
146136 
147137 /**************************************************************************
148138  * Mapping of vm_flags (Generic VM) to PTE flags (arch specific)
....@@ -220,11 +210,11 @@
220210 #define BITS_FOR_PTE	(PGDIR_SHIFT - PAGE_SHIFT)
221211 #define BITS_FOR_PGD	(32 - PGDIR_SHIFT)
222212 
223
-#define PGDIR_SIZE	_BITUL(PGDIR_SHIFT)	/* vaddr span, not PDG sz */
213
+#define PGDIR_SIZE	BIT(PGDIR_SHIFT)	/* vaddr span, not PDG sz */
224214 #define PGDIR_MASK	(~(PGDIR_SIZE-1))
225215 
226
-#define	PTRS_PER_PTE	_BITUL(BITS_FOR_PTE)
227
-#define	PTRS_PER_PGD	_BITUL(BITS_FOR_PGD)
216
+#define	PTRS_PER_PTE	BIT(BITS_FOR_PTE)
217
+#define	PTRS_PER_PGD	BIT(BITS_FOR_PGD)
228218 
229219 /*
230220  * Number of entries a user land program use.
....@@ -254,9 +244,6 @@
254244 extern char empty_zero_page[PAGE_SIZE];
255245 #define ZERO_PAGE(vaddr)	(virt_to_page(empty_zero_page))
256246 
257
-#define pte_unmap(pte)		do { } while (0)
258
-#define pte_unmap_nested(pte)		do { } while (0)
259
-
260247 #define set_pte(pteptr, pteval)	((*(pteptr)) = (pteval))
261248 #define set_pmd(pmdptr, pmdval)	(*(pmdptr) = pmdval)
262249 
....@@ -279,6 +266,7 @@
279266 #define pmd_none(x)			(!pmd_val(x))
280267 #define	pmd_bad(x)			((pmd_val(x) & ~PAGE_MASK))
281268 #define pmd_present(x)			(pmd_val(x))
269
+#define pmd_leaf(x)			(pmd_val(x) & _PAGE_HW_SZ)
282270 #define pmd_clear(xp)			do { pmd_val(*(xp)) = 0; } while (0)
283271 
284272 #define pte_page(pte)		pfn_to_page(pte_pfn(pte))
....@@ -287,18 +275,6 @@
287275 
288276 /* Don't use virt_to_pfn for macros below: could cause truncations for PAE40*/
289277 #define pte_pfn(pte)		(pte_val(pte) >> PAGE_SHIFT)
290
-#define __pte_index(addr)	(((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
291
-
292
-/*
293
- * pte_offset gets a @ptr to PMD entry (PGD in our 2-tier paging system)
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- * and returns ptr to PTE entry corresponding to @addr
295
- */
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-#define pte_offset(dir, addr) ((pte_t *)(pmd_page_vaddr(*dir)) +\
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-					 __pte_index(addr))
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-
299
-/* No mapping of Page Tables in high mem etc, so following same as above */
300
-#define pte_offset_kernel(dir, addr)		pte_offset(dir, addr)
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-#define pte_offset_map(dir, addr)		pte_offset(dir, addr)
302278 
303279 /* Zoo of pte_xxx function */
304280 #define pte_read(pte)		(pte_val(pte) & _PAGE_READ)
....@@ -337,13 +313,6 @@
337313 }
338314 
339315 /*
340
- * All kernel related VM pages are in init's mm.
341
- */
342
-#define pgd_offset_k(address)	pgd_offset(&init_mm, address)
343
-#define pgd_index(addr)		((addr) >> PGDIR_SHIFT)
344
-#define pgd_offset(mm, addr)	(((mm)->pgd)+pgd_index(addr))
345
-
346
-/*
347316  * Macro to quickly access the PGD entry, utlising the fact that some
348317  * arch may cache the pointer to Page Directory of "current" task
349318  * in a MMU register
....@@ -356,7 +325,7 @@
356325  * Thus use this macro only when you are certain that "current" is current
357326  * e.g. when dealing with signal frame setup code etc
358327  */
359
-#ifndef CONFIG_SMP
328
+#ifdef ARC_USE_SCRATCH_REG
360329 #define pgd_offset_fast(mm, addr)	\
361330 ({					\
362331 	pgd_t *pgd_base = (pgd_t *) read_aux_reg(ARC_REG_SCRATCH_DATA0);  \
....@@ -395,15 +364,8 @@
395364 #include <asm/hugepage.h>
396365 #endif
397366 
398
-#include <asm-generic/pgtable.h>
399
-
400367 /* to cope with aliasing VIPT cache */
401368 #define HAVE_ARCH_UNMAPPED_AREA
402
-
403
-/*
404
- * No page table caches to initialise
405
- */
406
-#define pgtable_cache_init()   do { } while (0)
407369 
408370 #endif /* __ASSEMBLY__ */
409371