rk3568 rkbin init

hc

2023-11-06 36f0949ef9854b82a9a3154d970da4e3b8d12a61

 rkbin/doc/release/RK3308_EN.md
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 # RK3308 Release Note
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+## rk3308_bl31_cpu3_v1.00.elf
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+| Date       | File                       | Build commit | Severity |
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+| ---------- | :------------------------- | ------------ | -------- |
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+| 2023-03-16 | rk3308_bl31_cpu3_v1.00.elf | 5fb7b7229    | moderate |
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+### New
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+1. Support boot from CPU3.
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+------
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+## rk3308_ddr_{589 ... 393}MHz_{uart2_m1, uart4_m0}_v2.07.bin
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+| Date       | File                                                       | Build commit | Severity |
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+| ---------- | :--------------------------------------------------------- | ------------ | -------- |
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+| 2022-11-29 | rk3308_ddr_{589 ... 393}MHz_{uart2_m1, uart4_m0}_v2.07.bin | 6ede97a868   | moderate |
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+
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+### Fixed
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+| Index | Severity | Update                                                   | Issue description                                            | Issue source |
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+| ----- | -------- | -------------------------------------------------------- | ------------------------------------------------------------ | ------------ |
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+| 1     | moderate | Improve the stability of some DDR in RK3308B/H at 393MHz | When RK3308B/H is less than 451MHz, the value of read DQS DLL delay is inaccurately configured. As a result, some DDR may be unstable at 393MHz. | -            |
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+------
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+
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 ## rk3308_bl31_{aarch32}_v2.26.elf
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 | Date       | File                            | Build commit | Severity  |
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 ### New
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-1. Check ftl super block 2nd page spare data
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+1. Check ftl super block 2nd page spare data.