.. | .. |
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1 | 1 | [ |
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2 | | - {, |
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| 2 | + { |
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3 | 3 | "EventCode": "0x1415A", |
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4 | 4 | "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST_CYC", |
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5 | 5 | "BriefDescription": "Duration in cycles to reload from local core's L2 with load hit store conflict due to a marked load" |
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6 | 6 | }, |
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7 | | - {, |
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| 7 | + { |
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8 | 8 | "EventCode": "0x10058", |
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9 | 9 | "EventName": "PM_MEM_LOC_THRESH_IFU", |
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10 | 10 | "BriefDescription": "Local Memory above threshold for IFU speculation control" |
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11 | 11 | }, |
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12 | | - {, |
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| 12 | + { |
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13 | 13 | "EventCode": "0x2D028", |
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14 | 14 | "EventName": "PM_RADIX_PWC_L2_PDE_FROM_L2", |
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15 | 15 | "BriefDescription": "A Page Directory Entry was reloaded to a level 2 page walk cache from the core's L2 data cache" |
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16 | 16 | }, |
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17 | | - {, |
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| 17 | + { |
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18 | 18 | "EventCode": "0x30012", |
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19 | 19 | "EventName": "PM_FLUSH_COMPLETION", |
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20 | 20 | "BriefDescription": "The instruction that was next to complete did not complete because it suffered a flush" |
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21 | 21 | }, |
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22 | | - {, |
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| 22 | + { |
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23 | 23 | "EventCode": "0x2D154", |
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24 | 24 | "EventName": "PM_MRK_DERAT_MISS_64K", |
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25 | 25 | "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 64K" |
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26 | 26 | }, |
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27 | | - {, |
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| 27 | + { |
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28 | 28 | "EventCode": "0x4016E", |
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29 | 29 | "EventName": "PM_THRESH_NOT_MET", |
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30 | 30 | "BriefDescription": "Threshold counter did not meet threshold" |
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31 | 31 | } |
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32 | | -] |
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| 32 | +] |
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