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hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf 
 kernel/include/soc/fsl/qe/qe.h
....@@ -1,3 +1,4 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
12 /*
23  * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.
34  *
....@@ -6,11 +7,6 @@
67  *
78  * Description:
89  * QUICC Engine (QE) external definitions and structure.
9
- *
10
- * This program is free software; you can redistribute  it and/or modify it
11
- * under  the terms of  the GNU General  Public License as published by the
12
- * Free Software Foundation;  either version 2 of the  License, or (at your
13
- * option) any later version.
1410  */
1511 #ifndef _ASM_POWERPC_QE_H
1612 #define _ASM_POWERPC_QE_H
....@@ -21,7 +17,7 @@
2117 #include <linux/spinlock.h>
2218 #include <linux/errno.h>
2319 #include <linux/err.h>
24
-#include <asm/cpm.h>
20
+#include <soc/fsl/cpm.h>
2521 #include <soc/fsl/qe/immap_qe.h>
2622 #include <linux/of.h>
2723 #include <linux/of_address.h>
....@@ -102,26 +98,25 @@
10298 int cpm_muram_init(void);
10399 
104100 #if defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE)
105
-unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
106
-int cpm_muram_free(unsigned long offset);
107
-unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
101
+s32 cpm_muram_alloc(unsigned long size, unsigned long align);
102
+void cpm_muram_free(s32 offset);
103
+s32 cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
108104 void __iomem *cpm_muram_addr(unsigned long offset);
109105 unsigned long cpm_muram_offset(void __iomem *addr);
110106 dma_addr_t cpm_muram_dma(void __iomem *addr);
111107 #else
112
-static inline unsigned long cpm_muram_alloc(unsigned long size,
113
-					    unsigned long align)
108
+static inline s32 cpm_muram_alloc(unsigned long size,
109
+				  unsigned long align)
114110 {
115111 	return -ENOSYS;
116112 }
117113 
118
-static inline int cpm_muram_free(unsigned long offset)
114
+static inline void cpm_muram_free(s32 offset)
119115 {
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-	return -ENOSYS;
121116 }
122117 
123
-static inline unsigned long cpm_muram_alloc_fixed(unsigned long offset,
124
-						  unsigned long size)
118
+static inline s32 cpm_muram_alloc_fixed(unsigned long offset,
119
+					unsigned long size)
125120 {
126121 	return -ENOSYS;
127122 }
....@@ -245,25 +240,41 @@
245240 #define qe_muram_offset cpm_muram_offset
246241 #define qe_muram_dma cpm_muram_dma
247242 
248
-#define qe_setbits32(_addr, _v) iowrite32be(ioread32be(_addr) |  (_v), (_addr))
249
-#define qe_clrbits32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr))
243
+#ifdef CONFIG_PPC32
244
+#define qe_iowrite8(val, addr)     out_8(addr, val)
245
+#define qe_iowrite16be(val, addr)  out_be16(addr, val)
246
+#define qe_iowrite32be(val, addr)  out_be32(addr, val)
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+#define qe_ioread8(addr)           in_8(addr)
248
+#define qe_ioread16be(addr)        in_be16(addr)
249
+#define qe_ioread32be(addr)        in_be32(addr)
250
+#else
251
+#define qe_iowrite8(val, addr)     iowrite8(val, addr)
252
+#define qe_iowrite16be(val, addr)  iowrite16be(val, addr)
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+#define qe_iowrite32be(val, addr)  iowrite32be(val, addr)
254
+#define qe_ioread8(addr)           ioread8(addr)
255
+#define qe_ioread16be(addr)        ioread16be(addr)
256
+#define qe_ioread32be(addr)        ioread32be(addr)
257
+#endif
250258 
251
-#define qe_setbits16(_addr, _v) iowrite16be(ioread16be(_addr) |  (_v), (_addr))
252
-#define qe_clrbits16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr))
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+#define qe_setbits_be32(_addr, _v) qe_iowrite32be(qe_ioread32be(_addr) |  (_v), (_addr))
260
+#define qe_clrbits_be32(_addr, _v) qe_iowrite32be(qe_ioread32be(_addr) & ~(_v), (_addr))
253261 
254
-#define qe_setbits8(_addr, _v) iowrite8(ioread8(_addr) |  (_v), (_addr))
255
-#define qe_clrbits8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr))
262
+#define qe_setbits_be16(_addr, _v) qe_iowrite16be(qe_ioread16be(_addr) |  (_v), (_addr))
263
+#define qe_clrbits_be16(_addr, _v) qe_iowrite16be(qe_ioread16be(_addr) & ~(_v), (_addr))
256264 
257
-#define qe_clrsetbits32(addr, clear, set) \
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-	iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr))
259
-#define qe_clrsetbits16(addr, clear, set) \
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-	iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr))
261
-#define qe_clrsetbits8(addr, clear, set) \
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-	iowrite8((ioread8(addr) & ~(clear)) | (set), (addr))
265
+#define qe_setbits_8(_addr, _v) qe_iowrite8(qe_ioread8(_addr) |  (_v), (_addr))
266
+#define qe_clrbits_8(_addr, _v) qe_iowrite8(qe_ioread8(_addr) & ~(_v), (_addr))
267
+
268
+#define qe_clrsetbits_be32(addr, clear, set) \
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+	qe_iowrite32be((qe_ioread32be(addr) & ~(clear)) | (set), (addr))
270
+#define qe_clrsetbits_be16(addr, clear, set) \
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+	qe_iowrite16be((qe_ioread16be(addr) & ~(clear)) | (set), (addr))
272
+#define qe_clrsetbits_8(addr, clear, set) \
273
+	qe_iowrite8((qe_ioread8(addr) & ~(clear)) | (set), (addr))
263274 
264275 /* Structure that defines QE firmware binary files.
265276  *
266
- * See Documentation/powerpc/qe_firmware.txt for a description of these
277
+ * See Documentation/powerpc/qe_firmware.rst for a description of these
267278  * fields.
268279  */
269280 struct qe_firmware {
....@@ -296,7 +307,7 @@
296307 		u8 revision;		/* The microcode version revision */
297308 		u8 padding;		/* Reserved, for alignment */
298309 		u8 reserved[4];		/* Reserved, for future expansion */
299
-	} __attribute__ ((packed)) microcode[1];
310
+	} __packed microcode[];
300311 	/* All microcode binaries should be located here */
301312 	/* CRC32 should be located here, after the microcode binaries */
302313 } __attribute__ ((packed));