.. | .. |
---|
24 | 24 | #include <linux/poll.h> |
---|
25 | 25 | #include <linux/platform_device.h> |
---|
26 | 26 | #include <soc/rockchip/pm_domains.h> |
---|
| 27 | +#include <uapi/linux/rk-mpp.h> |
---|
27 | 28 | |
---|
28 | 29 | #define MHZ (1000 * 1000) |
---|
29 | 30 | #define MPP_WORK_TIMEOUT_DELAY (500) |
---|
.. | .. |
---|
31 | 32 | #define MPP_MAX_MSG_NUM (16) |
---|
32 | 33 | #define MPP_MAX_REG_TRANS_NUM (60) |
---|
33 | 34 | #define MPP_MAX_TASK_CAPACITY (16) |
---|
34 | | -/* define flags for mpp_request */ |
---|
35 | | -#define MPP_FLAGS_MULTI_MSG (0x00000001) |
---|
36 | | -#define MPP_FLAGS_LAST_MSG (0x00000002) |
---|
37 | | -#define MPP_FLAGS_REG_FD_NO_TRANS (0x00000004) |
---|
38 | | -#define MPP_FLAGS_SCL_FD_NO_TRANS (0x00000008) |
---|
39 | | -#define MPP_FLAGS_REG_NO_OFFSET (0x00000010) |
---|
40 | | -#define MPP_FLAGS_SECURE_MODE (0x00010000) |
---|
41 | 35 | |
---|
42 | 36 | /* grf mask for get value */ |
---|
43 | 37 | #define MPP_GRF_VAL_MASK (0xFFFF) |
---|
.. | .. |
---|
91 | 85 | MPP_DRIVER_AV1DEC, |
---|
92 | 86 | MPP_DRIVER_VDPP, |
---|
93 | 87 | MPP_DRIVER_BUTT, |
---|
94 | | -}; |
---|
95 | | - |
---|
96 | | -/** |
---|
97 | | - * Command type: keep the same as user space |
---|
98 | | - */ |
---|
99 | | -enum MPP_DEV_COMMAND_TYPE { |
---|
100 | | - MPP_CMD_QUERY_BASE = 0, |
---|
101 | | - MPP_CMD_QUERY_HW_SUPPORT = MPP_CMD_QUERY_BASE + 0, |
---|
102 | | - MPP_CMD_QUERY_HW_ID = MPP_CMD_QUERY_BASE + 1, |
---|
103 | | - MPP_CMD_QUERY_CMD_SUPPORT = MPP_CMD_QUERY_BASE + 2, |
---|
104 | | - MPP_CMD_QUERY_BUTT, |
---|
105 | | - |
---|
106 | | - MPP_CMD_INIT_BASE = 0x100, |
---|
107 | | - MPP_CMD_INIT_CLIENT_TYPE = MPP_CMD_INIT_BASE + 0, |
---|
108 | | - MPP_CMD_INIT_DRIVER_DATA = MPP_CMD_INIT_BASE + 1, |
---|
109 | | - MPP_CMD_INIT_TRANS_TABLE = MPP_CMD_INIT_BASE + 2, |
---|
110 | | - MPP_CMD_INIT_BUTT, |
---|
111 | | - |
---|
112 | | - MPP_CMD_SEND_BASE = 0x200, |
---|
113 | | - MPP_CMD_SET_REG_WRITE = MPP_CMD_SEND_BASE + 0, |
---|
114 | | - MPP_CMD_SET_REG_READ = MPP_CMD_SEND_BASE + 1, |
---|
115 | | - MPP_CMD_SET_REG_ADDR_OFFSET = MPP_CMD_SEND_BASE + 2, |
---|
116 | | - MPP_CMD_SET_RCB_INFO = MPP_CMD_SEND_BASE + 3, |
---|
117 | | - MPP_CMD_SET_SESSION_FD = MPP_CMD_SEND_BASE + 4, |
---|
118 | | - MPP_CMD_SEND_BUTT, |
---|
119 | | - |
---|
120 | | - MPP_CMD_POLL_BASE = 0x300, |
---|
121 | | - MPP_CMD_POLL_HW_FINISH = MPP_CMD_POLL_BASE + 0, |
---|
122 | | - MPP_CMD_POLL_HW_IRQ = MPP_CMD_POLL_BASE + 1, |
---|
123 | | - MPP_CMD_POLL_BUTT, |
---|
124 | | - |
---|
125 | | - MPP_CMD_CONTROL_BASE = 0x400, |
---|
126 | | - MPP_CMD_RESET_SESSION = MPP_CMD_CONTROL_BASE + 0, |
---|
127 | | - MPP_CMD_TRANS_FD_TO_IOVA = MPP_CMD_CONTROL_BASE + 1, |
---|
128 | | - MPP_CMD_RELEASE_FD = MPP_CMD_CONTROL_BASE + 2, |
---|
129 | | - MPP_CMD_SEND_CODEC_INFO = MPP_CMD_CONTROL_BASE + 3, |
---|
130 | | - MPP_CMD_CONTROL_BUTT, |
---|
131 | | - |
---|
132 | | - MPP_CMD_BUTT, |
---|
133 | 88 | }; |
---|
134 | 89 | |
---|
135 | 90 | enum MPP_CLOCK_MODE { |
---|
.. | .. |
---|
194 | 149 | struct mpp_dma_session; |
---|
195 | 150 | struct mpp_taskqueue; |
---|
196 | 151 | struct iommu_domain; |
---|
197 | | - |
---|
198 | | -/* data common struct for parse out */ |
---|
199 | | -struct mpp_request { |
---|
200 | | - __u32 cmd; |
---|
201 | | - __u32 flags; |
---|
202 | | - __u32 size; |
---|
203 | | - __u32 offset; |
---|
204 | | - void __user *data; |
---|
205 | | -}; |
---|
206 | 152 | |
---|
207 | 153 | /* struct use to collect task set and poll message */ |
---|
208 | 154 | struct mpp_task_msgs { |
---|
.. | .. |
---|
544 | 490 | u32 core_id_max; |
---|
545 | 491 | u32 core_count; |
---|
546 | 492 | unsigned long dev_active_flags; |
---|
547 | | - u32 iommu_fault; |
---|
548 | 493 | }; |
---|
549 | 494 | |
---|
550 | 495 | struct mpp_reset_group { |
---|