forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/video/fbdev/sa1100fb.c
....@@ -18,7 +18,7 @@
1818 * Clean patches should be sent to the ARM Linux Patch System. Please see the
1919 * following web page for more information:
2020 *
21
- * http://www.arm.linux.org.uk/developer/patches/info.shtml
21
+ * https://www.arm.linux.org.uk/developer/patches/info.shtml
2222 *
2323 * Thank you.
2424 *
....@@ -173,7 +173,7 @@
173173 #include <linux/init.h>
174174 #include <linux/ioport.h>
175175 #include <linux/cpufreq.h>
176
-#include <linux/gpio.h>
176
+#include <linux/gpio/consumer.h>
177177 #include <linux/platform_device.h>
178178 #include <linux/dma-mapping.h>
179179 #include <linux/mutex.h>
....@@ -574,7 +574,7 @@
574574 return vm_iomap_memory(vma, info->fix.mmio_start, info->fix.mmio_len);
575575 }
576576
577
-static struct fb_ops sa1100fb_ops = {
577
+static const struct fb_ops sa1100fb_ops = {
578578 .owner = THIS_MODULE,
579579 .fb_check_var = sa1100fb_check_var,
580580 .fb_set_par = sa1100fb_set_par,
....@@ -799,8 +799,8 @@
799799 writel_relaxed(fbi->dbar2, fbi->base + DBAR2);
800800 writel_relaxed(fbi->reg_lccr0 | LCCR0_LEN, fbi->base + LCCR0);
801801
802
- if (machine_is_shannon())
803
- gpio_set_value(SHANNON_GPIO_DISP_EN, 1);
802
+ if (fbi->shannon_lcden)
803
+ gpiod_set_value(fbi->shannon_lcden, 1);
804804
805805 dev_dbg(fbi->dev, "DBAR1: 0x%08x\n", readl_relaxed(fbi->base + DBAR1));
806806 dev_dbg(fbi->dev, "DBAR2: 0x%08x\n", readl_relaxed(fbi->base + DBAR2));
....@@ -817,8 +817,8 @@
817817
818818 dev_dbg(fbi->dev, "Disabling LCD controller\n");
819819
820
- if (machine_is_shannon())
821
- gpio_set_value(SHANNON_GPIO_DISP_EN, 0);
820
+ if (fbi->shannon_lcden)
821
+ gpiod_set_value(fbi->shannon_lcden, 0);
822822
823823 set_current_state(TASK_UNINTERRUPTIBLE);
824824 add_wait_queue(&fbi->ctrlr_wait, &wait);
....@@ -935,7 +935,7 @@
935935 */
936936 if (old_state != C_DISABLE_PM)
937937 break;
938
- /* fall through */
938
+ fallthrough;
939939
940940 case C_ENABLE:
941941 /*
....@@ -968,44 +968,6 @@
968968
969969 #ifdef CONFIG_CPU_FREQ
970970 /*
971
- * Calculate the minimum DMA period over all displays that we own.
972
- * This, together with the SDRAM bandwidth defines the slowest CPU
973
- * frequency that can be selected.
974
- */
975
-static unsigned int sa1100fb_min_dma_period(struct sa1100fb_info *fbi)
976
-{
977
-#if 0
978
- unsigned int min_period = (unsigned int)-1;
979
- int i;
980
-
981
- for (i = 0; i < MAX_NR_CONSOLES; i++) {
982
- struct display *disp = &fb_display[i];
983
- unsigned int period;
984
-
985
- /*
986
- * Do we own this display?
987
- */
988
- if (disp->fb_info != &fbi->fb)
989
- continue;
990
-
991
- /*
992
- * Ok, calculate its DMA period
993
- */
994
- period = sa1100fb_display_dma_period(&disp->var);
995
- if (period < min_period)
996
- min_period = period;
997
- }
998
-
999
- return min_period;
1000
-#else
1001
- /*
1002
- * FIXME: we need to verify _all_ consoles.
1003
- */
1004
- return sa1100fb_display_dma_period(&fbi->fb.var);
1005
-#endif
1006
-}
1007
-
1008
-/*
1009971 * CPU clock speed change handler. We need to adjust the LCD timing
1010972 * parameters when the CPU clock is adjusted by the power management
1011973 * subsystem.
....@@ -1026,31 +988,6 @@
1026988 pcd = get_pcd(fbi, fbi->fb.var.pixclock);
1027989 fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd);
1028990 set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE);
1029
- break;
1030
- }
1031
- return 0;
1032
-}
1033
-
1034
-static int
1035
-sa1100fb_freq_policy(struct notifier_block *nb, unsigned long val,
1036
- void *data)
1037
-{
1038
- struct sa1100fb_info *fbi = TO_INF(nb, freq_policy);
1039
- struct cpufreq_policy *policy = data;
1040
-
1041
- switch (val) {
1042
- case CPUFREQ_ADJUST:
1043
- dev_dbg(fbi->dev, "min dma period: %d ps, "
1044
- "new clock %d kHz\n", sa1100fb_min_dma_period(fbi),
1045
- policy->max);
1046
- /* todo: fill in min/max values */
1047
- break;
1048
- case CPUFREQ_NOTIFY:
1049
- do {} while(0);
1050
- /* todo: panic if min/max values aren't fulfilled
1051
- * [can't really happen unless there's a bug in the
1052
- * CPU policy verififcation process *
1053
- */
1054991 break;
1055992 }
1056993 return 0;
....@@ -1116,7 +1053,7 @@
11161053 }
11171054
11181055 /* Fake monspecs to fill in fbinfo structure */
1119
-static struct fb_monspecs monspecs = {
1056
+static const struct fb_monspecs monspecs = {
11201057 .hfmin = 30000,
11211058 .hfmax = 70000,
11221059 .vfmin = 50,
....@@ -1206,7 +1143,6 @@
12061143 static int sa1100fb_probe(struct platform_device *pdev)
12071144 {
12081145 struct sa1100fb_info *fbi;
1209
- struct resource *res;
12101146 int ret, irq;
12111147
12121148 if (!dev_get_platdata(&pdev->dev)) {
....@@ -1222,8 +1158,7 @@
12221158 if (!fbi)
12231159 return -ENOMEM;
12241160
1225
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1226
- fbi->base = devm_ioremap_resource(&pdev->dev, res);
1161
+ fbi->base = devm_platform_ioremap_resource(pdev, 0);
12271162 if (IS_ERR(fbi->base))
12281163 return PTR_ERR(fbi->base);
12291164
....@@ -1238,12 +1173,10 @@
12381173 return ret;
12391174 }
12401175
1241
- if (machine_is_shannon()) {
1242
- ret = devm_gpio_request_one(&pdev->dev, SHANNON_GPIO_DISP_EN,
1243
- GPIOF_OUT_INIT_LOW, "display enable");
1244
- if (ret)
1245
- return ret;
1246
- }
1176
+ fbi->shannon_lcden = gpiod_get_optional(&pdev->dev, "shannon-lcden",
1177
+ GPIOD_OUT_LOW);
1178
+ if (IS_ERR(fbi->shannon_lcden))
1179
+ return PTR_ERR(fbi->shannon_lcden);
12471180
12481181 /* Initialize video memory */
12491182 ret = sa1100fb_map_video_memory(fbi);
....@@ -1267,9 +1200,7 @@
12671200
12681201 #ifdef CONFIG_CPU_FREQ
12691202 fbi->freq_transition.notifier_call = sa1100fb_freq_transition;
1270
- fbi->freq_policy.notifier_call = sa1100fb_freq_policy;
12711203 cpufreq_register_notifier(&fbi->freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
1272
- cpufreq_register_notifier(&fbi->freq_policy, CPUFREQ_POLICY_NOTIFIER);
12731204 #endif
12741205
12751206 /* This driver cannot be unloaded at the moment */