.. | .. |
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21 | 21 | #include <linux/mutex.h> |
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22 | 22 | #include <linux/of.h> |
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23 | 23 | #include <linux/reset.h> |
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| 24 | +#include <linux/pm_runtime.h> |
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24 | 25 | |
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25 | 26 | #define HSSPI_GLOBAL_CTRL_REG 0x0 |
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26 | 27 | #define GLOBAL_CTRL_CS_POLARITY_SHIFT 0 |
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.. | .. |
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162 | 163 | int step_size = HSSPI_BUFFER_LEN; |
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163 | 164 | const u8 *tx = t->tx_buf; |
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164 | 165 | u8 *rx = t->rx_buf; |
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| 166 | + u32 val = 0; |
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165 | 167 | |
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166 | 168 | bcm63xx_hsspi_set_clk(bs, spi, t->speed_hz); |
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167 | 169 | bcm63xx_hsspi_set_cs(bs, spi->chip_select, true); |
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.. | .. |
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177 | 179 | step_size -= HSSPI_OPCODE_LEN; |
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178 | 180 | |
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179 | 181 | if ((opcode == HSSPI_OP_READ && t->rx_nbits == SPI_NBITS_DUAL) || |
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180 | | - (opcode == HSSPI_OP_WRITE && t->tx_nbits == SPI_NBITS_DUAL)) |
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| 182 | + (opcode == HSSPI_OP_WRITE && t->tx_nbits == SPI_NBITS_DUAL)) { |
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181 | 183 | opcode |= HSSPI_OP_MULTIBIT; |
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182 | 184 | |
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183 | | - __raw_writel(1 << MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT | |
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184 | | - 1 << MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT | 0xff, |
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| 185 | + if (t->rx_nbits == SPI_NBITS_DUAL) |
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| 186 | + val |= 1 << MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT; |
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| 187 | + if (t->tx_nbits == SPI_NBITS_DUAL) |
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| 188 | + val |= 1 << MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT; |
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| 189 | + } |
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| 190 | + |
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| 191 | + __raw_writel(val | 0xff, |
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185 | 192 | bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select)); |
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186 | 193 | |
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187 | 194 | while (pending > 0) { |
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.. | .. |
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439 | 446 | if (ret) |
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440 | 447 | goto out_put_master; |
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441 | 448 | |
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| 449 | + pm_runtime_enable(&pdev->dev); |
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| 450 | + |
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442 | 451 | /* register and we are done */ |
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443 | 452 | ret = devm_spi_register_master(dev, master); |
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444 | 453 | if (ret) |
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445 | | - goto out_put_master; |
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| 454 | + goto out_pm_disable; |
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446 | 455 | |
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447 | 456 | return 0; |
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448 | 457 | |
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| 458 | +out_pm_disable: |
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| 459 | + pm_runtime_disable(&pdev->dev); |
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449 | 460 | out_put_master: |
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450 | 461 | spi_master_put(master); |
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451 | 462 | out_disable_pll_clk: |
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