update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/soc/rockchip/rockchip_amp.c
..
..
@@ -15,6 +15,7 @@
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 #include <linux/pm_runtime.h>
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 #include <linux/rockchip/rockchip_sip.h>
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 #include <soc/rockchip/rockchip_amp.h>
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+#include <linux/irqchip/arm-gic-common.h>
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19
 
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 #define RK_CPU_STATUS_OFF		0
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 #define RK_CPU_STATUS_ON		1
..
..
@@ -24,6 +25,7 @@
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 #define GPIO_BANK_NUM			16
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 #define GPIO_GROUP_PRIO_MAX		3
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+#define MAX_GIC_SPI_NUM (1020)
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 #define AMP_GIC_DBG(fmt, arg...)	do { if (0) { pr_warn(fmt, ##arg); } } while (0)
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30
 
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 enum amp_cpu_ctrl_status {
..
..
@@ -55,26 +57,27 @@
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 struct amp_gpio_group_s {
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 	u32 bank_id;
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 	u32 prio;
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-	u32 irq_aff[AMP_AFF_MAX_CPU];
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+	u64 irq_aff[AMP_AFF_MAX_CPU];
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 	u32 irq_id[AMP_AFF_MAX_CPU];
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 	u32 en[AMP_AFF_MAX_CPU];
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 };
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64
 
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 struct amp_irq_cfg_s {
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+	u64 aff;
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 	u32 prio;
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 	u32 cpumask;
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-	u32 aff;
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 	int amp_flag;
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-} irqs_cfg[1024];
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+} irqs_cfg[MAX_GIC_SPI_NUM];
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71
 
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 static struct amp_gic_ctrl_s {
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+	enum gic_type gic_version;
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+	u32 spis_num;
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 	struct {
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 		u32 aff;
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 		u32 cpumask;
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 		u32 flag;
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 	} aff_to_cpumask[AMP_AFF_MAX_CLUSTER][AMP_AFF_MAX_CPU];
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-	struct amp_irq_cfg_s irqs_cfg[1024];
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-	u32 validmask[1020 / 32 + 1];
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+	struct amp_irq_cfg_s irqs_cfg[MAX_GIC_SPI_NUM];
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 	struct amp_gpio_group_s gpio_grp[GPIO_BANK_NUM][GPIO_GROUP_PRIO_MAX];
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 	u32 gpio_banks;
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 } amp_ctrl;
..
..
@@ -275,7 +278,12 @@
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 	return amp_ctrl.irqs_cfg[irq].cpumask;
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 }
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278
-static u32 amp_get_cpumask_bit(u32 aff)
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+int rockchip_amp_need_init_amp_irq(u32 irq)
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+{
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+	return amp_ctrl.irqs_cfg[irq].amp_flag;
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+}
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+
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+static u32 amp_get_cpumask_bit(u64 aff)
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 {
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 	u32 aff_cluster, aff_cpu;
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289
 
..
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@@ -285,18 +293,24 @@
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 	if (aff_cpu >= AMP_AFF_MAX_CPU || aff_cluster >= AMP_AFF_MAX_CLUSTER)
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 		return 0;
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-	AMP_GIC_DBG("%s: aff:%d-%d: %x\n", __func__, aff_cluster, aff_cpu,
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+	AMP_GIC_DBG("  %s: aff:%d-%d: %x\n", __func__, aff_cluster, aff_cpu,
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 		    amp_ctrl.aff_to_cpumask[aff_cluster][aff_cpu].cpumask);
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 	return amp_ctrl.aff_to_cpumask[aff_cluster][aff_cpu].cpumask;
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+}
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+
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+u64 rockchip_amp_get_irq_aff(u32 irq)
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+{
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+	return amp_ctrl.irqs_cfg[irq].aff;
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 }
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 static int gic_amp_get_gpio_prio_group_info(struct device_node *np,
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 					    struct amp_gic_ctrl_s *amp_ctrl,
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 					    int prio_id)
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 {
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-	u32 gpio_bank, count0, count1, prio, irq_id, irq_aff;
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-	int i;
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+	u32 gpio_bank, prio, irq_id;
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+	u64 irq_aff;
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+	int i, count0, count1;
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 	struct amp_gpio_group_s *gpio_grp;
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 	struct amp_irq_cfg_s *irqs_cfg;
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..
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@@ -320,7 +334,7 @@
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 		    __func__, gpio_bank, prio_id, prio);
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 	count0 = of_property_count_u32_elems(np, "girq-id");
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-	count1 = of_property_count_u32_elems(np, "girq-aff");
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+	count1 = of_property_count_u64_elems(np, "girq-aff");
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 	if (count0 != count1)
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 		return -EINVAL;
..
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@@ -330,7 +344,7 @@
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 	for (i = 0; i < count0; i++) {
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 		of_property_read_u32_index(np, "girq-id", i, &irq_id);
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 		gpio_grp->irq_id[i] = irq_id;
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-		of_property_read_u32_index(np, "girq-aff", i, &irq_aff);
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+		of_property_read_u64_index(np, "girq-aff", i, &irq_aff);
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 		gpio_grp->irq_aff[i] = irq_aff;
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350
 
..
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@@ -338,18 +352,24 @@
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352
 
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 		irqs_cfg = &amp_ctrl->irqs_cfg[irq_id];
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354
 
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-		AMP_GIC_DBG(" %s: group cpu-%d, irq-%d: prio-%x, aff-%x en-%d\n",
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+		AMP_GIC_DBG(" %s: group cpu-%d, irq-%d: prio-%x, aff-%llx en-%d\n",
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 			    __func__, i, gpio_grp->irq_id[i], gpio_grp->prio,
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 			    gpio_grp->irq_aff[i], gpio_grp->en[i]);
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 		if (gpio_grp->en[i]) {
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 			irqs_cfg->prio = gpio_grp->prio;
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 			irqs_cfg->aff = irq_aff;
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-			irqs_cfg->cpumask = amp_get_cpumask_bit(irq_aff);
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+			if (amp_ctrl->gic_version == GIC_V2) {
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+				irqs_cfg->cpumask = amp_get_cpumask_bit(irq_aff);
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+				if (!irqs_cfg->cpumask) {
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+					pr_err(" %s: get cpumask error\n", __func__);
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+					return -EINVAL;
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+				}
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+			}
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 			irqs_cfg->amp_flag = 1;
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 		}
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-		AMP_GIC_DBG("  %s: irqs_cfg prio-%x aff-%x cpumaks-%x en-%d\n",
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+		AMP_GIC_DBG("  %s: prio-%x aff-%llx cpumaks-%x flag-%d\n",
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 			    __func__, irqs_cfg->prio, irqs_cfg->aff,
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 			    irqs_cfg->cpumask, irqs_cfg->amp_flag);
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 	}
..
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@@ -404,33 +424,37 @@
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 {
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 	const struct property *prop;
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 	int count, i;
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-	u32 cluster, aff_cpu, aff, cpumask;
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+	u32 cluster, aff_cpu;
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+	u64 aff, cpumask;
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430
+	if (amp_ctrl->gic_version != GIC_V2)
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+		return 0;
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 	prop = of_find_property(np, "amp-cpu-aff-maskbits", NULL);
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+
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 	if (!prop)
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 		return -1;
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436
 
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 	if (!prop->value)
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 		return -1;
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416
-	count = of_property_count_u32_elems(np, "amp-cpu-aff-maskbits");
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+	count = of_property_count_u64_elems(np, "amp-cpu-aff-maskbits");
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 	if (count % 2)
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 		return -1;
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 	for (i = 0; i < count / 2; i++) {
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-		of_property_read_u32_index(np, "amp-cpu-aff-maskbits",
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+		of_property_read_u64_index(np, "amp-cpu-aff-maskbits",
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 					   2 * i, &aff);
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 		cluster = MPIDR_AFFINITY_LEVEL(aff, 1);
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 		aff_cpu = MPIDR_AFFINITY_LEVEL(aff, 0);
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 		amp_ctrl->aff_to_cpumask[cluster][aff_cpu].aff = aff;
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427
-		of_property_read_u32_index(np, "amp-cpu-aff-maskbits",
451
+		of_property_read_u64_index(np, "amp-cpu-aff-maskbits",
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 					   2 * i + 1, &cpumask);
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430
-		amp_ctrl->aff_to_cpumask[cluster][aff_cpu].cpumask = cpumask;
454
+		amp_ctrl->aff_to_cpumask[cluster][aff_cpu].cpumask = (u32)cpumask;
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432
-		AMP_GIC_DBG("cpumask: %d-%d: aff-%d cpumask-%d\n",
433
-			    cluster, aff_cpu, aff, cpumask);
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+		AMP_GIC_DBG("cpumask: %d-%d: aff-%llx cpumask-%d\n",
457
+			    cluster, aff_cpu, aff, (u32)cpumask);
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458
 
435
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 		if (!cpumask)
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 			return -1;
..
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@@ -443,8 +467,9 @@
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 				    struct amp_gic_ctrl_s *amp_ctrl)
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 {
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469
 	const struct property *prop;
446
-	int count, i;
447
-	u32 irq, prio, aff;
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+	u32 irq, i;
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+	int count;
472
+	u64 aff, val, prio;
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473
 
449
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 	prop = of_find_property(np, "amp-irqs", NULL);
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 	if (!prop)
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@@ -453,30 +478,31 @@
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 	if (!prop->value)
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 		return;
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480
 
456
-	count = of_property_count_u32_elems(np, "amp-irqs");
481
+	count = of_property_count_u64_elems(np, "amp-irqs");
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482
 
458
-	if (count < 0 || count % 3)
483
+	if (count % 3)
459
484
 		return;
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485
 
461
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 	for (i = 0; i < count / 3; i++) {
462
-		of_property_read_u32_index(np, "amp-irqs", 3 * i, &irq);
463
-
464
-		if (irq > 1020)
487
+		of_property_read_u64_index(np, "amp-irqs", 3 * i, &val);
488
+		irq = (u32)val;
489
+		if (irq > amp_ctrl->spis_num)
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 			break;
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467
-		of_property_read_u32_index(np, "amp-irqs", 3 * i + 1, &prio);
468
-		of_property_read_u32_index(np, "amp-irqs", 3 * i + 2, &aff);
492
+		of_property_read_u64_index(np, "amp-irqs", 3 * i + 1, &prio);
493
+		of_property_read_u64_index(np, "amp-irqs", 3 * i + 2, &aff);
469
494
 
470
-		AMP_GIC_DBG("%s: irq-%d aff-%d prio-%x\n",
495
+		AMP_GIC_DBG("%s: irq-%d aff-%llx prio-%llx\n",
471
496
 			    __func__, irq, aff, prio);
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497
 
473
-		amp_ctrl->irqs_cfg[irq].prio = prio;
498
+		amp_ctrl->irqs_cfg[irq].prio = (u32)prio;
474
499
 		amp_ctrl->irqs_cfg[irq].aff = aff;
475
-		amp_ctrl->irqs_cfg[irq].cpumask = amp_get_cpumask_bit(aff);
476
-
477
-		if (!amp_ctrl->irqs_cfg[irq].cpumask) {
478
-			AMP_GIC_DBG("%s: get cpumask error\n", __func__);
479
-			break;
500
+		if (amp_ctrl->gic_version == GIC_V2) {
501
+			amp_ctrl->irqs_cfg[irq].cpumask = amp_get_cpumask_bit(aff);
502
+			if (!amp_ctrl->irqs_cfg[irq].cpumask) {
503
+				pr_err("%s: get cpumask error\n", __func__);
504
+				break;
505
+			}
480
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 		}
481
507
 
482
508
 		if (!amp_ctrl->irqs_cfg[irq].aff &&
..
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@@ -485,16 +511,19 @@
485
511
 
486
512
 		amp_ctrl->irqs_cfg[irq].amp_flag = 1;
487
513
 
488
-		AMP_GIC_DBG("%s: irq-%d aff-%d cpumask-%d pri-%x\n",
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+		AMP_GIC_DBG(" %s: irq-%d aff-%llx cpumask-%x pri-%x\n",
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 			    __func__, irq, amp_ctrl->irqs_cfg[irq].aff,
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 			    amp_ctrl->irqs_cfg[irq].cpumask,
491
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 			    amp_ctrl->irqs_cfg[irq].prio);
492
518
 	}
493
519
 }
494
520
 
495
-void rockchip_amp_get_gic_info(void)
521
+void rockchip_amp_get_gic_info(u32 spis_num, enum gic_type gic_version)
496
522
 {
497
523
 	struct device_node *np;
524
+
525
+	amp_ctrl.spis_num = spis_num;
526
+	amp_ctrl.gic_version = gic_version;
498
527
 
499
528
 	np = of_find_node_by_name(NULL, "rockchip-amp");
500
529
 	if (!np)
..
..
@@ -504,6 +533,7 @@
504
533
 		pr_err("%s: get amp gic cpu mask error\n", __func__);
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 		goto exit;
506
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 	}
536
+
507
537
 	gic_of_get_gpio_group(np, &amp_ctrl);
508
538
 	amp_gic_get_irqs_config(np, &amp_ctrl);
509
539