hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/scsi/pm8001/pm80xx_hwi.c
....@@ -58,27 +58,24 @@
5858 reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER);
5959 } while ((reg_val != shift_value) && time_before(jiffies, start));
6060 if (reg_val != shift_value) {
61
- PM8001_FAIL_DBG(pm8001_ha,
62
- pm8001_printk("TIMEOUT:MEMBASE_II_SHIFT_REGISTER"
63
- " = 0x%x\n", reg_val));
61
+ pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:MEMBASE_II_SHIFT_REGISTER = 0x%x\n",
62
+ reg_val);
6463 return -1;
6564 }
6665 return 0;
6766 }
6867
69
-void pm80xx_pci_mem_copy(struct pm8001_hba_info *pm8001_ha, u32 soffset,
70
- const void *destination,
68
+static void pm80xx_pci_mem_copy(struct pm8001_hba_info *pm8001_ha, u32 soffset,
69
+ __le32 *destination,
7170 u32 dw_count, u32 bus_base_number)
7271 {
7372 u32 index, value, offset;
74
- u32 *destination1;
75
- destination1 = (u32 *)destination;
7673
77
- for (index = 0; index < dw_count; index += 4, destination1++) {
78
- offset = (soffset + index / 4);
74
+ for (index = 0; index < dw_count; index += 4, destination++) {
75
+ offset = (soffset + index);
7976 if (offset < (64 * 1024)) {
8077 value = pm8001_cr32(pm8001_ha, bus_base_number, offset);
81
- *destination1 = cpu_to_le32(value);
78
+ *destination = cpu_to_le32(value);
8279 }
8380 }
8481 return;
....@@ -92,9 +89,12 @@
9289 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
9390 void __iomem *fatal_table_address = pm8001_ha->fatal_tbl_addr;
9491 u32 accum_len , reg_val, index, *temp;
92
+ u32 status = 1;
9593 unsigned long start;
9694 u8 *direct_data;
9795 char *fatal_error_data = buf;
96
+ u32 length_to_read;
97
+ u32 offset;
9898
9999 pm8001_ha->forensic_info.data_buf.direct_data = buf;
100100 if (pm8001_ha->chip_id == chip_8001) {
....@@ -104,16 +104,31 @@
104104 return (char *)pm8001_ha->forensic_info.data_buf.direct_data -
105105 (char *)buf;
106106 }
107
+ /* initialize variables for very first call from host application */
107108 if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) {
108
- PM8001_IO_DBG(pm8001_ha,
109
- pm8001_printk("forensic_info TYPE_NON_FATAL..............\n"));
109
+ pm8001_dbg(pm8001_ha, IO,
110
+ "forensic_info TYPE_NON_FATAL..............\n");
110111 direct_data = (u8 *)fatal_error_data;
111112 pm8001_ha->forensic_info.data_type = TYPE_NON_FATAL;
112113 pm8001_ha->forensic_info.data_buf.direct_len = SYSFS_OFFSET;
114
+ pm8001_ha->forensic_info.data_buf.direct_offset = 0;
113115 pm8001_ha->forensic_info.data_buf.read_len = 0;
116
+ pm8001_ha->forensic_preserved_accumulated_transfer = 0;
117
+
118
+ /* Write signature to fatal dump table */
119
+ pm8001_mw32(fatal_table_address,
120
+ MPI_FATAL_EDUMP_TABLE_SIGNATURE, 0x1234abcd);
114121
115122 pm8001_ha->forensic_info.data_buf.direct_data = direct_data;
116
-
123
+ pm8001_dbg(pm8001_ha, IO, "ossaHwCB: status1 %d\n", status);
124
+ pm8001_dbg(pm8001_ha, IO, "ossaHwCB: read_len 0x%x\n",
125
+ pm8001_ha->forensic_info.data_buf.read_len);
126
+ pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_len 0x%x\n",
127
+ pm8001_ha->forensic_info.data_buf.direct_len);
128
+ pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_offset 0x%x\n",
129
+ pm8001_ha->forensic_info.data_buf.direct_offset);
130
+ }
131
+ if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) {
117132 /* start to get data */
118133 /* Program the MEMBASE II Shifting Register with 0x00.*/
119134 pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER,
....@@ -126,30 +141,61 @@
126141 /* Read until accum_len is retrived */
127142 accum_len = pm8001_mr32(fatal_table_address,
128143 MPI_FATAL_EDUMP_TABLE_ACCUM_LEN);
129
- PM8001_IO_DBG(pm8001_ha, pm8001_printk("accum_len 0x%x\n",
130
- accum_len));
144
+ /* Determine length of data between previously stored transfer length
145
+ * and current accumulated transfer length
146
+ */
147
+ length_to_read =
148
+ accum_len - pm8001_ha->forensic_preserved_accumulated_transfer;
149
+ pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: accum_len 0x%x\n",
150
+ accum_len);
151
+ pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: length_to_read 0x%x\n",
152
+ length_to_read);
153
+ pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: last_offset 0x%x\n",
154
+ pm8001_ha->forensic_last_offset);
155
+ pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: read_len 0x%x\n",
156
+ pm8001_ha->forensic_info.data_buf.read_len);
157
+ pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_len 0x%x\n",
158
+ pm8001_ha->forensic_info.data_buf.direct_len);
159
+ pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_offset 0x%x\n",
160
+ pm8001_ha->forensic_info.data_buf.direct_offset);
161
+
162
+ /* If accumulated length failed to read correctly fail the attempt.*/
131163 if (accum_len == 0xFFFFFFFF) {
132
- PM8001_IO_DBG(pm8001_ha,
133
- pm8001_printk("Possible PCI issue 0x%x not expected\n",
134
- accum_len));
135
- return -EIO;
164
+ pm8001_dbg(pm8001_ha, IO,
165
+ "Possible PCI issue 0x%x not expected\n",
166
+ accum_len);
167
+ return status;
136168 }
137
- if (accum_len == 0 || accum_len >= 0x100000) {
169
+ /* If accumulated length is zero fail the attempt */
170
+ if (accum_len == 0) {
138171 pm8001_ha->forensic_info.data_buf.direct_data +=
139172 sprintf(pm8001_ha->forensic_info.data_buf.direct_data,
140
- "%08x ", 0xFFFFFFFF);
173
+ "%08x ", 0xFFFFFFFF);
141174 return (char *)pm8001_ha->forensic_info.data_buf.direct_data -
142175 (char *)buf;
143176 }
177
+ /* Accumulated length is good so start capturing the first data */
144178 temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr;
145179 if (pm8001_ha->forensic_fatal_step == 0) {
146180 moreData:
181
+ /* If data to read is less than SYSFS_OFFSET then reduce the
182
+ * length of dataLen
183
+ */
184
+ if (pm8001_ha->forensic_last_offset + SYSFS_OFFSET
185
+ > length_to_read) {
186
+ pm8001_ha->forensic_info.data_buf.direct_len =
187
+ length_to_read -
188
+ pm8001_ha->forensic_last_offset;
189
+ } else {
190
+ pm8001_ha->forensic_info.data_buf.direct_len =
191
+ SYSFS_OFFSET;
192
+ }
147193 if (pm8001_ha->forensic_info.data_buf.direct_data) {
148194 /* Data is in bar, copy to host memory */
149
- pm80xx_pci_mem_copy(pm8001_ha, pm8001_ha->fatal_bar_loc,
150
- pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr,
151
- pm8001_ha->forensic_info.data_buf.direct_len ,
152
- 1);
195
+ pm80xx_pci_mem_copy(pm8001_ha,
196
+ pm8001_ha->fatal_bar_loc,
197
+ pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr,
198
+ pm8001_ha->forensic_info.data_buf.direct_len, 1);
153199 }
154200 pm8001_ha->fatal_bar_loc +=
155201 pm8001_ha->forensic_info.data_buf.direct_len;
....@@ -160,21 +206,29 @@
160206 pm8001_ha->forensic_info.data_buf.read_len =
161207 pm8001_ha->forensic_info.data_buf.direct_len;
162208
163
- if (pm8001_ha->forensic_last_offset >= accum_len) {
209
+ if (pm8001_ha->forensic_last_offset >= length_to_read) {
164210 pm8001_ha->forensic_info.data_buf.direct_data +=
165211 sprintf(pm8001_ha->forensic_info.data_buf.direct_data,
166212 "%08x ", 3);
167
- for (index = 0; index < (SYSFS_OFFSET / 4); index++) {
213
+ for (index = 0; index <
214
+ (pm8001_ha->forensic_info.data_buf.direct_len
215
+ / 4); index++) {
168216 pm8001_ha->forensic_info.data_buf.direct_data +=
169
- sprintf(pm8001_ha->
170
- forensic_info.data_buf.direct_data,
171
- "%08x ", *(temp + index));
217
+ sprintf(
218
+ pm8001_ha->forensic_info.data_buf.direct_data,
219
+ "%08x ", *(temp + index));
172220 }
173221
174222 pm8001_ha->fatal_bar_loc = 0;
175223 pm8001_ha->forensic_fatal_step = 1;
176224 pm8001_ha->fatal_forensic_shift_offset = 0;
177225 pm8001_ha->forensic_last_offset = 0;
226
+ status = 0;
227
+ offset = (int)
228
+ ((char *)pm8001_ha->forensic_info.data_buf.direct_data
229
+ - (char *)buf);
230
+ pm8001_dbg(pm8001_ha, IO,
231
+ "get_fatal_spcv:return1 0x%x\n", offset);
178232 return (char *)pm8001_ha->
179233 forensic_info.data_buf.direct_data -
180234 (char *)buf;
....@@ -184,12 +238,20 @@
184238 sprintf(pm8001_ha->
185239 forensic_info.data_buf.direct_data,
186240 "%08x ", 2);
187
- for (index = 0; index < (SYSFS_OFFSET / 4); index++) {
188
- pm8001_ha->forensic_info.data_buf.direct_data +=
189
- sprintf(pm8001_ha->
241
+ for (index = 0; index <
242
+ (pm8001_ha->forensic_info.data_buf.direct_len
243
+ / 4); index++) {
244
+ pm8001_ha->forensic_info.data_buf.direct_data
245
+ += sprintf(pm8001_ha->
190246 forensic_info.data_buf.direct_data,
191247 "%08x ", *(temp + index));
192248 }
249
+ status = 0;
250
+ offset = (int)
251
+ ((char *)pm8001_ha->forensic_info.data_buf.direct_data
252
+ - (char *)buf);
253
+ pm8001_dbg(pm8001_ha, IO,
254
+ "get_fatal_spcv:return2 0x%x\n", offset);
193255 return (char *)pm8001_ha->
194256 forensic_info.data_buf.direct_data -
195257 (char *)buf;
....@@ -199,65 +261,252 @@
199261 pm8001_ha->forensic_info.data_buf.direct_data +=
200262 sprintf(pm8001_ha->forensic_info.data_buf.direct_data,
201263 "%08x ", 2);
202
- for (index = 0; index < 256; index++) {
264
+ for (index = 0; index <
265
+ (pm8001_ha->forensic_info.data_buf.direct_len
266
+ / 4) ; index++) {
203267 pm8001_ha->forensic_info.data_buf.direct_data +=
204268 sprintf(pm8001_ha->
205
- forensic_info.data_buf.direct_data,
206
- "%08x ", *(temp + index));
269
+ forensic_info.data_buf.direct_data,
270
+ "%08x ", *(temp + index));
207271 }
208272 pm8001_ha->fatal_forensic_shift_offset += 0x100;
209273 pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER,
210274 pm8001_ha->fatal_forensic_shift_offset);
211275 pm8001_ha->fatal_bar_loc = 0;
276
+ status = 0;
277
+ offset = (int)
278
+ ((char *)pm8001_ha->forensic_info.data_buf.direct_data
279
+ - (char *)buf);
280
+ pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return3 0x%x\n",
281
+ offset);
212282 return (char *)pm8001_ha->forensic_info.data_buf.direct_data -
213283 (char *)buf;
214284 }
215285 if (pm8001_ha->forensic_fatal_step == 1) {
216
- pm8001_ha->fatal_forensic_shift_offset = 0;
217
- /* Read 64K of the debug data. */
218
- pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER,
219
- pm8001_ha->fatal_forensic_shift_offset);
220
- pm8001_mw32(fatal_table_address,
221
- MPI_FATAL_EDUMP_TABLE_HANDSHAKE,
286
+ /* store previous accumulated length before triggering next
287
+ * accumulated length update
288
+ */
289
+ pm8001_ha->forensic_preserved_accumulated_transfer =
290
+ pm8001_mr32(fatal_table_address,
291
+ MPI_FATAL_EDUMP_TABLE_ACCUM_LEN);
292
+
293
+ /* continue capturing the fatal log until Dump status is 0x3 */
294
+ if (pm8001_mr32(fatal_table_address,
295
+ MPI_FATAL_EDUMP_TABLE_STATUS) <
296
+ MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) {
297
+
298
+ /* reset fddstat bit by writing to zero*/
299
+ pm8001_mw32(fatal_table_address,
300
+ MPI_FATAL_EDUMP_TABLE_STATUS, 0x0);
301
+
302
+ /* set dump control value to '1' so that new data will
303
+ * be transferred to shared memory
304
+ */
305
+ pm8001_mw32(fatal_table_address,
306
+ MPI_FATAL_EDUMP_TABLE_HANDSHAKE,
222307 MPI_FATAL_EDUMP_HANDSHAKE_RDY);
223308
224
- /* Poll FDDHSHK until clear */
225
- start = jiffies + (2 * HZ); /* 2 sec */
309
+ /*Poll FDDHSHK until clear */
310
+ start = jiffies + (2 * HZ); /* 2 sec */
226311
227
- do {
228
- reg_val = pm8001_mr32(fatal_table_address,
312
+ do {
313
+ reg_val = pm8001_mr32(fatal_table_address,
229314 MPI_FATAL_EDUMP_TABLE_HANDSHAKE);
230
- } while ((reg_val) && time_before(jiffies, start));
315
+ } while ((reg_val) && time_before(jiffies, start));
231316
232
- if (reg_val != 0) {
233
- PM8001_FAIL_DBG(pm8001_ha,
234
- pm8001_printk("TIMEOUT:MEMBASE_II_SHIFT_REGISTER"
235
- " = 0x%x\n", reg_val));
236
- return -EIO;
237
- }
317
+ if (reg_val != 0) {
318
+ pm8001_dbg(pm8001_ha, FAIL,
319
+ "TIMEOUT:MPI_FATAL_EDUMP_TABLE_HDSHAKE 0x%x\n",
320
+ reg_val);
321
+ /* Fail the dump if a timeout occurs */
322
+ pm8001_ha->forensic_info.data_buf.direct_data +=
323
+ sprintf(
324
+ pm8001_ha->forensic_info.data_buf.direct_data,
325
+ "%08x ", 0xFFFFFFFF);
326
+ return((char *)
327
+ pm8001_ha->forensic_info.data_buf.direct_data
328
+ - (char *)buf);
329
+ }
330
+ /* Poll status register until set to 2 or
331
+ * 3 for up to 2 seconds
332
+ */
333
+ start = jiffies + (2 * HZ); /* 2 sec */
238334
239
- /* Read the next 64K of the debug data. */
240
- pm8001_ha->forensic_fatal_step = 0;
241
- if (pm8001_mr32(fatal_table_address,
242
- MPI_FATAL_EDUMP_TABLE_STATUS) !=
243
- MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) {
244
- pm8001_mw32(fatal_table_address,
245
- MPI_FATAL_EDUMP_TABLE_HANDSHAKE, 0);
246
- goto moreData;
247
- } else {
248
- pm8001_ha->forensic_info.data_buf.direct_data +=
249
- sprintf(pm8001_ha->
250
- forensic_info.data_buf.direct_data,
251
- "%08x ", 4);
252
- pm8001_ha->forensic_info.data_buf.read_len = 0xFFFFFFFF;
253
- pm8001_ha->forensic_info.data_buf.direct_len = 0;
254
- pm8001_ha->forensic_info.data_buf.direct_offset = 0;
255
- pm8001_ha->forensic_info.data_buf.read_len = 0;
335
+ do {
336
+ reg_val = pm8001_mr32(fatal_table_address,
337
+ MPI_FATAL_EDUMP_TABLE_STATUS);
338
+ } while (((reg_val != 2) && (reg_val != 3)) &&
339
+ time_before(jiffies, start));
340
+
341
+ if (reg_val < 2) {
342
+ pm8001_dbg(pm8001_ha, FAIL,
343
+ "TIMEOUT:MPI_FATAL_EDUMP_TABLE_STATUS = 0x%x\n",
344
+ reg_val);
345
+ /* Fail the dump if a timeout occurs */
346
+ pm8001_ha->forensic_info.data_buf.direct_data +=
347
+ sprintf(
348
+ pm8001_ha->forensic_info.data_buf.direct_data,
349
+ "%08x ", 0xFFFFFFFF);
350
+ pm8001_cw32(pm8001_ha, 0,
351
+ MEMBASE_II_SHIFT_REGISTER,
352
+ pm8001_ha->fatal_forensic_shift_offset);
353
+ }
354
+ /* Read the next block of the debug data.*/
355
+ length_to_read = pm8001_mr32(fatal_table_address,
356
+ MPI_FATAL_EDUMP_TABLE_ACCUM_LEN) -
357
+ pm8001_ha->forensic_preserved_accumulated_transfer;
358
+ if (length_to_read != 0x0) {
359
+ pm8001_ha->forensic_fatal_step = 0;
360
+ goto moreData;
361
+ } else {
362
+ pm8001_ha->forensic_info.data_buf.direct_data +=
363
+ sprintf(
364
+ pm8001_ha->forensic_info.data_buf.direct_data,
365
+ "%08x ", 4);
366
+ pm8001_ha->forensic_info.data_buf.read_len
367
+ = 0xFFFFFFFF;
368
+ pm8001_ha->forensic_info.data_buf.direct_len
369
+ = 0;
370
+ pm8001_ha->forensic_info.data_buf.direct_offset
371
+ = 0;
372
+ pm8001_ha->forensic_info.data_buf.read_len = 0;
373
+ }
256374 }
257375 }
258
-
376
+ offset = (int)((char *)pm8001_ha->forensic_info.data_buf.direct_data
377
+ - (char *)buf);
378
+ pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return4 0x%x\n", offset);
259379 return (char *)pm8001_ha->forensic_info.data_buf.direct_data -
260380 (char *)buf;
381
+}
382
+
383
+/* pm80xx_get_non_fatal_dump - dump the nonfatal data from the dma
384
+ * location by the firmware.
385
+ */
386
+ssize_t pm80xx_get_non_fatal_dump(struct device *cdev,
387
+ struct device_attribute *attr, char *buf)
388
+{
389
+ struct Scsi_Host *shost = class_to_shost(cdev);
390
+ struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
391
+ struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
392
+ void __iomem *nonfatal_table_address = pm8001_ha->fatal_tbl_addr;
393
+ u32 accum_len = 0;
394
+ u32 total_len = 0;
395
+ u32 reg_val = 0;
396
+ u32 *temp = NULL;
397
+ u32 index = 0;
398
+ u32 output_length;
399
+ unsigned long start = 0;
400
+ char *buf_copy = buf;
401
+
402
+ temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr;
403
+ if (++pm8001_ha->non_fatal_count == 1) {
404
+ if (pm8001_ha->chip_id == chip_8001) {
405
+ snprintf(pm8001_ha->forensic_info.data_buf.direct_data,
406
+ PAGE_SIZE, "Not supported for SPC controller");
407
+ return 0;
408
+ }
409
+ pm8001_dbg(pm8001_ha, IO, "forensic_info TYPE_NON_FATAL...\n");
410
+ /*
411
+ * Step 1: Write the host buffer parameters in the MPI Fatal and
412
+ * Non-Fatal Error Dump Capture Table.This is the buffer
413
+ * where debug data will be DMAed to.
414
+ */
415
+ pm8001_mw32(nonfatal_table_address,
416
+ MPI_FATAL_EDUMP_TABLE_LO_OFFSET,
417
+ pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_lo);
418
+
419
+ pm8001_mw32(nonfatal_table_address,
420
+ MPI_FATAL_EDUMP_TABLE_HI_OFFSET,
421
+ pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_hi);
422
+
423
+ pm8001_mw32(nonfatal_table_address,
424
+ MPI_FATAL_EDUMP_TABLE_LENGTH, SYSFS_OFFSET);
425
+
426
+ /* Optionally, set the DUMPCTRL bit to 1 if the host
427
+ * keeps sending active I/Os while capturing the non-fatal
428
+ * debug data. Otherwise, leave this bit set to zero
429
+ */
430
+ pm8001_mw32(nonfatal_table_address,
431
+ MPI_FATAL_EDUMP_TABLE_HANDSHAKE, MPI_FATAL_EDUMP_HANDSHAKE_RDY);
432
+
433
+ /*
434
+ * Step 2: Clear Accumulative Length of Debug Data Transferred
435
+ * [ACCDDLEN] field in the MPI Fatal and Non-Fatal Error Dump
436
+ * Capture Table to zero.
437
+ */
438
+ pm8001_mw32(nonfatal_table_address,
439
+ MPI_FATAL_EDUMP_TABLE_ACCUM_LEN, 0);
440
+
441
+ /* initiallize previous accumulated length to 0 */
442
+ pm8001_ha->forensic_preserved_accumulated_transfer = 0;
443
+ pm8001_ha->non_fatal_read_length = 0;
444
+ }
445
+
446
+ total_len = pm8001_mr32(nonfatal_table_address,
447
+ MPI_FATAL_EDUMP_TABLE_TOTAL_LEN);
448
+ /*
449
+ * Step 3:Clear Fatal/Non-Fatal Debug Data Transfer Status [FDDTSTAT]
450
+ * field and then request that the SPCv controller transfer the debug
451
+ * data by setting bit 7 of the Inbound Doorbell Set Register.
452
+ */
453
+ pm8001_mw32(nonfatal_table_address, MPI_FATAL_EDUMP_TABLE_STATUS, 0);
454
+ pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET,
455
+ SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP);
456
+
457
+ /*
458
+ * Step 4.1: Read back the Inbound Doorbell Set Register (by polling for
459
+ * 2 seconds) until register bit 7 is cleared.
460
+ * This step only indicates the request is accepted by the controller.
461
+ */
462
+ start = jiffies + (2 * HZ); /* 2 sec */
463
+ do {
464
+ reg_val = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET) &
465
+ SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP;
466
+ } while ((reg_val != 0) && time_before(jiffies, start));
467
+
468
+ /* Step 4.2: To check the completion of the transfer, poll the Fatal/Non
469
+ * Fatal Debug Data Transfer Status [FDDTSTAT] field for 2 seconds in
470
+ * the MPI Fatal and Non-Fatal Error Dump Capture Table.
471
+ */
472
+ start = jiffies + (2 * HZ); /* 2 sec */
473
+ do {
474
+ reg_val = pm8001_mr32(nonfatal_table_address,
475
+ MPI_FATAL_EDUMP_TABLE_STATUS);
476
+ } while ((!reg_val) && time_before(jiffies, start));
477
+
478
+ if ((reg_val == 0x00) ||
479
+ (reg_val == MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED) ||
480
+ (reg_val > MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE)) {
481
+ pm8001_ha->non_fatal_read_length = 0;
482
+ buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 0xFFFFFFFF);
483
+ pm8001_ha->non_fatal_count = 0;
484
+ return (buf_copy - buf);
485
+ } else if (reg_val ==
486
+ MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA) {
487
+ buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 2);
488
+ } else if ((reg_val == MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) ||
489
+ (pm8001_ha->non_fatal_read_length >= total_len)) {
490
+ pm8001_ha->non_fatal_read_length = 0;
491
+ buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 4);
492
+ pm8001_ha->non_fatal_count = 0;
493
+ }
494
+ accum_len = pm8001_mr32(nonfatal_table_address,
495
+ MPI_FATAL_EDUMP_TABLE_ACCUM_LEN);
496
+ output_length = accum_len -
497
+ pm8001_ha->forensic_preserved_accumulated_transfer;
498
+
499
+ for (index = 0; index < output_length/4; index++)
500
+ buf_copy += snprintf(buf_copy, PAGE_SIZE,
501
+ "%08x ", *(temp+index));
502
+
503
+ pm8001_ha->non_fatal_read_length += output_length;
504
+
505
+ /* store current accumulated length to use in next iteration as
506
+ * the previous accumulated length
507
+ */
508
+ pm8001_ha->forensic_preserved_accumulated_transfer = accum_len;
509
+ return (buf_copy - buf);
261510 }
262511
263512 /**
....@@ -317,6 +566,25 @@
317566 pm8001_mr32(address, MAIN_MPI_ILA_RELEASE_TYPE);
318567 pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version =
319568 pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION);
569
+
570
+ pm8001_dbg(pm8001_ha, DEV,
571
+ "Main cfg table: sign:%x interface rev:%x fw_rev:%x\n",
572
+ pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature,
573
+ pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev,
574
+ pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev);
575
+
576
+ pm8001_dbg(pm8001_ha, DEV,
577
+ "table offset: gst:%x iq:%x oq:%x int vec:%x phy attr:%x\n",
578
+ pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset,
579
+ pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset,
580
+ pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset,
581
+ pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset,
582
+ pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset);
583
+
584
+ pm8001_dbg(pm8001_ha, DEV,
585
+ "Main cfg table; ila rev:%x Inactive fw rev:%x\n",
586
+ pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version,
587
+ pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version);
320588 }
321589
322590 /**
....@@ -438,7 +706,7 @@
438706 {
439707 int i;
440708 void __iomem *address = pm8001_ha->inbnd_q_tbl_addr;
441
- for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) {
709
+ for (i = 0; i < PM8001_MAX_INB_NUM; i++) {
442710 u32 offset = i * 0x20;
443711 pm8001_ha->inbnd_q_tbl[i].pi_pci_bar =
444712 get_pci_bar_index(pm8001_mr32(address,
....@@ -456,7 +724,7 @@
456724 {
457725 int i;
458726 void __iomem *address = pm8001_ha->outbnd_q_tbl_addr;
459
- for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) {
727
+ for (i = 0; i < PM8001_MAX_OUTB_NUM; i++) {
460728 u32 offset = i * 0x24;
461729 pm8001_ha->outbnd_q_tbl[i].ci_pci_bar =
462730 get_pci_bar_index(pm8001_mr32(address,
....@@ -476,6 +744,10 @@
476744 u32 offsetib, offsetob;
477745 void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr;
478746 void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr;
747
+ u32 ib_offset = pm8001_ha->ib_offset;
748
+ u32 ob_offset = pm8001_ha->ob_offset;
749
+ u32 ci_offset = pm8001_ha->ci_offset;
750
+ u32 pi_offset = pm8001_ha->pi_offset;
479751
480752 pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr =
481753 pm8001_ha->memoryMap.region[AAP1].phys_addr_hi;
....@@ -493,26 +765,30 @@
493765 pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = 0x01;
494766 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = 0x01;
495767
768
+ /* Enable higher IQs and OQs, 32 to 63, bit 16 */
769
+ if (pm8001_ha->max_q_num > 32)
770
+ pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |=
771
+ 1 << 16;
496772 /* Disable end to end CRC checking */
497773 pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16);
498774
499
- for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) {
775
+ for (i = 0; i < pm8001_ha->max_q_num; i++) {
500776 pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt =
501777 PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x00<<30);
502778 pm8001_ha->inbnd_q_tbl[i].upper_base_addr =
503
- pm8001_ha->memoryMap.region[IB + i].phys_addr_hi;
779
+ pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_hi;
504780 pm8001_ha->inbnd_q_tbl[i].lower_base_addr =
505
- pm8001_ha->memoryMap.region[IB + i].phys_addr_lo;
781
+ pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_lo;
506782 pm8001_ha->inbnd_q_tbl[i].base_virt =
507
- (u8 *)pm8001_ha->memoryMap.region[IB + i].virt_ptr;
783
+ (u8 *)pm8001_ha->memoryMap.region[ib_offset + i].virt_ptr;
508784 pm8001_ha->inbnd_q_tbl[i].total_length =
509
- pm8001_ha->memoryMap.region[IB + i].total_len;
785
+ pm8001_ha->memoryMap.region[ib_offset + i].total_len;
510786 pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr =
511
- pm8001_ha->memoryMap.region[CI + i].phys_addr_hi;
787
+ pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_hi;
512788 pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr =
513
- pm8001_ha->memoryMap.region[CI + i].phys_addr_lo;
789
+ pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_lo;
514790 pm8001_ha->inbnd_q_tbl[i].ci_virt =
515
- pm8001_ha->memoryMap.region[CI + i].virt_ptr;
791
+ pm8001_ha->memoryMap.region[ci_offset + i].virt_ptr;
516792 offsetib = i * 0x20;
517793 pm8001_ha->inbnd_q_tbl[i].pi_pci_bar =
518794 get_pci_bar_index(pm8001_mr32(addressib,
....@@ -521,26 +797,31 @@
521797 pm8001_mr32(addressib, (offsetib + 0x18));
522798 pm8001_ha->inbnd_q_tbl[i].producer_idx = 0;
523799 pm8001_ha->inbnd_q_tbl[i].consumer_index = 0;
800
+
801
+ pm8001_dbg(pm8001_ha, DEV,
802
+ "IQ %d pi_bar 0x%x pi_offset 0x%x\n", i,
803
+ pm8001_ha->inbnd_q_tbl[i].pi_pci_bar,
804
+ pm8001_ha->inbnd_q_tbl[i].pi_offset);
524805 }
525
- for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) {
806
+ for (i = 0; i < pm8001_ha->max_q_num; i++) {
526807 pm8001_ha->outbnd_q_tbl[i].element_size_cnt =
527808 PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x01<<30);
528809 pm8001_ha->outbnd_q_tbl[i].upper_base_addr =
529
- pm8001_ha->memoryMap.region[OB + i].phys_addr_hi;
810
+ pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_hi;
530811 pm8001_ha->outbnd_q_tbl[i].lower_base_addr =
531
- pm8001_ha->memoryMap.region[OB + i].phys_addr_lo;
812
+ pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_lo;
532813 pm8001_ha->outbnd_q_tbl[i].base_virt =
533
- (u8 *)pm8001_ha->memoryMap.region[OB + i].virt_ptr;
814
+ (u8 *)pm8001_ha->memoryMap.region[ob_offset + i].virt_ptr;
534815 pm8001_ha->outbnd_q_tbl[i].total_length =
535
- pm8001_ha->memoryMap.region[OB + i].total_len;
816
+ pm8001_ha->memoryMap.region[ob_offset + i].total_len;
536817 pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr =
537
- pm8001_ha->memoryMap.region[PI + i].phys_addr_hi;
818
+ pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_hi;
538819 pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr =
539
- pm8001_ha->memoryMap.region[PI + i].phys_addr_lo;
820
+ pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_lo;
540821 /* interrupt vector based on oq */
541822 pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = (i << 24);
542823 pm8001_ha->outbnd_q_tbl[i].pi_virt =
543
- pm8001_ha->memoryMap.region[PI + i].virt_ptr;
824
+ pm8001_ha->memoryMap.region[pi_offset + i].virt_ptr;
544825 offsetob = i * 0x24;
545826 pm8001_ha->outbnd_q_tbl[i].ci_pci_bar =
546827 get_pci_bar_index(pm8001_mr32(addressob,
....@@ -549,6 +830,11 @@
549830 pm8001_mr32(addressob, (offsetob + 0x18));
550831 pm8001_ha->outbnd_q_tbl[i].consumer_idx = 0;
551832 pm8001_ha->outbnd_q_tbl[i].producer_index = 0;
833
+
834
+ pm8001_dbg(pm8001_ha, DEV,
835
+ "OQ %d ci_bar 0x%x ci_offset 0x%x\n", i,
836
+ pm8001_ha->outbnd_q_tbl[i].ci_pci_bar,
837
+ pm8001_ha->outbnd_q_tbl[i].ci_offset);
552838 }
553839 }
554840
....@@ -579,9 +865,13 @@
579865 pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity);
580866 /* Update Fatal error interrupt vector */
581867 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |=
582
- ((pm8001_ha->number_of_intr - 1) << 8);
868
+ ((pm8001_ha->max_q_num - 1) << 8);
583869 pm8001_mw32(address, MAIN_FATAL_ERROR_INTERRUPT,
584870 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt);
871
+ pm8001_dbg(pm8001_ha, DEV,
872
+ "Updated Fatal error interrupt vector 0x%x\n",
873
+ pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT));
874
+
585875 pm8001_mw32(address, MAIN_EVENT_CRC_CHECK,
586876 pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump);
587877
....@@ -591,6 +881,9 @@
591881 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping |= 0x20000000;
592882 pm8001_mw32(address, MAIN_GPIO_LED_FLAGS_OFFSET,
593883 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping);
884
+ pm8001_dbg(pm8001_ha, DEV,
885
+ "Programming DW 0x21 in main cfg table with 0x%x\n",
886
+ pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET));
594887
595888 pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER,
596889 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer);
....@@ -613,6 +906,7 @@
613906 /**
614907 * update_inbnd_queue_table - update the inbound queue table to the HBA.
615908 * @pm8001_ha: our hba card information
909
+ * @number: entry in the queue
616910 */
617911 static void update_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha,
618912 int number)
....@@ -629,11 +923,27 @@
629923 pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr);
630924 pm8001_mw32(address, offset + IB_CI_BASE_ADDR_LO_OFFSET,
631925 pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr);
926
+
927
+ pm8001_dbg(pm8001_ha, DEV,
928
+ "IQ %d: Element pri size 0x%x\n",
929
+ number,
930
+ pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt);
931
+
932
+ pm8001_dbg(pm8001_ha, DEV,
933
+ "IQ upr base addr 0x%x IQ lwr base addr 0x%x\n",
934
+ pm8001_ha->inbnd_q_tbl[number].upper_base_addr,
935
+ pm8001_ha->inbnd_q_tbl[number].lower_base_addr);
936
+
937
+ pm8001_dbg(pm8001_ha, DEV,
938
+ "CI upper base addr 0x%x CI lower base addr 0x%x\n",
939
+ pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr,
940
+ pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr);
632941 }
633942
634943 /**
635944 * update_outbnd_queue_table - update the outbound queue table to the HBA.
636945 * @pm8001_ha: our hba card information
946
+ * @number: entry in the queue
637947 */
638948 static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha,
639949 int number)
....@@ -652,6 +962,21 @@
652962 pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr);
653963 pm8001_mw32(address, offset + OB_INTERRUPT_COALES_OFFSET,
654964 pm8001_ha->outbnd_q_tbl[number].interrup_vec_cnt_delay);
965
+
966
+ pm8001_dbg(pm8001_ha, DEV,
967
+ "OQ %d: Element pri size 0x%x\n",
968
+ number,
969
+ pm8001_ha->outbnd_q_tbl[number].element_size_cnt);
970
+
971
+ pm8001_dbg(pm8001_ha, DEV,
972
+ "OQ upr base addr 0x%x OQ lwr base addr 0x%x\n",
973
+ pm8001_ha->outbnd_q_tbl[number].upper_base_addr,
974
+ pm8001_ha->outbnd_q_tbl[number].lower_base_addr);
975
+
976
+ pm8001_dbg(pm8001_ha, DEV,
977
+ "PI upper base addr 0x%x PI lower base addr 0x%x\n",
978
+ pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr,
979
+ pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr);
655980 }
656981
657982 /**
....@@ -669,9 +994,9 @@
669994 pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_UPDATE);
670995 /* wait until Inbound DoorBell Clear Register toggled */
671996 if (IS_SPCV_12G(pm8001_ha->pdev)) {
672
- max_wait_count = 4 * 1000 * 1000;/* 4 sec */
997
+ max_wait_count = SPCV_DOORBELL_CLEAR_TIMEOUT;
673998 } else {
674
- max_wait_count = 2 * 1000 * 1000;/* 2 sec */
999
+ max_wait_count = SPC_DOORBELL_CLEAR_TIMEOUT;
6751000 }
6761001 do {
6771002 udelay(1);
....@@ -679,8 +1004,13 @@
6791004 value &= SPCv_MSGU_CFG_TABLE_UPDATE;
6801005 } while ((value != 0) && (--max_wait_count));
6811006
682
- if (!max_wait_count)
683
- return -1;
1007
+ if (!max_wait_count) {
1008
+ /* additional check */
1009
+ pm8001_dbg(pm8001_ha, FAIL,
1010
+ "Inb doorbell clear not toggled[value:%x]\n",
1011
+ value);
1012
+ return -EBUSY;
1013
+ }
6841014 /* check the MPI-State for initialization upto 100ms*/
6851015 max_wait_count = 100 * 1000;/* 100 msec */
6861016 do {
....@@ -691,12 +1021,19 @@
6911021 } while ((GST_MPI_STATE_INIT !=
6921022 (gst_len_mpistate & GST_MPI_STATE_MASK)) && (--max_wait_count));
6931023 if (!max_wait_count)
694
- return -1;
1024
+ return -EBUSY;
6951025
6961026 /* check MPI Initialization error */
6971027 gst_len_mpistate = gst_len_mpistate >> 16;
6981028 if (0x0000 != gst_len_mpistate)
699
- return -1;
1029
+ return -EBUSY;
1030
+
1031
+ /*
1032
+ * As per controller datasheet, after successful MPI
1033
+ * initialization minimum 500ms delay is required before
1034
+ * issuing commands.
1035
+ */
1036
+ msleep(500);
7001037
7011038 return 0;
7021039 }
....@@ -729,9 +1066,9 @@
7291066 if (!max_wait_count)
7301067 ret = -1;
7311068 else {
732
- PM8001_MSG_DBG(pm8001_ha,
733
- pm8001_printk(" ila ready status in %d millisec\n",
734
- (max_wait_time - max_wait_count)));
1069
+ pm8001_dbg(pm8001_ha, MSG,
1070
+ " ila ready status in %d millisec\n",
1071
+ (max_wait_time - max_wait_count));
7351072 }
7361073
7371074 /* check RAAE status */
....@@ -744,9 +1081,9 @@
7441081 if (!max_wait_count)
7451082 ret = -1;
7461083 else {
747
- PM8001_MSG_DBG(pm8001_ha,
748
- pm8001_printk(" raae ready status in %d millisec\n",
749
- (max_wait_time - max_wait_count)));
1084
+ pm8001_dbg(pm8001_ha, MSG,
1085
+ " raae ready status in %d millisec\n",
1086
+ (max_wait_time - max_wait_count));
7501087 }
7511088
7521089 /* check iop0 status */
....@@ -759,9 +1096,9 @@
7591096 if (!max_wait_count)
7601097 ret = -1;
7611098 else {
762
- PM8001_MSG_DBG(pm8001_ha,
763
- pm8001_printk(" iop0 ready status in %d millisec\n",
764
- (max_wait_time - max_wait_count)));
1099
+ pm8001_dbg(pm8001_ha, MSG,
1100
+ " iop0 ready status in %d millisec\n",
1101
+ (max_wait_time - max_wait_count));
7651102 }
7661103
7671104 /* check iop1 status only for 16 port controllers */
....@@ -777,9 +1114,9 @@
7771114 if (!max_wait_count)
7781115 ret = -1;
7791116 else {
780
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
781
- "iop1 ready status in %d millisec\n",
782
- (max_wait_time - max_wait_count)));
1117
+ pm8001_dbg(pm8001_ha, MSG,
1118
+ "iop1 ready status in %d millisec\n",
1119
+ (max_wait_time - max_wait_count));
7831120 }
7841121 }
7851122
....@@ -797,13 +1134,11 @@
7971134 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0);
7981135 offset = value & 0x03FFFFFF; /* scratch pad 0 TBL address */
7991136
800
- PM8001_INIT_DBG(pm8001_ha,
801
- pm8001_printk("Scratchpad 0 Offset: 0x%x value 0x%x\n",
802
- offset, value));
1137
+ pm8001_dbg(pm8001_ha, DEV, "Scratchpad 0 Offset: 0x%x value 0x%x\n",
1138
+ offset, value);
8031139 pcilogic = (value & 0xFC000000) >> 26;
8041140 pcibar = get_pci_bar_index(pcilogic);
805
- PM8001_INIT_DBG(pm8001_ha,
806
- pm8001_printk("Scratchpad 0 PCI BAR: %d\n", pcibar));
1141
+ pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar);
8071142 pm8001_ha->main_cfg_tbl_addr = base_addr =
8081143 pm8001_ha->io_mem[pcibar].memvirtaddr + offset;
8091144 pm8001_ha->general_stat_tbl_addr =
....@@ -825,33 +1160,25 @@
8251160 base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0xA0) &
8261161 0xFFFFFF);
8271162
828
- PM8001_INIT_DBG(pm8001_ha,
829
- pm8001_printk("GST OFFSET 0x%x\n",
830
- pm8001_cr32(pm8001_ha, pcibar, offset + 0x18)));
831
- PM8001_INIT_DBG(pm8001_ha,
832
- pm8001_printk("INBND OFFSET 0x%x\n",
833
- pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C)));
834
- PM8001_INIT_DBG(pm8001_ha,
835
- pm8001_printk("OBND OFFSET 0x%x\n",
836
- pm8001_cr32(pm8001_ha, pcibar, offset + 0x20)));
837
- PM8001_INIT_DBG(pm8001_ha,
838
- pm8001_printk("IVT OFFSET 0x%x\n",
839
- pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C)));
840
- PM8001_INIT_DBG(pm8001_ha,
841
- pm8001_printk("PSPA OFFSET 0x%x\n",
842
- pm8001_cr32(pm8001_ha, pcibar, offset + 0x90)));
843
- PM8001_INIT_DBG(pm8001_ha,
844
- pm8001_printk("addr - main cfg %p general status %p\n",
845
- pm8001_ha->main_cfg_tbl_addr,
846
- pm8001_ha->general_stat_tbl_addr));
847
- PM8001_INIT_DBG(pm8001_ha,
848
- pm8001_printk("addr - inbnd %p obnd %p\n",
849
- pm8001_ha->inbnd_q_tbl_addr,
850
- pm8001_ha->outbnd_q_tbl_addr));
851
- PM8001_INIT_DBG(pm8001_ha,
852
- pm8001_printk("addr - pspa %p ivt %p\n",
853
- pm8001_ha->pspa_q_tbl_addr,
854
- pm8001_ha->ivt_tbl_addr));
1163
+ pm8001_dbg(pm8001_ha, INIT, "GST OFFSET 0x%x\n",
1164
+ pm8001_cr32(pm8001_ha, pcibar, offset + 0x18));
1165
+ pm8001_dbg(pm8001_ha, INIT, "INBND OFFSET 0x%x\n",
1166
+ pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C));
1167
+ pm8001_dbg(pm8001_ha, INIT, "OBND OFFSET 0x%x\n",
1168
+ pm8001_cr32(pm8001_ha, pcibar, offset + 0x20));
1169
+ pm8001_dbg(pm8001_ha, INIT, "IVT OFFSET 0x%x\n",
1170
+ pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C));
1171
+ pm8001_dbg(pm8001_ha, INIT, "PSPA OFFSET 0x%x\n",
1172
+ pm8001_cr32(pm8001_ha, pcibar, offset + 0x90));
1173
+ pm8001_dbg(pm8001_ha, INIT, "addr - main cfg %p general status %p\n",
1174
+ pm8001_ha->main_cfg_tbl_addr,
1175
+ pm8001_ha->general_stat_tbl_addr);
1176
+ pm8001_dbg(pm8001_ha, INIT, "addr - inbnd %p obnd %p\n",
1177
+ pm8001_ha->inbnd_q_tbl_addr,
1178
+ pm8001_ha->outbnd_q_tbl_addr);
1179
+ pm8001_dbg(pm8001_ha, INIT, "addr - pspa %p ivt %p\n",
1180
+ pm8001_ha->pspa_q_tbl_addr,
1181
+ pm8001_ha->ivt_tbl_addr);
8551182 }
8561183
8571184 /**
....@@ -881,11 +1208,18 @@
8811208 else
8821209 page_code = THERMAL_PAGE_CODE_8H;
8831210
884
- payload.cfg_pg[0] = (THERMAL_LOG_ENABLE << 9) |
885
- (THERMAL_ENABLE << 8) | page_code;
886
- payload.cfg_pg[1] = (LTEMPHIL << 24) | (RTEMPHIL << 8);
1211
+ payload.cfg_pg[0] =
1212
+ cpu_to_le32((THERMAL_LOG_ENABLE << 9) |
1213
+ (THERMAL_ENABLE << 8) | page_code);
1214
+ payload.cfg_pg[1] =
1215
+ cpu_to_le32((LTEMPHIL << 24) | (RTEMPHIL << 8));
8871216
888
- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
1217
+ pm8001_dbg(pm8001_ha, DEV,
1218
+ "Setting up thermal config. cfg_pg 0 0x%x cfg_pg 1 0x%x\n",
1219
+ payload.cfg_pg[0], payload.cfg_pg[1]);
1220
+
1221
+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
1222
+ sizeof(payload), 0);
8891223 if (rc)
8901224 pm8001_tag_free(pm8001_ha, tag);
8911225 return rc;
....@@ -918,56 +1252,47 @@
9181252 circularQ = &pm8001_ha->inbnd_q_tbl[0];
9191253 payload.tag = cpu_to_le32(tag);
9201254
921
- SASConfigPage.pageCode = SAS_PROTOCOL_TIMER_CONFIG_PAGE;
922
- SASConfigPage.MST_MSI = 3 << 15;
923
- SASConfigPage.STP_SSP_MCT_TMO = (STP_MCT_TMO << 16) | SSP_MCT_TMO;
924
- SASConfigPage.STP_FRM_TMO = (SAS_MAX_OPEN_TIME << 24) |
925
- (SMP_MAX_CONN_TIMER << 16) | STP_FRM_TIMER;
926
- SASConfigPage.STP_IDLE_TMO = STP_IDLE_TIME;
1255
+ SASConfigPage.pageCode = cpu_to_le32(SAS_PROTOCOL_TIMER_CONFIG_PAGE);
1256
+ SASConfigPage.MST_MSI = cpu_to_le32(3 << 15);
1257
+ SASConfigPage.STP_SSP_MCT_TMO =
1258
+ cpu_to_le32((STP_MCT_TMO << 16) | SSP_MCT_TMO);
1259
+ SASConfigPage.STP_FRM_TMO =
1260
+ cpu_to_le32((SAS_MAX_OPEN_TIME << 24) |
1261
+ (SMP_MAX_CONN_TIMER << 16) | STP_FRM_TIMER);
1262
+ SASConfigPage.STP_IDLE_TMO = cpu_to_le32(STP_IDLE_TIME);
9271263
928
- if (SASConfigPage.STP_IDLE_TMO > 0x3FFFFFF)
929
- SASConfigPage.STP_IDLE_TMO = 0x3FFFFFF;
1264
+ SASConfigPage.OPNRJT_RTRY_INTVL =
1265
+ cpu_to_le32((SAS_MFD << 16) | SAS_OPNRJT_RTRY_INTVL);
1266
+ SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO =
1267
+ cpu_to_le32((SAS_DOPNRJT_RTRY_TMO << 16) | SAS_COPNRJT_RTRY_TMO);
1268
+ SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR =
1269
+ cpu_to_le32((SAS_DOPNRJT_RTRY_THR << 16) | SAS_COPNRJT_RTRY_THR);
1270
+ SASConfigPage.MAX_AIP = cpu_to_le32(SAS_MAX_AIP);
9301271
931
-
932
- SASConfigPage.OPNRJT_RTRY_INTVL = (SAS_MFD << 16) |
933
- SAS_OPNRJT_RTRY_INTVL;
934
- SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO = (SAS_DOPNRJT_RTRY_TMO << 16)
935
- | SAS_COPNRJT_RTRY_TMO;
936
- SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR = (SAS_DOPNRJT_RTRY_THR << 16)
937
- | SAS_COPNRJT_RTRY_THR;
938
- SASConfigPage.MAX_AIP = SAS_MAX_AIP;
939
-
940
- PM8001_INIT_DBG(pm8001_ha,
941
- pm8001_printk("SASConfigPage.pageCode "
942
- "0x%08x\n", SASConfigPage.pageCode));
943
- PM8001_INIT_DBG(pm8001_ha,
944
- pm8001_printk("SASConfigPage.MST_MSI "
945
- " 0x%08x\n", SASConfigPage.MST_MSI));
946
- PM8001_INIT_DBG(pm8001_ha,
947
- pm8001_printk("SASConfigPage.STP_SSP_MCT_TMO "
948
- " 0x%08x\n", SASConfigPage.STP_SSP_MCT_TMO));
949
- PM8001_INIT_DBG(pm8001_ha,
950
- pm8001_printk("SASConfigPage.STP_FRM_TMO "
951
- " 0x%08x\n", SASConfigPage.STP_FRM_TMO));
952
- PM8001_INIT_DBG(pm8001_ha,
953
- pm8001_printk("SASConfigPage.STP_IDLE_TMO "
954
- " 0x%08x\n", SASConfigPage.STP_IDLE_TMO));
955
- PM8001_INIT_DBG(pm8001_ha,
956
- pm8001_printk("SASConfigPage.OPNRJT_RTRY_INTVL "
957
- " 0x%08x\n", SASConfigPage.OPNRJT_RTRY_INTVL));
958
- PM8001_INIT_DBG(pm8001_ha,
959
- pm8001_printk("SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO "
960
- " 0x%08x\n", SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO));
961
- PM8001_INIT_DBG(pm8001_ha,
962
- pm8001_printk("SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR "
963
- " 0x%08x\n", SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR));
964
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk("SASConfigPage.MAX_AIP "
965
- " 0x%08x\n", SASConfigPage.MAX_AIP));
1272
+ pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.pageCode 0x%08x\n",
1273
+ le32_to_cpu(SASConfigPage.pageCode));
1274
+ pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MST_MSI 0x%08x\n",
1275
+ le32_to_cpu(SASConfigPage.MST_MSI));
1276
+ pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_SSP_MCT_TMO 0x%08x\n",
1277
+ le32_to_cpu(SASConfigPage.STP_SSP_MCT_TMO));
1278
+ pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_FRM_TMO 0x%08x\n",
1279
+ le32_to_cpu(SASConfigPage.STP_FRM_TMO));
1280
+ pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_IDLE_TMO 0x%08x\n",
1281
+ le32_to_cpu(SASConfigPage.STP_IDLE_TMO));
1282
+ pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.OPNRJT_RTRY_INTVL 0x%08x\n",
1283
+ le32_to_cpu(SASConfigPage.OPNRJT_RTRY_INTVL));
1284
+ pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO 0x%08x\n",
1285
+ le32_to_cpu(SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO));
1286
+ pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR 0x%08x\n",
1287
+ le32_to_cpu(SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR));
1288
+ pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MAX_AIP 0x%08x\n",
1289
+ le32_to_cpu(SASConfigPage.MAX_AIP));
9661290
9671291 memcpy(&payload.cfg_pg, &SASConfigPage,
9681292 sizeof(SASProtocolTimerConfig_t));
9691293
970
- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
1294
+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
1295
+ sizeof(payload), 0);
9711296 if (rc)
9721297 pm8001_tag_free(pm8001_ha, tag);
9731298
....@@ -1001,18 +1326,18 @@
10011326 SCRATCH_PAD3_SMB_ENABLED)
10021327 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB;
10031328 pm8001_ha->encrypt_info.status = 0;
1004
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
1005
- "Encryption: SCRATCH_PAD3_ENC_READY 0x%08X."
1006
- "Cipher mode 0x%x Sec mode 0x%x status 0x%x\n",
1007
- scratch3_value, pm8001_ha->encrypt_info.cipher_mode,
1008
- pm8001_ha->encrypt_info.sec_mode,
1009
- pm8001_ha->encrypt_info.status));
1329
+ pm8001_dbg(pm8001_ha, INIT,
1330
+ "Encryption: SCRATCH_PAD3_ENC_READY 0x%08X.Cipher mode 0x%x Sec mode 0x%x status 0x%x\n",
1331
+ scratch3_value,
1332
+ pm8001_ha->encrypt_info.cipher_mode,
1333
+ pm8001_ha->encrypt_info.sec_mode,
1334
+ pm8001_ha->encrypt_info.status);
10101335 ret = 0;
10111336 } else if ((scratch3_value & SCRATCH_PAD3_ENC_READY) ==
10121337 SCRATCH_PAD3_ENC_DISABLED) {
1013
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
1014
- "Encryption: SCRATCH_PAD3_ENC_DISABLED 0x%08X\n",
1015
- scratch3_value));
1338
+ pm8001_dbg(pm8001_ha, INIT,
1339
+ "Encryption: SCRATCH_PAD3_ENC_DISABLED 0x%08X\n",
1340
+ scratch3_value);
10161341 pm8001_ha->encrypt_info.status = 0xFFFFFFFF;
10171342 pm8001_ha->encrypt_info.cipher_mode = 0;
10181343 pm8001_ha->encrypt_info.sec_mode = 0;
....@@ -1032,12 +1357,12 @@
10321357 if ((scratch3_value & SCRATCH_PAD3_SM_MASK) ==
10331358 SCRATCH_PAD3_SMB_ENABLED)
10341359 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB;
1035
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
1036
- "Encryption: SCRATCH_PAD3_DIS_ERR 0x%08X."
1037
- "Cipher mode 0x%x sec mode 0x%x status 0x%x\n",
1038
- scratch3_value, pm8001_ha->encrypt_info.cipher_mode,
1039
- pm8001_ha->encrypt_info.sec_mode,
1040
- pm8001_ha->encrypt_info.status));
1360
+ pm8001_dbg(pm8001_ha, INIT,
1361
+ "Encryption: SCRATCH_PAD3_DIS_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n",
1362
+ scratch3_value,
1363
+ pm8001_ha->encrypt_info.cipher_mode,
1364
+ pm8001_ha->encrypt_info.sec_mode,
1365
+ pm8001_ha->encrypt_info.status);
10411366 } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) ==
10421367 SCRATCH_PAD3_ENC_ENA_ERR) {
10431368
....@@ -1055,12 +1380,12 @@
10551380 SCRATCH_PAD3_SMB_ENABLED)
10561381 pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB;
10571382
1058
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
1059
- "Encryption: SCRATCH_PAD3_ENA_ERR 0x%08X."
1060
- "Cipher mode 0x%x sec mode 0x%x status 0x%x\n",
1061
- scratch3_value, pm8001_ha->encrypt_info.cipher_mode,
1062
- pm8001_ha->encrypt_info.sec_mode,
1063
- pm8001_ha->encrypt_info.status));
1383
+ pm8001_dbg(pm8001_ha, INIT,
1384
+ "Encryption: SCRATCH_PAD3_ENA_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n",
1385
+ scratch3_value,
1386
+ pm8001_ha->encrypt_info.cipher_mode,
1387
+ pm8001_ha->encrypt_info.sec_mode,
1388
+ pm8001_ha->encrypt_info.status);
10641389 }
10651390 return ret;
10661391 }
....@@ -1087,10 +1412,16 @@
10871412 /* Currently only one key is used. New KEK index is 1.
10881413 * Current KEK index is 1. Store KEK to NVRAM is 1.
10891414 */
1090
- payload.new_curidx_ksop = ((1 << 24) | (1 << 16) | (1 << 8) |
1091
- KEK_MGMT_SUBOP_KEYCARDUPDATE);
1415
+ payload.new_curidx_ksop =
1416
+ cpu_to_le32(((1 << 24) | (1 << 16) | (1 << 8) |
1417
+ KEK_MGMT_SUBOP_KEYCARDUPDATE));
10921418
1093
- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
1419
+ pm8001_dbg(pm8001_ha, DEV,
1420
+ "Saving Encryption info to flash. payload 0x%x\n",
1421
+ le32_to_cpu(payload.new_curidx_ksop));
1422
+
1423
+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
1424
+ sizeof(payload), 0);
10941425 if (rc)
10951426 pm8001_tag_free(pm8001_ha, tag);
10961427
....@@ -1108,8 +1439,7 @@
11081439
11091440 /* check the firmware status */
11101441 if (-1 == check_fw_ready(pm8001_ha)) {
1111
- PM8001_FAIL_DBG(pm8001_ha,
1112
- pm8001_printk("Firmware is not ready!\n"));
1442
+ pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n");
11131443 return -EBUSY;
11141444 }
11151445
....@@ -1127,15 +1457,13 @@
11271457
11281458 /* update main config table ,inbound table and outbound table */
11291459 update_main_config_table(pm8001_ha);
1130
- for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++)
1460
+ for (i = 0; i < pm8001_ha->max_q_num; i++) {
11311461 update_inbnd_queue_table(pm8001_ha, i);
1132
- for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++)
11331462 update_outbnd_queue_table(pm8001_ha, i);
1134
-
1463
+ }
11351464 /* notify firmware update finished and check initialization status */
11361465 if (0 == mpi_init_check(pm8001_ha)) {
1137
- PM8001_INIT_DBG(pm8001_ha,
1138
- pm8001_printk("MPI initialize successful!\n"));
1466
+ pm8001_dbg(pm8001_ha, INIT, "MPI initialize successful!\n");
11391467 } else
11401468 return -EBUSY;
11411469
....@@ -1144,16 +1472,13 @@
11441472
11451473 /* Check for encryption */
11461474 if (pm8001_ha->chip->encrypt) {
1147
- PM8001_INIT_DBG(pm8001_ha,
1148
- pm8001_printk("Checking for encryption\n"));
1475
+ pm8001_dbg(pm8001_ha, INIT, "Checking for encryption\n");
11491476 ret = pm80xx_get_encrypt_info(pm8001_ha);
11501477 if (ret == -1) {
1151
- PM8001_INIT_DBG(pm8001_ha,
1152
- pm8001_printk("Encryption error !!\n"));
1478
+ pm8001_dbg(pm8001_ha, INIT, "Encryption error !!\n");
11531479 if (pm8001_ha->encrypt_info.status == 0x81) {
1154
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
1155
- "Encryption enabled with error."
1156
- "Saving encryption key to flash\n"));
1480
+ pm8001_dbg(pm8001_ha, INIT,
1481
+ "Encryption enabled with error.Saving encryption key to flash\n");
11571482 pm80xx_encrypt_update(pm8001_ha);
11581483 }
11591484 }
....@@ -1173,9 +1498,9 @@
11731498
11741499 /* wait until Inbound DoorBell Clear Register toggled */
11751500 if (IS_SPCV_12G(pm8001_ha->pdev)) {
1176
- max_wait_count = 4 * 1000 * 1000;/* 4 sec */
1501
+ max_wait_count = 30 * 1000 * 1000; /* 30 sec */
11771502 } else {
1178
- max_wait_count = 2 * 1000 * 1000;/* 2 sec */
1503
+ max_wait_count = 15 * 1000 * 1000; /* 15 sec */
11791504 }
11801505 do {
11811506 udelay(1);
....@@ -1184,8 +1509,7 @@
11841509 } while ((value != 0) && (--max_wait_count));
11851510
11861511 if (!max_wait_count) {
1187
- PM8001_FAIL_DBG(pm8001_ha,
1188
- pm8001_printk("TIMEOUT:IBDB value/=%x\n", value));
1512
+ pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:IBDB value/=%x\n", value);
11891513 return -1;
11901514 }
11911515
....@@ -1202,9 +1526,8 @@
12021526 break;
12031527 } while (--max_wait_count);
12041528 if (!max_wait_count) {
1205
- PM8001_FAIL_DBG(pm8001_ha,
1206
- pm8001_printk(" TIME OUT MPI State = 0x%x\n",
1207
- gst_len_mpistate & GST_MPI_STATE_MASK));
1529
+ pm8001_dbg(pm8001_ha, FAIL, " TIME OUT MPI State = 0x%x\n",
1530
+ gst_len_mpistate & GST_MPI_STATE_MASK);
12081531 return -1;
12091532 }
12101533
....@@ -1228,34 +1551,41 @@
12281551 if (!pm8001_ha->controller_fatal_error) {
12291552 /* Check if MPI is in ready state to reset */
12301553 if (mpi_uninit_check(pm8001_ha) != 0) {
1231
- regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
1232
- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
1233
- "MPI state is not ready scratch1 :0x%x\n",
1234
- regval));
1235
- return -1;
1554
+ u32 r0 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0);
1555
+ u32 r1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
1556
+ u32 r2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2);
1557
+ u32 r3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3);
1558
+ pm8001_dbg(pm8001_ha, FAIL,
1559
+ "MPI state is not ready scratch: %x:%x:%x:%x\n",
1560
+ r0, r1, r2, r3);
1561
+ /* if things aren't ready but the bootloader is ok then
1562
+ * try the reset anyway.
1563
+ */
1564
+ if (r1 & SCRATCH_PAD1_BOOTSTATE_MASK)
1565
+ return -1;
12361566 }
12371567 }
12381568 /* checked for reset register normal state; 0x0 */
12391569 regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET);
1240
- PM8001_INIT_DBG(pm8001_ha,
1241
- pm8001_printk("reset register before write : 0x%x\n", regval));
1570
+ pm8001_dbg(pm8001_ha, INIT, "reset register before write : 0x%x\n",
1571
+ regval);
12421572
12431573 pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, SPCv_NORMAL_RESET_VALUE);
1244
- mdelay(500);
1574
+ msleep(500);
12451575
12461576 regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET);
1247
- PM8001_INIT_DBG(pm8001_ha,
1248
- pm8001_printk("reset register after write 0x%x\n", regval));
1577
+ pm8001_dbg(pm8001_ha, INIT, "reset register after write 0x%x\n",
1578
+ regval);
12491579
12501580 if ((regval & SPCv_SOFT_RESET_READ_MASK) ==
12511581 SPCv_SOFT_RESET_NORMAL_RESET_OCCURED) {
1252
- PM8001_MSG_DBG(pm8001_ha,
1253
- pm8001_printk(" soft reset successful [regval: 0x%x]\n",
1254
- regval));
1582
+ pm8001_dbg(pm8001_ha, MSG,
1583
+ " soft reset successful [regval: 0x%x]\n",
1584
+ regval);
12551585 } else {
1256
- PM8001_MSG_DBG(pm8001_ha,
1257
- pm8001_printk(" soft reset failed [regval: 0x%x]\n",
1258
- regval));
1586
+ pm8001_dbg(pm8001_ha, MSG,
1587
+ " soft reset failed [regval: 0x%x]\n",
1588
+ regval);
12591589
12601590 /* check bootloader is successfully executed or in HDA mode */
12611591 bootloader_state =
....@@ -1263,28 +1593,27 @@
12631593 SCRATCH_PAD1_BOOTSTATE_MASK;
12641594
12651595 if (bootloader_state == SCRATCH_PAD1_BOOTSTATE_HDA_SEEPROM) {
1266
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
1267
- "Bootloader state - HDA mode SEEPROM\n"));
1596
+ pm8001_dbg(pm8001_ha, MSG,
1597
+ "Bootloader state - HDA mode SEEPROM\n");
12681598 } else if (bootloader_state ==
12691599 SCRATCH_PAD1_BOOTSTATE_HDA_BOOTSTRAP) {
1270
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
1271
- "Bootloader state - HDA mode Bootstrap Pin\n"));
1600
+ pm8001_dbg(pm8001_ha, MSG,
1601
+ "Bootloader state - HDA mode Bootstrap Pin\n");
12721602 } else if (bootloader_state ==
12731603 SCRATCH_PAD1_BOOTSTATE_HDA_SOFTRESET) {
1274
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
1275
- "Bootloader state - HDA mode soft reset\n"));
1604
+ pm8001_dbg(pm8001_ha, MSG,
1605
+ "Bootloader state - HDA mode soft reset\n");
12761606 } else if (bootloader_state ==
12771607 SCRATCH_PAD1_BOOTSTATE_CRIT_ERROR) {
1278
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
1279
- "Bootloader state-HDA mode critical error\n"));
1608
+ pm8001_dbg(pm8001_ha, MSG,
1609
+ "Bootloader state-HDA mode critical error\n");
12801610 }
12811611 return -EBUSY;
12821612 }
12831613
12841614 /* check the firmware status after reset */
12851615 if (-1 == check_fw_ready(pm8001_ha)) {
1286
- PM8001_FAIL_DBG(pm8001_ha,
1287
- pm8001_printk("Firmware is not ready!\n"));
1616
+ pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n");
12881617 /* check iButton feature support for motherboard controller */
12891618 if (pm8001_ha->pdev->subsystem_vendor !=
12901619 PCI_VENDOR_ID_ADAPTEC2 &&
....@@ -1296,35 +1625,30 @@
12961625 ibutton1 = pm8001_cr32(pm8001_ha, 0,
12971626 MSGU_HOST_SCRATCH_PAD_7);
12981627 if (!ibutton0 && !ibutton1) {
1299
- PM8001_FAIL_DBG(pm8001_ha,
1300
- pm8001_printk("iButton Feature is"
1301
- " not Available!!!\n"));
1628
+ pm8001_dbg(pm8001_ha, FAIL,
1629
+ "iButton Feature is not Available!!!\n");
13021630 return -EBUSY;
13031631 }
13041632 if (ibutton0 == 0xdeadbeef && ibutton1 == 0xdeadbeef) {
1305
- PM8001_FAIL_DBG(pm8001_ha,
1306
- pm8001_printk("CRC Check for iButton"
1307
- " Feature Failed!!!\n"));
1633
+ pm8001_dbg(pm8001_ha, FAIL,
1634
+ "CRC Check for iButton Feature Failed!!!\n");
13081635 return -EBUSY;
13091636 }
13101637 }
13111638 }
1312
- PM8001_INIT_DBG(pm8001_ha,
1313
- pm8001_printk("SPCv soft reset Complete\n"));
1639
+ pm8001_dbg(pm8001_ha, INIT, "SPCv soft reset Complete\n");
13141640 return 0;
13151641 }
13161642
13171643 static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha)
13181644 {
1319
- u32 i;
1645
+ u32 i;
13201646
1321
- PM8001_INIT_DBG(pm8001_ha,
1322
- pm8001_printk("chip reset start\n"));
1647
+ pm8001_dbg(pm8001_ha, INIT, "chip reset start\n");
13231648
13241649 /* do SPCv chip reset. */
13251650 pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, 0x11);
1326
- PM8001_INIT_DBG(pm8001_ha,
1327
- pm8001_printk("SPC soft reset Complete\n"));
1651
+ pm8001_dbg(pm8001_ha, INIT, "SPC soft reset Complete\n");
13281652
13291653 /* Check this ..whether delay is required or no */
13301654 /* delay 10 usec */
....@@ -1336,8 +1660,7 @@
13361660 mdelay(1);
13371661 } while ((--i) != 0);
13381662
1339
- PM8001_INIT_DBG(pm8001_ha,
1340
- pm8001_printk("chip reset finished\n"));
1663
+ pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n");
13411664 }
13421665
13431666 /**
....@@ -1364,15 +1687,17 @@
13641687 /**
13651688 * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt
13661689 * @pm8001_ha: our hba card information
1690
+ * @vec: interrupt number to enable
13671691 */
13681692 static void
13691693 pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec)
13701694 {
13711695 #ifdef PM8001_USE_MSIX
1372
- u32 mask;
1373
- mask = (u32)(1 << vec);
1374
-
1375
- pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, (u32)(mask & 0xFFFFFFFF));
1696
+ if (vec < 32)
1697
+ pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, 1U << vec);
1698
+ else
1699
+ pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR_U,
1700
+ 1U << (vec - 32));
13761701 return;
13771702 #endif
13781703 pm80xx_chip_intx_interrupt_enable(pm8001_ha);
....@@ -1382,17 +1707,21 @@
13821707 /**
13831708 * pm8001_chip_interrupt_disable- disable PM8001 chip interrupt
13841709 * @pm8001_ha: our hba card information
1710
+ * @vec: interrupt number to disable
13851711 */
13861712 static void
13871713 pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec)
13881714 {
13891715 #ifdef PM8001_USE_MSIX
1390
- u32 mask;
1391
- if (vec == 0xFF)
1392
- mask = 0xFFFFFFFF;
1716
+ if (vec == 0xFF) {
1717
+ /* disable all vectors 0-31, 32-63 */
1718
+ pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 0xFFFFFFFF);
1719
+ pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, 0xFFFFFFFF);
1720
+ } else if (vec < 32)
1721
+ pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 1U << vec);
13931722 else
1394
- mask = (u32)(1 << vec);
1395
- pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, (u32)(mask & 0xFFFFFFFF));
1723
+ pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U,
1724
+ 1U << (vec - 32));
13961725 return;
13971726 #endif
13981727 pm80xx_chip_intx_interrupt_disable(pm8001_ha);
....@@ -1411,15 +1740,14 @@
14111740 int ret;
14121741
14131742 if (!pm8001_ha_dev) {
1414
- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("dev is null\n"));
1743
+ pm8001_dbg(pm8001_ha, FAIL, "dev is null\n");
14151744 return;
14161745 }
14171746
14181747 task = sas_alloc_slow_task(GFP_ATOMIC);
14191748
14201749 if (!task) {
1421
- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("cannot "
1422
- "allocate task\n"));
1750
+ pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task\n");
14231751 return;
14241752 }
14251753
....@@ -1435,6 +1763,7 @@
14351763 ccb->device = pm8001_ha_dev;
14361764 ccb->ccb_tag = ccb_tag;
14371765 ccb->task = task;
1766
+ ccb->n_elem = 0;
14381767
14391768 circularQ = &pm8001_ha->inbnd_q_tbl[0];
14401769
....@@ -1443,7 +1772,9 @@
14431772 task_abort.device_id = cpu_to_le32(pm8001_ha_dev->device_id);
14441773 task_abort.tag = cpu_to_le32(ccb_tag);
14451774
1446
- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort, 0);
1775
+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort,
1776
+ sizeof(task_abort), 0);
1777
+ pm8001_dbg(pm8001_ha, FAIL, "Executing abort task end\n");
14471778 if (ret) {
14481779 sas_free_task(task);
14491780 pm8001_tag_free(pm8001_ha, ccb_tag);
....@@ -1466,8 +1797,7 @@
14661797 task = sas_alloc_slow_task(GFP_ATOMIC);
14671798
14681799 if (!task) {
1469
- PM8001_FAIL_DBG(pm8001_ha,
1470
- pm8001_printk("cannot allocate task !!!\n"));
1800
+ pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task !!!\n");
14711801 return;
14721802 }
14731803 task->task_done = pm8001_task_done;
....@@ -1475,8 +1805,7 @@
14751805 res = pm8001_tag_alloc(pm8001_ha, &ccb_tag);
14761806 if (res) {
14771807 sas_free_task(task);
1478
- PM8001_FAIL_DBG(pm8001_ha,
1479
- pm8001_printk("cannot allocate tag !!!\n"));
1808
+ pm8001_dbg(pm8001_ha, FAIL, "cannot allocate tag !!!\n");
14801809 return;
14811810 }
14821811
....@@ -1487,8 +1816,8 @@
14871816 if (!dev) {
14881817 sas_free_task(task);
14891818 pm8001_tag_free(pm8001_ha, ccb_tag);
1490
- PM8001_FAIL_DBG(pm8001_ha,
1491
- pm8001_printk("Domain device cannot be allocated\n"));
1819
+ pm8001_dbg(pm8001_ha, FAIL,
1820
+ "Domain device cannot be allocated\n");
14921821 return;
14931822 }
14941823
....@@ -1516,10 +1845,12 @@
15161845
15171846 sata_cmd.tag = cpu_to_le32(ccb_tag);
15181847 sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id);
1519
- sata_cmd.ncqtag_atap_dir_m_dad |= ((0x1 << 7) | (0x5 << 9));
1848
+ sata_cmd.ncqtag_atap_dir_m_dad = cpu_to_le32(((0x1 << 7) | (0x5 << 9)));
15201849 memcpy(&sata_cmd.sata_fis, &fis, sizeof(struct host_to_dev_fis));
15211850
1522
- res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd, 0);
1851
+ res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd,
1852
+ sizeof(sata_cmd), 0);
1853
+ pm8001_dbg(pm8001_ha, FAIL, "Executing read log end\n");
15231854 if (res) {
15241855 sas_free_task(task);
15251856 pm8001_tag_free(pm8001_ha, ccb_tag);
....@@ -1565,26 +1896,27 @@
15651896 t = ccb->task;
15661897
15671898 if (status && status != IO_UNDERFLOW)
1568
- PM8001_FAIL_DBG(pm8001_ha,
1569
- pm8001_printk("sas IO status 0x%x\n", status));
1899
+ pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", status);
15701900 if (unlikely(!t || !t->lldd_task || !t->dev))
15711901 return;
15721902 ts = &t->task_status;
1903
+
1904
+ pm8001_dbg(pm8001_ha, DEV,
1905
+ "tag::0x%x, status::0x%x task::0x%p\n", tag, status, t);
1906
+
15731907 /* Print sas address of IO failed device */
15741908 if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) &&
15751909 (status != IO_UNDERFLOW))
1576
- PM8001_FAIL_DBG(pm8001_ha,
1577
- pm8001_printk("SAS Address of IO Failure Drive"
1578
- ":%016llx", SAS_ADDR(t->dev->sas_addr)));
1910
+ pm8001_dbg(pm8001_ha, FAIL, "SAS Address of IO Failure Drive:%016llx\n",
1911
+ SAS_ADDR(t->dev->sas_addr));
15791912
15801913 switch (status) {
15811914 case IO_SUCCESS:
1582
- PM8001_IO_DBG(pm8001_ha,
1583
- pm8001_printk("IO_SUCCESS ,param = 0x%x\n",
1584
- param));
1915
+ pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS ,param = 0x%x\n",
1916
+ param);
15851917 if (param == 0) {
15861918 ts->resp = SAS_TASK_COMPLETE;
1587
- ts->stat = SAM_STAT_GOOD;
1919
+ ts->stat = SAS_SAM_STAT_GOOD;
15881920 } else {
15891921 ts->resp = SAS_TASK_COMPLETE;
15901922 ts->stat = SAS_PROTO_RESPONSE;
....@@ -1593,73 +1925,83 @@
15931925 sas_ssp_task_response(pm8001_ha->dev, t, iu);
15941926 }
15951927 if (pm8001_dev)
1596
- pm8001_dev->running_req--;
1928
+ atomic_dec(&pm8001_dev->running_req);
15971929 break;
15981930 case IO_ABORTED:
1599
- PM8001_IO_DBG(pm8001_ha,
1600
- pm8001_printk("IO_ABORTED IOMB Tag\n"));
1931
+ pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n");
16011932 ts->resp = SAS_TASK_COMPLETE;
16021933 ts->stat = SAS_ABORTED_TASK;
1934
+ if (pm8001_dev)
1935
+ atomic_dec(&pm8001_dev->running_req);
16031936 break;
16041937 case IO_UNDERFLOW:
16051938 /* SSP Completion with error */
1606
- PM8001_IO_DBG(pm8001_ha,
1607
- pm8001_printk("IO_UNDERFLOW ,param = 0x%x\n",
1608
- param));
1939
+ pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW ,param = 0x%x\n",
1940
+ param);
16091941 ts->resp = SAS_TASK_COMPLETE;
16101942 ts->stat = SAS_DATA_UNDERRUN;
16111943 ts->residual = param;
16121944 if (pm8001_dev)
1613
- pm8001_dev->running_req--;
1945
+ atomic_dec(&pm8001_dev->running_req);
16141946 break;
16151947 case IO_NO_DEVICE:
1616
- PM8001_IO_DBG(pm8001_ha,
1617
- pm8001_printk("IO_NO_DEVICE\n"));
1948
+ pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
16181949 ts->resp = SAS_TASK_UNDELIVERED;
16191950 ts->stat = SAS_PHY_DOWN;
1951
+ if (pm8001_dev)
1952
+ atomic_dec(&pm8001_dev->running_req);
16201953 break;
16211954 case IO_XFER_ERROR_BREAK:
1622
- PM8001_IO_DBG(pm8001_ha,
1623
- pm8001_printk("IO_XFER_ERROR_BREAK\n"));
1955
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
16241956 ts->resp = SAS_TASK_COMPLETE;
16251957 ts->stat = SAS_OPEN_REJECT;
16261958 /* Force the midlayer to retry */
16271959 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
1960
+ if (pm8001_dev)
1961
+ atomic_dec(&pm8001_dev->running_req);
16281962 break;
16291963 case IO_XFER_ERROR_PHY_NOT_READY:
1630
- PM8001_IO_DBG(pm8001_ha,
1631
- pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
1964
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
16321965 ts->resp = SAS_TASK_COMPLETE;
16331966 ts->stat = SAS_OPEN_REJECT;
16341967 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
1968
+ if (pm8001_dev)
1969
+ atomic_dec(&pm8001_dev->running_req);
16351970 break;
16361971 case IO_XFER_ERROR_INVALID_SSP_RSP_FRAME:
1637
- PM8001_IO_DBG(pm8001_ha,
1638
- pm8001_printk("IO_XFER_ERROR_INVALID_SSP_RSP_FRAME\n"));
1972
+ pm8001_dbg(pm8001_ha, IO,
1973
+ "IO_XFER_ERROR_INVALID_SSP_RSP_FRAME\n");
16391974 ts->resp = SAS_TASK_COMPLETE;
16401975 ts->stat = SAS_OPEN_REJECT;
16411976 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
1977
+ if (pm8001_dev)
1978
+ atomic_dec(&pm8001_dev->running_req);
16421979 break;
16431980 case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
1644
- PM8001_IO_DBG(pm8001_ha,
1645
- pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
1981
+ pm8001_dbg(pm8001_ha, IO,
1982
+ "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
16461983 ts->resp = SAS_TASK_COMPLETE;
16471984 ts->stat = SAS_OPEN_REJECT;
16481985 ts->open_rej_reason = SAS_OREJ_EPROTO;
1986
+ if (pm8001_dev)
1987
+ atomic_dec(&pm8001_dev->running_req);
16491988 break;
16501989 case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
1651
- PM8001_IO_DBG(pm8001_ha,
1652
- pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
1990
+ pm8001_dbg(pm8001_ha, IO,
1991
+ "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
16531992 ts->resp = SAS_TASK_COMPLETE;
16541993 ts->stat = SAS_OPEN_REJECT;
16551994 ts->open_rej_reason = SAS_OREJ_UNKNOWN;
1995
+ if (pm8001_dev)
1996
+ atomic_dec(&pm8001_dev->running_req);
16561997 break;
16571998 case IO_OPEN_CNX_ERROR_BREAK:
1658
- PM8001_IO_DBG(pm8001_ha,
1659
- pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
1999
+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
16602000 ts->resp = SAS_TASK_COMPLETE;
16612001 ts->stat = SAS_OPEN_REJECT;
16622002 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2003
+ if (pm8001_dev)
2004
+ atomic_dec(&pm8001_dev->running_req);
16632005 break;
16642006 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
16652007 case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED:
....@@ -1667,8 +2009,7 @@
16672009 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST:
16682010 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE:
16692011 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED:
1670
- PM8001_IO_DBG(pm8001_ha,
1671
- pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
2012
+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
16722013 ts->resp = SAS_TASK_COMPLETE;
16732014 ts->stat = SAS_OPEN_REJECT;
16742015 ts->open_rej_reason = SAS_OREJ_UNKNOWN;
....@@ -1678,67 +2019,78 @@
16782019 IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
16792020 break;
16802021 case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
1681
- PM8001_IO_DBG(pm8001_ha,
1682
- pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
2022
+ pm8001_dbg(pm8001_ha, IO,
2023
+ "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
16832024 ts->resp = SAS_TASK_COMPLETE;
16842025 ts->stat = SAS_OPEN_REJECT;
16852026 ts->open_rej_reason = SAS_OREJ_BAD_DEST;
2027
+ if (pm8001_dev)
2028
+ atomic_dec(&pm8001_dev->running_req);
16862029 break;
16872030 case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
1688
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
1689
- "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"));
2031
+ pm8001_dbg(pm8001_ha, IO,
2032
+ "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
16902033 ts->resp = SAS_TASK_COMPLETE;
16912034 ts->stat = SAS_OPEN_REJECT;
16922035 ts->open_rej_reason = SAS_OREJ_CONN_RATE;
2036
+ if (pm8001_dev)
2037
+ atomic_dec(&pm8001_dev->running_req);
16932038 break;
16942039 case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
1695
- PM8001_IO_DBG(pm8001_ha,
1696
- pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
2040
+ pm8001_dbg(pm8001_ha, IO,
2041
+ "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
16972042 ts->resp = SAS_TASK_UNDELIVERED;
16982043 ts->stat = SAS_OPEN_REJECT;
16992044 ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
2045
+ if (pm8001_dev)
2046
+ atomic_dec(&pm8001_dev->running_req);
17002047 break;
17012048 case IO_XFER_ERROR_NAK_RECEIVED:
1702
- PM8001_IO_DBG(pm8001_ha,
1703
- pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
2049
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
17042050 ts->resp = SAS_TASK_COMPLETE;
17052051 ts->stat = SAS_OPEN_REJECT;
17062052 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2053
+ if (pm8001_dev)
2054
+ atomic_dec(&pm8001_dev->running_req);
17072055 break;
17082056 case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
1709
- PM8001_IO_DBG(pm8001_ha,
1710
- pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
2057
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
17112058 ts->resp = SAS_TASK_COMPLETE;
17122059 ts->stat = SAS_NAK_R_ERR;
2060
+ if (pm8001_dev)
2061
+ atomic_dec(&pm8001_dev->running_req);
17132062 break;
17142063 case IO_XFER_ERROR_DMA:
1715
- PM8001_IO_DBG(pm8001_ha,
1716
- pm8001_printk("IO_XFER_ERROR_DMA\n"));
2064
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n");
17172065 ts->resp = SAS_TASK_COMPLETE;
17182066 ts->stat = SAS_OPEN_REJECT;
2067
+ if (pm8001_dev)
2068
+ atomic_dec(&pm8001_dev->running_req);
17192069 break;
17202070 case IO_XFER_OPEN_RETRY_TIMEOUT:
1721
- PM8001_IO_DBG(pm8001_ha,
1722
- pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
2071
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
17232072 ts->resp = SAS_TASK_COMPLETE;
17242073 ts->stat = SAS_OPEN_REJECT;
17252074 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2075
+ if (pm8001_dev)
2076
+ atomic_dec(&pm8001_dev->running_req);
17262077 break;
17272078 case IO_XFER_ERROR_OFFSET_MISMATCH:
1728
- PM8001_IO_DBG(pm8001_ha,
1729
- pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
2079
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
17302080 ts->resp = SAS_TASK_COMPLETE;
17312081 ts->stat = SAS_OPEN_REJECT;
2082
+ if (pm8001_dev)
2083
+ atomic_dec(&pm8001_dev->running_req);
17322084 break;
17332085 case IO_PORT_IN_RESET:
1734
- PM8001_IO_DBG(pm8001_ha,
1735
- pm8001_printk("IO_PORT_IN_RESET\n"));
2086
+ pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
17362087 ts->resp = SAS_TASK_COMPLETE;
17372088 ts->stat = SAS_OPEN_REJECT;
2089
+ if (pm8001_dev)
2090
+ atomic_dec(&pm8001_dev->running_req);
17382091 break;
17392092 case IO_DS_NON_OPERATIONAL:
1740
- PM8001_IO_DBG(pm8001_ha,
1741
- pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
2093
+ pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
17422094 ts->resp = SAS_TASK_COMPLETE;
17432095 ts->stat = SAS_OPEN_REJECT;
17442096 if (!t->uldd_task)
....@@ -1747,54 +2099,58 @@
17472099 IO_DS_NON_OPERATIONAL);
17482100 break;
17492101 case IO_DS_IN_RECOVERY:
1750
- PM8001_IO_DBG(pm8001_ha,
1751
- pm8001_printk("IO_DS_IN_RECOVERY\n"));
2102
+ pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n");
17522103 ts->resp = SAS_TASK_COMPLETE;
17532104 ts->stat = SAS_OPEN_REJECT;
2105
+ if (pm8001_dev)
2106
+ atomic_dec(&pm8001_dev->running_req);
17542107 break;
17552108 case IO_TM_TAG_NOT_FOUND:
1756
- PM8001_IO_DBG(pm8001_ha,
1757
- pm8001_printk("IO_TM_TAG_NOT_FOUND\n"));
2109
+ pm8001_dbg(pm8001_ha, IO, "IO_TM_TAG_NOT_FOUND\n");
17582110 ts->resp = SAS_TASK_COMPLETE;
17592111 ts->stat = SAS_OPEN_REJECT;
2112
+ if (pm8001_dev)
2113
+ atomic_dec(&pm8001_dev->running_req);
17602114 break;
17612115 case IO_SSP_EXT_IU_ZERO_LEN_ERROR:
1762
- PM8001_IO_DBG(pm8001_ha,
1763
- pm8001_printk("IO_SSP_EXT_IU_ZERO_LEN_ERROR\n"));
2116
+ pm8001_dbg(pm8001_ha, IO, "IO_SSP_EXT_IU_ZERO_LEN_ERROR\n");
17642117 ts->resp = SAS_TASK_COMPLETE;
17652118 ts->stat = SAS_OPEN_REJECT;
2119
+ if (pm8001_dev)
2120
+ atomic_dec(&pm8001_dev->running_req);
17662121 break;
17672122 case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
1768
- PM8001_IO_DBG(pm8001_ha,
1769
- pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
2123
+ pm8001_dbg(pm8001_ha, IO,
2124
+ "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
17702125 ts->resp = SAS_TASK_COMPLETE;
17712126 ts->stat = SAS_OPEN_REJECT;
17722127 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2128
+ if (pm8001_dev)
2129
+ atomic_dec(&pm8001_dev->running_req);
17732130 break;
17742131 default:
1775
- PM8001_IO_DBG(pm8001_ha,
1776
- pm8001_printk("Unknown status 0x%x\n", status));
2132
+ pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
17772133 /* not allowed case. Therefore, return failed status */
17782134 ts->resp = SAS_TASK_COMPLETE;
17792135 ts->stat = SAS_OPEN_REJECT;
2136
+ if (pm8001_dev)
2137
+ atomic_dec(&pm8001_dev->running_req);
17802138 break;
17812139 }
1782
- PM8001_IO_DBG(pm8001_ha,
1783
- pm8001_printk("scsi_status = 0x%x\n ",
1784
- psspPayload->ssp_resp_iu.status));
2140
+ pm8001_dbg(pm8001_ha, IO, "scsi_status = 0x%x\n ",
2141
+ psspPayload->ssp_resp_iu.status);
17852142 spin_lock_irqsave(&t->task_state_lock, flags);
17862143 t->task_state_flags &= ~SAS_TASK_STATE_PENDING;
17872144 t->task_state_flags &= ~SAS_TASK_AT_INITIATOR;
17882145 t->task_state_flags |= SAS_TASK_STATE_DONE;
17892146 if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
17902147 spin_unlock_irqrestore(&t->task_state_lock, flags);
1791
- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
1792
- "task 0x%p done with io_status 0x%x resp 0x%x "
1793
- "stat 0x%x but aborted by upper layer!\n",
1794
- t, status, ts->resp, ts->stat));
2148
+ pm8001_dbg(pm8001_ha, FAIL,
2149
+ "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
2150
+ t, status, ts->resp, ts->stat);
2151
+ pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
17952152 if (t->slow_task)
17962153 complete(&t->slow_task->completion);
1797
- pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
17982154 } else {
17992155 spin_unlock_irqrestore(&t->task_state_lock, flags);
18002156 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
....@@ -1821,52 +2177,47 @@
18212177 t = ccb->task;
18222178 pm8001_dev = ccb->device;
18232179 if (event)
1824
- PM8001_FAIL_DBG(pm8001_ha,
1825
- pm8001_printk("sas IO status 0x%x\n", event));
2180
+ pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", event);
18262181 if (unlikely(!t || !t->lldd_task || !t->dev))
18272182 return;
18282183 ts = &t->task_status;
1829
- PM8001_IO_DBG(pm8001_ha,
1830
- pm8001_printk("port_id:0x%x, tag:0x%x, event:0x%x\n",
1831
- port_id, tag, event));
2184
+ pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n",
2185
+ port_id, tag, event);
18322186 switch (event) {
18332187 case IO_OVERFLOW:
1834
- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n");)
2188
+ pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
18352189 ts->resp = SAS_TASK_COMPLETE;
18362190 ts->stat = SAS_DATA_OVERRUN;
18372191 ts->residual = 0;
18382192 if (pm8001_dev)
1839
- pm8001_dev->running_req--;
2193
+ atomic_dec(&pm8001_dev->running_req);
18402194 break;
18412195 case IO_XFER_ERROR_BREAK:
1842
- PM8001_IO_DBG(pm8001_ha,
1843
- pm8001_printk("IO_XFER_ERROR_BREAK\n"));
2196
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
18442197 pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK);
18452198 return;
18462199 case IO_XFER_ERROR_PHY_NOT_READY:
1847
- PM8001_IO_DBG(pm8001_ha,
1848
- pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
2200
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
18492201 ts->resp = SAS_TASK_COMPLETE;
18502202 ts->stat = SAS_OPEN_REJECT;
18512203 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
18522204 break;
18532205 case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
1854
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
1855
- "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
2206
+ pm8001_dbg(pm8001_ha, IO,
2207
+ "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
18562208 ts->resp = SAS_TASK_COMPLETE;
18572209 ts->stat = SAS_OPEN_REJECT;
18582210 ts->open_rej_reason = SAS_OREJ_EPROTO;
18592211 break;
18602212 case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
1861
- PM8001_IO_DBG(pm8001_ha,
1862
- pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
2213
+ pm8001_dbg(pm8001_ha, IO,
2214
+ "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
18632215 ts->resp = SAS_TASK_COMPLETE;
18642216 ts->stat = SAS_OPEN_REJECT;
18652217 ts->open_rej_reason = SAS_OREJ_UNKNOWN;
18662218 break;
18672219 case IO_OPEN_CNX_ERROR_BREAK:
1868
- PM8001_IO_DBG(pm8001_ha,
1869
- pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
2220
+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
18702221 ts->resp = SAS_TASK_COMPLETE;
18712222 ts->stat = SAS_OPEN_REJECT;
18722223 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
....@@ -1877,8 +2228,7 @@
18772228 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST:
18782229 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE:
18792230 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED:
1880
- PM8001_IO_DBG(pm8001_ha,
1881
- pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
2231
+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
18822232 ts->resp = SAS_TASK_COMPLETE;
18832233 ts->stat = SAS_OPEN_REJECT;
18842234 ts->open_rej_reason = SAS_OREJ_UNKNOWN;
....@@ -1888,94 +2238,86 @@
18882238 IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
18892239 break;
18902240 case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
1891
- PM8001_IO_DBG(pm8001_ha,
1892
- pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
2241
+ pm8001_dbg(pm8001_ha, IO,
2242
+ "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
18932243 ts->resp = SAS_TASK_COMPLETE;
18942244 ts->stat = SAS_OPEN_REJECT;
18952245 ts->open_rej_reason = SAS_OREJ_BAD_DEST;
18962246 break;
18972247 case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
1898
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
1899
- "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"));
2248
+ pm8001_dbg(pm8001_ha, IO,
2249
+ "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
19002250 ts->resp = SAS_TASK_COMPLETE;
19012251 ts->stat = SAS_OPEN_REJECT;
19022252 ts->open_rej_reason = SAS_OREJ_CONN_RATE;
19032253 break;
19042254 case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
1905
- PM8001_IO_DBG(pm8001_ha,
1906
- pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
2255
+ pm8001_dbg(pm8001_ha, IO,
2256
+ "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
19072257 ts->resp = SAS_TASK_COMPLETE;
19082258 ts->stat = SAS_OPEN_REJECT;
19092259 ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
19102260 break;
19112261 case IO_XFER_ERROR_NAK_RECEIVED:
1912
- PM8001_IO_DBG(pm8001_ha,
1913
- pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
2262
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
19142263 ts->resp = SAS_TASK_COMPLETE;
19152264 ts->stat = SAS_OPEN_REJECT;
19162265 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
19172266 break;
19182267 case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
1919
- PM8001_IO_DBG(pm8001_ha,
1920
- pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
2268
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
19212269 ts->resp = SAS_TASK_COMPLETE;
19222270 ts->stat = SAS_NAK_R_ERR;
19232271 break;
19242272 case IO_XFER_OPEN_RETRY_TIMEOUT:
1925
- PM8001_IO_DBG(pm8001_ha,
1926
- pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
2273
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
19272274 pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT);
19282275 return;
19292276 case IO_XFER_ERROR_UNEXPECTED_PHASE:
1930
- PM8001_IO_DBG(pm8001_ha,
1931
- pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n"));
2277
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n");
19322278 ts->resp = SAS_TASK_COMPLETE;
19332279 ts->stat = SAS_DATA_OVERRUN;
19342280 break;
19352281 case IO_XFER_ERROR_XFER_RDY_OVERRUN:
1936
- PM8001_IO_DBG(pm8001_ha,
1937
- pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n"));
2282
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n");
19382283 ts->resp = SAS_TASK_COMPLETE;
19392284 ts->stat = SAS_DATA_OVERRUN;
19402285 break;
19412286 case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED:
1942
- PM8001_IO_DBG(pm8001_ha,
1943
- pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"));
2287
+ pm8001_dbg(pm8001_ha, IO,
2288
+ "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n");
19442289 ts->resp = SAS_TASK_COMPLETE;
19452290 ts->stat = SAS_DATA_OVERRUN;
19462291 break;
19472292 case IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT:
1948
- PM8001_IO_DBG(pm8001_ha,
1949
- pm8001_printk("IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n"));
2293
+ pm8001_dbg(pm8001_ha, IO,
2294
+ "IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n");
19502295 ts->resp = SAS_TASK_COMPLETE;
19512296 ts->stat = SAS_DATA_OVERRUN;
19522297 break;
19532298 case IO_XFER_ERROR_OFFSET_MISMATCH:
1954
- PM8001_IO_DBG(pm8001_ha,
1955
- pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
2299
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
19562300 ts->resp = SAS_TASK_COMPLETE;
19572301 ts->stat = SAS_DATA_OVERRUN;
19582302 break;
19592303 case IO_XFER_ERROR_XFER_ZERO_DATA_LEN:
1960
- PM8001_IO_DBG(pm8001_ha,
1961
- pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"));
2304
+ pm8001_dbg(pm8001_ha, IO,
2305
+ "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n");
19622306 ts->resp = SAS_TASK_COMPLETE;
19632307 ts->stat = SAS_DATA_OVERRUN;
19642308 break;
19652309 case IO_XFER_ERROR_INTERNAL_CRC_ERROR:
1966
- PM8001_IO_DBG(pm8001_ha,
1967
- pm8001_printk("IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"));
2310
+ pm8001_dbg(pm8001_ha, IOERR,
2311
+ "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n");
19682312 /* TBC: used default set values */
19692313 ts->resp = SAS_TASK_COMPLETE;
19702314 ts->stat = SAS_DATA_OVERRUN;
19712315 break;
19722316 case IO_XFER_CMD_FRAME_ISSUED:
1973
- PM8001_IO_DBG(pm8001_ha,
1974
- pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n"));
2317
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n");
19752318 return;
19762319 default:
1977
- PM8001_IO_DBG(pm8001_ha,
1978
- pm8001_printk("Unknown status 0x%x\n", event));
2320
+ pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event);
19792321 /* not allowed case. Therefore, return failed status */
19802322 ts->resp = SAS_TASK_COMPLETE;
19812323 ts->stat = SAS_DATA_OVERRUN;
....@@ -1987,10 +2329,9 @@
19872329 t->task_state_flags |= SAS_TASK_STATE_DONE;
19882330 if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
19892331 spin_unlock_irqrestore(&t->task_state_lock, flags);
1990
- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
1991
- "task 0x%p done with event 0x%x resp 0x%x "
1992
- "stat 0x%x but aborted by upper layer!\n",
1993
- t, event, ts->resp, ts->stat));
2332
+ pm8001_dbg(pm8001_ha, FAIL,
2333
+ "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
2334
+ t, event, ts->resp, ts->stat);
19942335 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
19952336 } else {
19962337 spin_unlock_irqrestore(&t->task_state_lock, flags);
....@@ -2025,8 +2366,7 @@
20252366 tag = le32_to_cpu(psataPayload->tag);
20262367
20272368 if (!tag) {
2028
- PM8001_FAIL_DBG(pm8001_ha,
2029
- pm8001_printk("tag null\n"));
2369
+ pm8001_dbg(pm8001_ha, FAIL, "tag null\n");
20302370 return;
20312371 }
20322372 ccb = &pm8001_ha->ccb_info[tag];
....@@ -2035,8 +2375,7 @@
20352375 t = ccb->task;
20362376 pm8001_dev = ccb->device;
20372377 } else {
2038
- PM8001_FAIL_DBG(pm8001_ha,
2039
- pm8001_printk("ccb null\n"));
2378
+ pm8001_dbg(pm8001_ha, FAIL, "ccb null\n");
20402379 return;
20412380 }
20422381
....@@ -2044,29 +2383,32 @@
20442383 if (t->dev && (t->dev->lldd_dev))
20452384 pm8001_dev = t->dev->lldd_dev;
20462385 } else {
2047
- PM8001_FAIL_DBG(pm8001_ha,
2048
- pm8001_printk("task null\n"));
2386
+ pm8001_dbg(pm8001_ha, FAIL, "task null\n");
20492387 return;
20502388 }
20512389
20522390 if ((pm8001_dev && !(pm8001_dev->id & NCQ_READ_LOG_FLAG))
20532391 && unlikely(!t || !t->lldd_task || !t->dev)) {
2054
- PM8001_FAIL_DBG(pm8001_ha,
2055
- pm8001_printk("task or dev null\n"));
2392
+ pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n");
20562393 return;
20572394 }
20582395
20592396 ts = &t->task_status;
20602397 if (!ts) {
2061
- PM8001_FAIL_DBG(pm8001_ha,
2062
- pm8001_printk("ts null\n"));
2398
+ pm8001_dbg(pm8001_ha, FAIL, "ts null\n");
20632399 return;
20642400 }
2401
+
2402
+ if (unlikely(status))
2403
+ pm8001_dbg(pm8001_ha, IOERR,
2404
+ "status:0x%x, tag:0x%x, task::0x%p\n",
2405
+ status, tag, t);
2406
+
20652407 /* Print sas address of IO failed device */
20662408 if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) &&
20672409 (status != IO_UNDERFLOW)) {
20682410 if (!((t->dev->parent) &&
2069
- (DEV_IS_EXPANDER(t->dev->parent->dev_type)))) {
2411
+ (dev_is_expander(t->dev->parent->dev_type)))) {
20702412 for (i = 0 , j = 4; i <= 3 && j <= 7; i++ , j++)
20712413 sata_addr_low[i] = pm8001_ha->sas_addr[j];
20722414 for (i = 0 , j = 0; i <= 3 && j <= 3; i++ , j++)
....@@ -2092,23 +2434,23 @@
20922434 & 0xff000000)) +
20932435 pm8001_dev->attached_phy +
20942436 0x10);
2095
- PM8001_FAIL_DBG(pm8001_ha,
2096
- pm8001_printk("SAS Address of IO Failure Drive:"
2097
- "%08x%08x", temp_sata_addr_hi,
2098
- temp_sata_addr_low));
2437
+ pm8001_dbg(pm8001_ha, FAIL,
2438
+ "SAS Address of IO Failure Drive:%08x%08x\n",
2439
+ temp_sata_addr_hi,
2440
+ temp_sata_addr_low);
20992441
21002442 } else {
2101
- PM8001_FAIL_DBG(pm8001_ha,
2102
- pm8001_printk("SAS Address of IO Failure Drive:"
2103
- "%016llx", SAS_ADDR(t->dev->sas_addr)));
2443
+ pm8001_dbg(pm8001_ha, FAIL,
2444
+ "SAS Address of IO Failure Drive:%016llx\n",
2445
+ SAS_ADDR(t->dev->sas_addr));
21042446 }
21052447 }
21062448 switch (status) {
21072449 case IO_SUCCESS:
2108
- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n"));
2450
+ pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n");
21092451 if (param == 0) {
21102452 ts->resp = SAS_TASK_COMPLETE;
2111
- ts->stat = SAM_STAT_GOOD;
2453
+ ts->stat = SAS_SAM_STAT_GOOD;
21122454 /* check if response is for SEND READ LOG */
21132455 if (pm8001_dev &&
21142456 (pm8001_dev->id & NCQ_READ_LOG_FLAG)) {
....@@ -2127,94 +2469,101 @@
21272469 ts->resp = SAS_TASK_COMPLETE;
21282470 ts->stat = SAS_PROTO_RESPONSE;
21292471 ts->residual = param;
2130
- PM8001_IO_DBG(pm8001_ha,
2131
- pm8001_printk("SAS_PROTO_RESPONSE len = %d\n",
2132
- param));
2472
+ pm8001_dbg(pm8001_ha, IO,
2473
+ "SAS_PROTO_RESPONSE len = %d\n",
2474
+ param);
21332475 sata_resp = &psataPayload->sata_resp[0];
21342476 resp = (struct ata_task_resp *)ts->buf;
21352477 if (t->ata_task.dma_xfer == 0 &&
2136
- t->data_dir == PCI_DMA_FROMDEVICE) {
2478
+ t->data_dir == DMA_FROM_DEVICE) {
21372479 len = sizeof(struct pio_setup_fis);
2138
- PM8001_IO_DBG(pm8001_ha,
2139
- pm8001_printk("PIO read len = %d\n", len));
2140
- } else if (t->ata_task.use_ncq) {
2480
+ pm8001_dbg(pm8001_ha, IO,
2481
+ "PIO read len = %d\n", len);
2482
+ } else if (t->ata_task.use_ncq &&
2483
+ t->data_dir != DMA_NONE) {
21412484 len = sizeof(struct set_dev_bits_fis);
2142
- PM8001_IO_DBG(pm8001_ha,
2143
- pm8001_printk("FPDMA len = %d\n", len));
2485
+ pm8001_dbg(pm8001_ha, IO, "FPDMA len = %d\n",
2486
+ len);
21442487 } else {
21452488 len = sizeof(struct dev_to_host_fis);
2146
- PM8001_IO_DBG(pm8001_ha,
2147
- pm8001_printk("other len = %d\n", len));
2489
+ pm8001_dbg(pm8001_ha, IO, "other len = %d\n",
2490
+ len);
21482491 }
21492492 if (SAS_STATUS_BUF_SIZE >= sizeof(*resp)) {
21502493 resp->frame_len = len;
21512494 memcpy(&resp->ending_fis[0], sata_resp, len);
21522495 ts->buf_valid_size = sizeof(*resp);
21532496 } else
2154
- PM8001_IO_DBG(pm8001_ha,
2155
- pm8001_printk("response to large\n"));
2497
+ pm8001_dbg(pm8001_ha, IO,
2498
+ "response too large\n");
21562499 }
21572500 if (pm8001_dev)
2158
- pm8001_dev->running_req--;
2501
+ atomic_dec(&pm8001_dev->running_req);
21592502 break;
21602503 case IO_ABORTED:
2161
- PM8001_IO_DBG(pm8001_ha,
2162
- pm8001_printk("IO_ABORTED IOMB Tag\n"));
2504
+ pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n");
21632505 ts->resp = SAS_TASK_COMPLETE;
21642506 ts->stat = SAS_ABORTED_TASK;
21652507 if (pm8001_dev)
2166
- pm8001_dev->running_req--;
2508
+ atomic_dec(&pm8001_dev->running_req);
21672509 break;
21682510 /* following cases are to do cases */
21692511 case IO_UNDERFLOW:
21702512 /* SATA Completion with error */
2171
- PM8001_IO_DBG(pm8001_ha,
2172
- pm8001_printk("IO_UNDERFLOW param = %d\n", param));
2513
+ pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW param = %d\n", param);
21732514 ts->resp = SAS_TASK_COMPLETE;
21742515 ts->stat = SAS_DATA_UNDERRUN;
21752516 ts->residual = param;
21762517 if (pm8001_dev)
2177
- pm8001_dev->running_req--;
2518
+ atomic_dec(&pm8001_dev->running_req);
21782519 break;
21792520 case IO_NO_DEVICE:
2180
- PM8001_IO_DBG(pm8001_ha,
2181
- pm8001_printk("IO_NO_DEVICE\n"));
2521
+ pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
21822522 ts->resp = SAS_TASK_UNDELIVERED;
21832523 ts->stat = SAS_PHY_DOWN;
2524
+ if (pm8001_dev)
2525
+ atomic_dec(&pm8001_dev->running_req);
21842526 break;
21852527 case IO_XFER_ERROR_BREAK:
2186
- PM8001_IO_DBG(pm8001_ha,
2187
- pm8001_printk("IO_XFER_ERROR_BREAK\n"));
2528
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
21882529 ts->resp = SAS_TASK_COMPLETE;
21892530 ts->stat = SAS_INTERRUPTED;
2531
+ if (pm8001_dev)
2532
+ atomic_dec(&pm8001_dev->running_req);
21902533 break;
21912534 case IO_XFER_ERROR_PHY_NOT_READY:
2192
- PM8001_IO_DBG(pm8001_ha,
2193
- pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
2535
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
21942536 ts->resp = SAS_TASK_COMPLETE;
21952537 ts->stat = SAS_OPEN_REJECT;
21962538 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2539
+ if (pm8001_dev)
2540
+ atomic_dec(&pm8001_dev->running_req);
21972541 break;
21982542 case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
2199
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
2200
- "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
2543
+ pm8001_dbg(pm8001_ha, IO,
2544
+ "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
22012545 ts->resp = SAS_TASK_COMPLETE;
22022546 ts->stat = SAS_OPEN_REJECT;
22032547 ts->open_rej_reason = SAS_OREJ_EPROTO;
2548
+ if (pm8001_dev)
2549
+ atomic_dec(&pm8001_dev->running_req);
22042550 break;
22052551 case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
2206
- PM8001_IO_DBG(pm8001_ha,
2207
- pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
2552
+ pm8001_dbg(pm8001_ha, IO,
2553
+ "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
22082554 ts->resp = SAS_TASK_COMPLETE;
22092555 ts->stat = SAS_OPEN_REJECT;
22102556 ts->open_rej_reason = SAS_OREJ_UNKNOWN;
2557
+ if (pm8001_dev)
2558
+ atomic_dec(&pm8001_dev->running_req);
22112559 break;
22122560 case IO_OPEN_CNX_ERROR_BREAK:
2213
- PM8001_IO_DBG(pm8001_ha,
2214
- pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
2561
+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
22152562 ts->resp = SAS_TASK_COMPLETE;
22162563 ts->stat = SAS_OPEN_REJECT;
22172564 ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
2565
+ if (pm8001_dev)
2566
+ atomic_dec(&pm8001_dev->running_req);
22182567 break;
22192568 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS:
22202569 case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED:
....@@ -2222,8 +2571,7 @@
22222571 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST:
22232572 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE:
22242573 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED:
2225
- PM8001_IO_DBG(pm8001_ha,
2226
- pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
2574
+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
22272575 ts->resp = SAS_TASK_COMPLETE;
22282576 ts->stat = SAS_DEV_NO_RESPONSE;
22292577 if (!t->uldd_task) {
....@@ -2237,8 +2585,8 @@
22372585 }
22382586 break;
22392587 case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
2240
- PM8001_IO_DBG(pm8001_ha,
2241
- pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
2588
+ pm8001_dbg(pm8001_ha, IO,
2589
+ "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
22422590 ts->resp = SAS_TASK_UNDELIVERED;
22432591 ts->stat = SAS_OPEN_REJECT;
22442592 ts->open_rej_reason = SAS_OREJ_BAD_DEST;
....@@ -2253,15 +2601,17 @@
22532601 }
22542602 break;
22552603 case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
2256
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
2257
- "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"));
2604
+ pm8001_dbg(pm8001_ha, IO,
2605
+ "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
22582606 ts->resp = SAS_TASK_COMPLETE;
22592607 ts->stat = SAS_OPEN_REJECT;
22602608 ts->open_rej_reason = SAS_OREJ_CONN_RATE;
2609
+ if (pm8001_dev)
2610
+ atomic_dec(&pm8001_dev->running_req);
22612611 break;
22622612 case IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY:
2263
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
2264
- "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n"));
2613
+ pm8001_dbg(pm8001_ha, IO,
2614
+ "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n");
22652615 ts->resp = SAS_TASK_COMPLETE;
22662616 ts->stat = SAS_DEV_NO_RESPONSE;
22672617 if (!t->uldd_task) {
....@@ -2275,57 +2625,65 @@
22752625 }
22762626 break;
22772627 case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
2278
- PM8001_IO_DBG(pm8001_ha,
2279
- pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
2628
+ pm8001_dbg(pm8001_ha, IO,
2629
+ "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
22802630 ts->resp = SAS_TASK_COMPLETE;
22812631 ts->stat = SAS_OPEN_REJECT;
22822632 ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
2633
+ if (pm8001_dev)
2634
+ atomic_dec(&pm8001_dev->running_req);
22832635 break;
22842636 case IO_XFER_ERROR_NAK_RECEIVED:
2285
- PM8001_IO_DBG(pm8001_ha,
2286
- pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
2637
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
22872638 ts->resp = SAS_TASK_COMPLETE;
22882639 ts->stat = SAS_NAK_R_ERR;
2640
+ if (pm8001_dev)
2641
+ atomic_dec(&pm8001_dev->running_req);
22892642 break;
22902643 case IO_XFER_ERROR_ACK_NAK_TIMEOUT:
2291
- PM8001_IO_DBG(pm8001_ha,
2292
- pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"));
2644
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n");
22932645 ts->resp = SAS_TASK_COMPLETE;
22942646 ts->stat = SAS_NAK_R_ERR;
2647
+ if (pm8001_dev)
2648
+ atomic_dec(&pm8001_dev->running_req);
22952649 break;
22962650 case IO_XFER_ERROR_DMA:
2297
- PM8001_IO_DBG(pm8001_ha,
2298
- pm8001_printk("IO_XFER_ERROR_DMA\n"));
2651
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n");
22992652 ts->resp = SAS_TASK_COMPLETE;
23002653 ts->stat = SAS_ABORTED_TASK;
2654
+ if (pm8001_dev)
2655
+ atomic_dec(&pm8001_dev->running_req);
23012656 break;
23022657 case IO_XFER_ERROR_SATA_LINK_TIMEOUT:
2303
- PM8001_IO_DBG(pm8001_ha,
2304
- pm8001_printk("IO_XFER_ERROR_SATA_LINK_TIMEOUT\n"));
2658
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_SATA_LINK_TIMEOUT\n");
23052659 ts->resp = SAS_TASK_UNDELIVERED;
23062660 ts->stat = SAS_DEV_NO_RESPONSE;
2661
+ if (pm8001_dev)
2662
+ atomic_dec(&pm8001_dev->running_req);
23072663 break;
23082664 case IO_XFER_ERROR_REJECTED_NCQ_MODE:
2309
- PM8001_IO_DBG(pm8001_ha,
2310
- pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n"));
2665
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n");
23112666 ts->resp = SAS_TASK_COMPLETE;
23122667 ts->stat = SAS_DATA_UNDERRUN;
2668
+ if (pm8001_dev)
2669
+ atomic_dec(&pm8001_dev->running_req);
23132670 break;
23142671 case IO_XFER_OPEN_RETRY_TIMEOUT:
2315
- PM8001_IO_DBG(pm8001_ha,
2316
- pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
2672
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
23172673 ts->resp = SAS_TASK_COMPLETE;
23182674 ts->stat = SAS_OPEN_TO;
2675
+ if (pm8001_dev)
2676
+ atomic_dec(&pm8001_dev->running_req);
23192677 break;
23202678 case IO_PORT_IN_RESET:
2321
- PM8001_IO_DBG(pm8001_ha,
2322
- pm8001_printk("IO_PORT_IN_RESET\n"));
2679
+ pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
23232680 ts->resp = SAS_TASK_COMPLETE;
23242681 ts->stat = SAS_DEV_NO_RESPONSE;
2682
+ if (pm8001_dev)
2683
+ atomic_dec(&pm8001_dev->running_req);
23252684 break;
23262685 case IO_DS_NON_OPERATIONAL:
2327
- PM8001_IO_DBG(pm8001_ha,
2328
- pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
2686
+ pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
23292687 ts->resp = SAS_TASK_COMPLETE;
23302688 ts->stat = SAS_DEV_NO_RESPONSE;
23312689 if (!t->uldd_task) {
....@@ -2338,14 +2696,14 @@
23382696 }
23392697 break;
23402698 case IO_DS_IN_RECOVERY:
2341
- PM8001_IO_DBG(pm8001_ha,
2342
- pm8001_printk("IO_DS_IN_RECOVERY\n"));
2699
+ pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n");
23432700 ts->resp = SAS_TASK_COMPLETE;
23442701 ts->stat = SAS_DEV_NO_RESPONSE;
2702
+ if (pm8001_dev)
2703
+ atomic_dec(&pm8001_dev->running_req);
23452704 break;
23462705 case IO_DS_IN_ERROR:
2347
- PM8001_IO_DBG(pm8001_ha,
2348
- pm8001_printk("IO_DS_IN_ERROR\n"));
2706
+ pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_ERROR\n");
23492707 ts->resp = SAS_TASK_COMPLETE;
23502708 ts->stat = SAS_DEV_NO_RESPONSE;
23512709 if (!t->uldd_task) {
....@@ -2358,18 +2716,21 @@
23582716 }
23592717 break;
23602718 case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
2361
- PM8001_IO_DBG(pm8001_ha,
2362
- pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
2719
+ pm8001_dbg(pm8001_ha, IO,
2720
+ "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
23632721 ts->resp = SAS_TASK_COMPLETE;
23642722 ts->stat = SAS_OPEN_REJECT;
23652723 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
2724
+ if (pm8001_dev)
2725
+ atomic_dec(&pm8001_dev->running_req);
23662726 break;
23672727 default:
2368
- PM8001_IO_DBG(pm8001_ha,
2369
- pm8001_printk("Unknown status 0x%x\n", status));
2728
+ pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
23702729 /* not allowed case. Therefore, return failed status */
23712730 ts->resp = SAS_TASK_COMPLETE;
23722731 ts->stat = SAS_DEV_NO_RESPONSE;
2732
+ if (pm8001_dev)
2733
+ atomic_dec(&pm8001_dev->running_req);
23732734 break;
23742735 }
23752736 spin_lock_irqsave(&t->task_state_lock, flags);
....@@ -2378,13 +2739,12 @@
23782739 t->task_state_flags |= SAS_TASK_STATE_DONE;
23792740 if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
23802741 spin_unlock_irqrestore(&t->task_state_lock, flags);
2381
- PM8001_FAIL_DBG(pm8001_ha,
2382
- pm8001_printk("task 0x%p done with io_status 0x%x"
2383
- " resp 0x%x stat 0x%x but aborted by upper layer!\n",
2384
- t, status, ts->resp, ts->stat));
2742
+ pm8001_dbg(pm8001_ha, FAIL,
2743
+ "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
2744
+ t, status, ts->resp, ts->stat);
2745
+ pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
23852746 if (t->slow_task)
23862747 complete(&t->slow_task->completion);
2387
- pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
23882748 } else {
23892749 spin_unlock_irqrestore(&t->task_state_lock, flags);
23902750 pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag);
....@@ -2412,13 +2772,11 @@
24122772 t = ccb->task;
24132773 pm8001_dev = ccb->device;
24142774 } else {
2415
- PM8001_FAIL_DBG(pm8001_ha,
2416
- pm8001_printk("No CCB !!!. returning\n"));
2775
+ pm8001_dbg(pm8001_ha, FAIL, "No CCB !!!. returning\n");
24172776 return;
24182777 }
24192778 if (event)
2420
- PM8001_FAIL_DBG(pm8001_ha,
2421
- pm8001_printk("SATA EVENT 0x%x\n", event));
2779
+ pm8001_dbg(pm8001_ha, FAIL, "SATA EVENT 0x%x\n", event);
24222780
24232781 /* Check if this is NCQ error */
24242782 if (event == IO_XFER_ERROR_ABORTED_NCQ_MODE) {
....@@ -2431,54 +2789,49 @@
24312789 }
24322790
24332791 if (unlikely(!t || !t->lldd_task || !t->dev)) {
2434
- PM8001_FAIL_DBG(pm8001_ha,
2435
- pm8001_printk("task or dev null\n"));
2792
+ pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n");
24362793 return;
24372794 }
24382795
24392796 ts = &t->task_status;
2440
- PM8001_IO_DBG(pm8001_ha,
2441
- pm8001_printk("port_id:0x%x, tag:0x%x, event:0x%x\n",
2442
- port_id, tag, event));
2797
+ pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n",
2798
+ port_id, tag, event);
24432799 switch (event) {
24442800 case IO_OVERFLOW:
2445
- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n"));
2801
+ pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
24462802 ts->resp = SAS_TASK_COMPLETE;
24472803 ts->stat = SAS_DATA_OVERRUN;
24482804 ts->residual = 0;
24492805 if (pm8001_dev)
2450
- pm8001_dev->running_req--;
2806
+ atomic_dec(&pm8001_dev->running_req);
24512807 break;
24522808 case IO_XFER_ERROR_BREAK:
2453
- PM8001_IO_DBG(pm8001_ha,
2454
- pm8001_printk("IO_XFER_ERROR_BREAK\n"));
2809
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
24552810 ts->resp = SAS_TASK_COMPLETE;
24562811 ts->stat = SAS_INTERRUPTED;
24572812 break;
24582813 case IO_XFER_ERROR_PHY_NOT_READY:
2459
- PM8001_IO_DBG(pm8001_ha,
2460
- pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
2814
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
24612815 ts->resp = SAS_TASK_COMPLETE;
24622816 ts->stat = SAS_OPEN_REJECT;
24632817 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
24642818 break;
24652819 case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
2466
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
2467
- "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
2820
+ pm8001_dbg(pm8001_ha, IO,
2821
+ "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
24682822 ts->resp = SAS_TASK_COMPLETE;
24692823 ts->stat = SAS_OPEN_REJECT;
24702824 ts->open_rej_reason = SAS_OREJ_EPROTO;
24712825 break;
24722826 case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
2473
- PM8001_IO_DBG(pm8001_ha,
2474
- pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
2827
+ pm8001_dbg(pm8001_ha, IO,
2828
+ "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
24752829 ts->resp = SAS_TASK_COMPLETE;
24762830 ts->stat = SAS_OPEN_REJECT;
24772831 ts->open_rej_reason = SAS_OREJ_UNKNOWN;
24782832 break;
24792833 case IO_OPEN_CNX_ERROR_BREAK:
2480
- PM8001_IO_DBG(pm8001_ha,
2481
- pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
2834
+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
24822835 ts->resp = SAS_TASK_COMPLETE;
24832836 ts->stat = SAS_OPEN_REJECT;
24842837 ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
....@@ -2489,8 +2842,8 @@
24892842 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST:
24902843 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE:
24912844 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED:
2492
- PM8001_FAIL_DBG(pm8001_ha,
2493
- pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
2845
+ pm8001_dbg(pm8001_ha, FAIL,
2846
+ "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
24942847 ts->resp = SAS_TASK_UNDELIVERED;
24952848 ts->stat = SAS_DEV_NO_RESPONSE;
24962849 if (!t->uldd_task) {
....@@ -2504,107 +2857,96 @@
25042857 }
25052858 break;
25062859 case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
2507
- PM8001_IO_DBG(pm8001_ha,
2508
- pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
2860
+ pm8001_dbg(pm8001_ha, IO,
2861
+ "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
25092862 ts->resp = SAS_TASK_UNDELIVERED;
25102863 ts->stat = SAS_OPEN_REJECT;
25112864 ts->open_rej_reason = SAS_OREJ_BAD_DEST;
25122865 break;
25132866 case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
2514
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
2515
- "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"));
2867
+ pm8001_dbg(pm8001_ha, IO,
2868
+ "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
25162869 ts->resp = SAS_TASK_COMPLETE;
25172870 ts->stat = SAS_OPEN_REJECT;
25182871 ts->open_rej_reason = SAS_OREJ_CONN_RATE;
25192872 break;
25202873 case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
2521
- PM8001_IO_DBG(pm8001_ha,
2522
- pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
2874
+ pm8001_dbg(pm8001_ha, IO,
2875
+ "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
25232876 ts->resp = SAS_TASK_COMPLETE;
25242877 ts->stat = SAS_OPEN_REJECT;
25252878 ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
25262879 break;
25272880 case IO_XFER_ERROR_NAK_RECEIVED:
2528
- PM8001_IO_DBG(pm8001_ha,
2529
- pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n"));
2881
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n");
25302882 ts->resp = SAS_TASK_COMPLETE;
25312883 ts->stat = SAS_NAK_R_ERR;
25322884 break;
25332885 case IO_XFER_ERROR_PEER_ABORTED:
2534
- PM8001_IO_DBG(pm8001_ha,
2535
- pm8001_printk("IO_XFER_ERROR_PEER_ABORTED\n"));
2886
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PEER_ABORTED\n");
25362887 ts->resp = SAS_TASK_COMPLETE;
25372888 ts->stat = SAS_NAK_R_ERR;
25382889 break;
25392890 case IO_XFER_ERROR_REJECTED_NCQ_MODE:
2540
- PM8001_IO_DBG(pm8001_ha,
2541
- pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n"));
2891
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n");
25422892 ts->resp = SAS_TASK_COMPLETE;
25432893 ts->stat = SAS_DATA_UNDERRUN;
25442894 break;
25452895 case IO_XFER_OPEN_RETRY_TIMEOUT:
2546
- PM8001_IO_DBG(pm8001_ha,
2547
- pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
2896
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
25482897 ts->resp = SAS_TASK_COMPLETE;
25492898 ts->stat = SAS_OPEN_TO;
25502899 break;
25512900 case IO_XFER_ERROR_UNEXPECTED_PHASE:
2552
- PM8001_IO_DBG(pm8001_ha,
2553
- pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n"));
2901
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n");
25542902 ts->resp = SAS_TASK_COMPLETE;
25552903 ts->stat = SAS_OPEN_TO;
25562904 break;
25572905 case IO_XFER_ERROR_XFER_RDY_OVERRUN:
2558
- PM8001_IO_DBG(pm8001_ha,
2559
- pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n"));
2906
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n");
25602907 ts->resp = SAS_TASK_COMPLETE;
25612908 ts->stat = SAS_OPEN_TO;
25622909 break;
25632910 case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED:
2564
- PM8001_IO_DBG(pm8001_ha,
2565
- pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"));
2911
+ pm8001_dbg(pm8001_ha, IO,
2912
+ "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n");
25662913 ts->resp = SAS_TASK_COMPLETE;
25672914 ts->stat = SAS_OPEN_TO;
25682915 break;
25692916 case IO_XFER_ERROR_OFFSET_MISMATCH:
2570
- PM8001_IO_DBG(pm8001_ha,
2571
- pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n"));
2917
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n");
25722918 ts->resp = SAS_TASK_COMPLETE;
25732919 ts->stat = SAS_OPEN_TO;
25742920 break;
25752921 case IO_XFER_ERROR_XFER_ZERO_DATA_LEN:
2576
- PM8001_IO_DBG(pm8001_ha,
2577
- pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"));
2922
+ pm8001_dbg(pm8001_ha, IO,
2923
+ "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n");
25782924 ts->resp = SAS_TASK_COMPLETE;
25792925 ts->stat = SAS_OPEN_TO;
25802926 break;
25812927 case IO_XFER_CMD_FRAME_ISSUED:
2582
- PM8001_IO_DBG(pm8001_ha,
2583
- pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n"));
2928
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n");
25842929 break;
25852930 case IO_XFER_PIO_SETUP_ERROR:
2586
- PM8001_IO_DBG(pm8001_ha,
2587
- pm8001_printk("IO_XFER_PIO_SETUP_ERROR\n"));
2931
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_PIO_SETUP_ERROR\n");
25882932 ts->resp = SAS_TASK_COMPLETE;
25892933 ts->stat = SAS_OPEN_TO;
25902934 break;
25912935 case IO_XFER_ERROR_INTERNAL_CRC_ERROR:
2592
- PM8001_FAIL_DBG(pm8001_ha,
2593
- pm8001_printk("IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"));
2936
+ pm8001_dbg(pm8001_ha, FAIL,
2937
+ "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n");
25942938 /* TBC: used default set values */
25952939 ts->resp = SAS_TASK_COMPLETE;
25962940 ts->stat = SAS_OPEN_TO;
25972941 break;
25982942 case IO_XFER_DMA_ACTIVATE_TIMEOUT:
2599
- PM8001_FAIL_DBG(pm8001_ha,
2600
- pm8001_printk("IO_XFR_DMA_ACTIVATE_TIMEOUT\n"));
2943
+ pm8001_dbg(pm8001_ha, FAIL, "IO_XFR_DMA_ACTIVATE_TIMEOUT\n");
26012944 /* TBC: used default set values */
26022945 ts->resp = SAS_TASK_COMPLETE;
26032946 ts->stat = SAS_OPEN_TO;
26042947 break;
26052948 default:
2606
- PM8001_IO_DBG(pm8001_ha,
2607
- pm8001_printk("Unknown status 0x%x\n", event));
2949
+ pm8001_dbg(pm8001_ha, IO, "Unknown status 0x%x\n", event);
26082950 /* not allowed case. Therefore, return failed status */
26092951 ts->resp = SAS_TASK_COMPLETE;
26102952 ts->stat = SAS_OPEN_TO;
....@@ -2616,10 +2958,9 @@
26162958 t->task_state_flags |= SAS_TASK_STATE_DONE;
26172959 if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
26182960 spin_unlock_irqrestore(&t->task_state_lock, flags);
2619
- PM8001_FAIL_DBG(pm8001_ha,
2620
- pm8001_printk("task 0x%p done with io_status 0x%x"
2621
- " resp 0x%x stat 0x%x but aborted by upper layer!\n",
2622
- t, event, ts->resp, ts->stat));
2961
+ pm8001_dbg(pm8001_ha, FAIL,
2962
+ "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n",
2963
+ t, event, ts->resp, ts->stat);
26232964 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
26242965 } else {
26252966 spin_unlock_irqrestore(&t->task_state_lock, flags);
....@@ -2652,91 +2993,87 @@
26522993 ts = &t->task_status;
26532994 pm8001_dev = ccb->device;
26542995 if (status)
2655
- PM8001_FAIL_DBG(pm8001_ha,
2656
- pm8001_printk("smp IO status 0x%x\n", status));
2996
+ pm8001_dbg(pm8001_ha, FAIL, "smp IO status 0x%x\n", status);
26572997 if (unlikely(!t || !t->lldd_task || !t->dev))
26582998 return;
2999
+
3000
+ pm8001_dbg(pm8001_ha, DEV, "tag::0x%x status::0x%x\n", tag, status);
26593001
26603002 switch (status) {
26613003
26623004 case IO_SUCCESS:
2663
- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n"));
3005
+ pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n");
26643006 ts->resp = SAS_TASK_COMPLETE;
2665
- ts->stat = SAM_STAT_GOOD;
3007
+ ts->stat = SAS_SAM_STAT_GOOD;
26663008 if (pm8001_dev)
2667
- pm8001_dev->running_req--;
3009
+ atomic_dec(&pm8001_dev->running_req);
26683010 if (pm8001_ha->smp_exp_mode == SMP_DIRECT) {
2669
- PM8001_IO_DBG(pm8001_ha,
2670
- pm8001_printk("DIRECT RESPONSE Length:%d\n",
2671
- param));
3011
+ pm8001_dbg(pm8001_ha, IO,
3012
+ "DIRECT RESPONSE Length:%d\n",
3013
+ param);
26723014 pdma_respaddr = (char *)(phys_to_virt(cpu_to_le64
26733015 ((u64)sg_dma_address
26743016 (&t->smp_task.smp_resp))));
26753017 for (i = 0; i < param; i++) {
26763018 *(pdma_respaddr+i) = psmpPayload->_r_a[i];
2677
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
2678
- "SMP Byte%d DMA data 0x%x psmp 0x%x\n",
2679
- i, *(pdma_respaddr+i),
2680
- psmpPayload->_r_a[i]));
3019
+ pm8001_dbg(pm8001_ha, IO,
3020
+ "SMP Byte%d DMA data 0x%x psmp 0x%x\n",
3021
+ i, *(pdma_respaddr + i),
3022
+ psmpPayload->_r_a[i]);
26813023 }
26823024 }
26833025 break;
26843026 case IO_ABORTED:
2685
- PM8001_IO_DBG(pm8001_ha,
2686
- pm8001_printk("IO_ABORTED IOMB\n"));
3027
+ pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB\n");
26873028 ts->resp = SAS_TASK_COMPLETE;
26883029 ts->stat = SAS_ABORTED_TASK;
26893030 if (pm8001_dev)
2690
- pm8001_dev->running_req--;
3031
+ atomic_dec(&pm8001_dev->running_req);
26913032 break;
26923033 case IO_OVERFLOW:
2693
- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n"));
3034
+ pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n");
26943035 ts->resp = SAS_TASK_COMPLETE;
26953036 ts->stat = SAS_DATA_OVERRUN;
26963037 ts->residual = 0;
26973038 if (pm8001_dev)
2698
- pm8001_dev->running_req--;
3039
+ atomic_dec(&pm8001_dev->running_req);
26993040 break;
27003041 case IO_NO_DEVICE:
2701
- PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_NO_DEVICE\n"));
3042
+ pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n");
27023043 ts->resp = SAS_TASK_COMPLETE;
27033044 ts->stat = SAS_PHY_DOWN;
27043045 break;
27053046 case IO_ERROR_HW_TIMEOUT:
2706
- PM8001_IO_DBG(pm8001_ha,
2707
- pm8001_printk("IO_ERROR_HW_TIMEOUT\n"));
3047
+ pm8001_dbg(pm8001_ha, IO, "IO_ERROR_HW_TIMEOUT\n");
27083048 ts->resp = SAS_TASK_COMPLETE;
2709
- ts->stat = SAM_STAT_BUSY;
3049
+ ts->stat = SAS_SAM_STAT_BUSY;
27103050 break;
27113051 case IO_XFER_ERROR_BREAK:
2712
- PM8001_IO_DBG(pm8001_ha,
2713
- pm8001_printk("IO_XFER_ERROR_BREAK\n"));
3052
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n");
27143053 ts->resp = SAS_TASK_COMPLETE;
2715
- ts->stat = SAM_STAT_BUSY;
3054
+ ts->stat = SAS_SAM_STAT_BUSY;
27163055 break;
27173056 case IO_XFER_ERROR_PHY_NOT_READY:
2718
- PM8001_IO_DBG(pm8001_ha,
2719
- pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n"));
3057
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n");
27203058 ts->resp = SAS_TASK_COMPLETE;
2721
- ts->stat = SAM_STAT_BUSY;
3059
+ ts->stat = SAS_SAM_STAT_BUSY;
27223060 break;
27233061 case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED:
2724
- PM8001_IO_DBG(pm8001_ha,
2725
- pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"));
3062
+ pm8001_dbg(pm8001_ha, IO,
3063
+ "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n");
27263064 ts->resp = SAS_TASK_COMPLETE;
27273065 ts->stat = SAS_OPEN_REJECT;
27283066 ts->open_rej_reason = SAS_OREJ_UNKNOWN;
27293067 break;
27303068 case IO_OPEN_CNX_ERROR_ZONE_VIOLATION:
2731
- PM8001_IO_DBG(pm8001_ha,
2732
- pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"));
3069
+ pm8001_dbg(pm8001_ha, IO,
3070
+ "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n");
27333071 ts->resp = SAS_TASK_COMPLETE;
27343072 ts->stat = SAS_OPEN_REJECT;
27353073 ts->open_rej_reason = SAS_OREJ_UNKNOWN;
27363074 break;
27373075 case IO_OPEN_CNX_ERROR_BREAK:
2738
- PM8001_IO_DBG(pm8001_ha,
2739
- pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n"));
3076
+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n");
27403077 ts->resp = SAS_TASK_COMPLETE;
27413078 ts->stat = SAS_OPEN_REJECT;
27423079 ts->open_rej_reason = SAS_OREJ_RSVD_CONT0;
....@@ -2747,8 +3084,7 @@
27473084 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST:
27483085 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE:
27493086 case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED:
2750
- PM8001_IO_DBG(pm8001_ha,
2751
- pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"));
3087
+ pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n");
27523088 ts->resp = SAS_TASK_COMPLETE;
27533089 ts->stat = SAS_OPEN_REJECT;
27543090 ts->open_rej_reason = SAS_OREJ_UNKNOWN;
....@@ -2757,75 +3093,68 @@
27573093 IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS);
27583094 break;
27593095 case IO_OPEN_CNX_ERROR_BAD_DESTINATION:
2760
- PM8001_IO_DBG(pm8001_ha,
2761
- pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"));
3096
+ pm8001_dbg(pm8001_ha, IO,
3097
+ "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n");
27623098 ts->resp = SAS_TASK_COMPLETE;
27633099 ts->stat = SAS_OPEN_REJECT;
27643100 ts->open_rej_reason = SAS_OREJ_BAD_DEST;
27653101 break;
27663102 case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED:
2767
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(\
2768
- "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"));
3103
+ pm8001_dbg(pm8001_ha, IO,
3104
+ "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n");
27693105 ts->resp = SAS_TASK_COMPLETE;
27703106 ts->stat = SAS_OPEN_REJECT;
27713107 ts->open_rej_reason = SAS_OREJ_CONN_RATE;
27723108 break;
27733109 case IO_OPEN_CNX_ERROR_WRONG_DESTINATION:
2774
- PM8001_IO_DBG(pm8001_ha,
2775
- pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"));
3110
+ pm8001_dbg(pm8001_ha, IO,
3111
+ "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n");
27763112 ts->resp = SAS_TASK_COMPLETE;
27773113 ts->stat = SAS_OPEN_REJECT;
27783114 ts->open_rej_reason = SAS_OREJ_WRONG_DEST;
27793115 break;
27803116 case IO_XFER_ERROR_RX_FRAME:
2781
- PM8001_IO_DBG(pm8001_ha,
2782
- pm8001_printk("IO_XFER_ERROR_RX_FRAME\n"));
3117
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_RX_FRAME\n");
27833118 ts->resp = SAS_TASK_COMPLETE;
27843119 ts->stat = SAS_DEV_NO_RESPONSE;
27853120 break;
27863121 case IO_XFER_OPEN_RETRY_TIMEOUT:
2787
- PM8001_IO_DBG(pm8001_ha,
2788
- pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n"));
3122
+ pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n");
27893123 ts->resp = SAS_TASK_COMPLETE;
27903124 ts->stat = SAS_OPEN_REJECT;
27913125 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
27923126 break;
27933127 case IO_ERROR_INTERNAL_SMP_RESOURCE:
2794
- PM8001_IO_DBG(pm8001_ha,
2795
- pm8001_printk("IO_ERROR_INTERNAL_SMP_RESOURCE\n"));
3128
+ pm8001_dbg(pm8001_ha, IO, "IO_ERROR_INTERNAL_SMP_RESOURCE\n");
27963129 ts->resp = SAS_TASK_COMPLETE;
27973130 ts->stat = SAS_QUEUE_FULL;
27983131 break;
27993132 case IO_PORT_IN_RESET:
2800
- PM8001_IO_DBG(pm8001_ha,
2801
- pm8001_printk("IO_PORT_IN_RESET\n"));
3133
+ pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n");
28023134 ts->resp = SAS_TASK_COMPLETE;
28033135 ts->stat = SAS_OPEN_REJECT;
28043136 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
28053137 break;
28063138 case IO_DS_NON_OPERATIONAL:
2807
- PM8001_IO_DBG(pm8001_ha,
2808
- pm8001_printk("IO_DS_NON_OPERATIONAL\n"));
3139
+ pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n");
28093140 ts->resp = SAS_TASK_COMPLETE;
28103141 ts->stat = SAS_DEV_NO_RESPONSE;
28113142 break;
28123143 case IO_DS_IN_RECOVERY:
2813
- PM8001_IO_DBG(pm8001_ha,
2814
- pm8001_printk("IO_DS_IN_RECOVERY\n"));
3144
+ pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n");
28153145 ts->resp = SAS_TASK_COMPLETE;
28163146 ts->stat = SAS_OPEN_REJECT;
28173147 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
28183148 break;
28193149 case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY:
2820
- PM8001_IO_DBG(pm8001_ha,
2821
- pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"));
3150
+ pm8001_dbg(pm8001_ha, IO,
3151
+ "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n");
28223152 ts->resp = SAS_TASK_COMPLETE;
28233153 ts->stat = SAS_OPEN_REJECT;
28243154 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
28253155 break;
28263156 default:
2827
- PM8001_IO_DBG(pm8001_ha,
2828
- pm8001_printk("Unknown status 0x%x\n", status));
3157
+ pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status);
28293158 ts->resp = SAS_TASK_COMPLETE;
28303159 ts->stat = SAS_DEV_NO_RESPONSE;
28313160 /* not allowed case. Therefore, return failed status */
....@@ -2837,10 +3166,9 @@
28373166 t->task_state_flags |= SAS_TASK_STATE_DONE;
28383167 if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) {
28393168 spin_unlock_irqrestore(&t->task_state_lock, flags);
2840
- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
2841
- "task 0x%p done with io_status 0x%x resp 0x%x"
2842
- "stat 0x%x but aborted by upper layer!\n",
2843
- t, status, ts->resp, ts->stat));
3169
+ pm8001_dbg(pm8001_ha, FAIL,
3170
+ "task 0x%p done with io_status 0x%x resp 0x%xstat 0x%x but aborted by upper layer!\n",
3171
+ t, status, ts->resp, ts->stat);
28443172 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
28453173 } else {
28463174 spin_unlock_irqrestore(&t->task_state_lock, flags);
....@@ -2875,7 +3203,8 @@
28753203 ((phyId & 0xFF) << 24) | (port_id & 0xFF));
28763204 payload.param0 = cpu_to_le32(param0);
28773205 payload.param1 = cpu_to_le32(param1);
2878
- pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
3206
+ pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
3207
+ sizeof(payload), 0);
28793208 }
28803209
28813210 static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha,
....@@ -2929,45 +3258,40 @@
29293258 u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F);
29303259
29313260 struct pm8001_port *port = &pm8001_ha->port[port_id];
2932
- struct sas_ha_struct *sas_ha = pm8001_ha->sas;
29333261 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
29343262 unsigned long flags;
29353263 u8 deviceType = pPayload->sas_identify.dev_type;
29363264 port->port_state = portstate;
29373265 port->wide_port_phymap |= (1U << phy_id);
29383266 phy->phy_state = PHY_STATE_LINK_UP_SPCV;
2939
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
2940
- "portid:%d; phyid:%d; linkrate:%d; "
2941
- "portstate:%x; devicetype:%x\n",
2942
- port_id, phy_id, link_rate, portstate, deviceType));
3267
+ pm8001_dbg(pm8001_ha, MSG,
3268
+ "portid:%d; phyid:%d; linkrate:%d; portstate:%x; devicetype:%x\n",
3269
+ port_id, phy_id, link_rate, portstate, deviceType);
29433270
29443271 switch (deviceType) {
29453272 case SAS_PHY_UNUSED:
2946
- PM8001_MSG_DBG(pm8001_ha,
2947
- pm8001_printk("device type no device.\n"));
3273
+ pm8001_dbg(pm8001_ha, MSG, "device type no device.\n");
29483274 break;
29493275 case SAS_END_DEVICE:
2950
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n"));
3276
+ pm8001_dbg(pm8001_ha, MSG, "end device.\n");
29513277 pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id,
29523278 PHY_NOTIFY_ENABLE_SPINUP);
29533279 port->port_attached = 1;
29543280 pm8001_get_lrate_mode(phy, link_rate);
29553281 break;
29563282 case SAS_EDGE_EXPANDER_DEVICE:
2957
- PM8001_MSG_DBG(pm8001_ha,
2958
- pm8001_printk("expander device.\n"));
3283
+ pm8001_dbg(pm8001_ha, MSG, "expander device.\n");
29593284 port->port_attached = 1;
29603285 pm8001_get_lrate_mode(phy, link_rate);
29613286 break;
29623287 case SAS_FANOUT_EXPANDER_DEVICE:
2963
- PM8001_MSG_DBG(pm8001_ha,
2964
- pm8001_printk("fanout expander device.\n"));
3288
+ pm8001_dbg(pm8001_ha, MSG, "fanout expander device.\n");
29653289 port->port_attached = 1;
29663290 pm8001_get_lrate_mode(phy, link_rate);
29673291 break;
29683292 default:
2969
- PM8001_MSG_DBG(pm8001_ha,
2970
- pm8001_printk("unknown device type(%x)\n", deviceType));
3293
+ pm8001_dbg(pm8001_ha, DEVIO, "unknown device type(%x)\n",
3294
+ deviceType);
29713295 break;
29723296 }
29733297 phy->phy_type |= PORT_TYPE_SAS;
....@@ -2978,7 +3302,7 @@
29783302 else if (phy->identify.device_type != SAS_PHY_UNUSED)
29793303 phy->identify.target_port_protocols = SAS_PROTOCOL_SMP;
29803304 phy->sas_phy.oob_mode = SAS_OOB_MODE;
2981
- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
3305
+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
29823306 spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags);
29833307 memcpy(phy->frame_rcvd, &pPayload->sas_identify,
29843308 sizeof(struct sas_identify_frame)-4);
....@@ -2986,7 +3310,7 @@
29863310 pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr);
29873311 spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags);
29883312 if (pm8001_ha->flags == PM8001F_RUN_TIME)
2989
- mdelay(200);/*delay a moment to wait disk to spinup*/
3313
+ mdelay(200); /* delay a moment to wait for disk to spin up */
29903314 pm8001_bytes_dmaed(pm8001_ha, phy_id);
29913315 }
29923316
....@@ -3012,12 +3336,11 @@
30123336 u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F);
30133337
30143338 struct pm8001_port *port = &pm8001_ha->port[port_id];
3015
- struct sas_ha_struct *sas_ha = pm8001_ha->sas;
30163339 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
30173340 unsigned long flags;
3018
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3019
- "port id %d, phy id %d link_rate %d portstate 0x%x\n",
3020
- port_id, phy_id, link_rate, portstate));
3341
+ pm8001_dbg(pm8001_ha, DEVIO,
3342
+ "port id %d, phy id %d link_rate %d portstate 0x%x\n",
3343
+ port_id, phy_id, link_rate, portstate);
30213344
30223345 port->port_state = portstate;
30233346 phy->phy_state = PHY_STATE_LINK_UP_SPCV;
....@@ -3026,7 +3349,7 @@
30263349 phy->phy_type |= PORT_TYPE_SATA;
30273350 phy->phy_attached = 1;
30283351 phy->sas_phy.oob_mode = SATA_OOB_MODE;
3029
- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
3352
+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE);
30303353 spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags);
30313354 memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4),
30323355 sizeof(struct dev_to_host_fis));
....@@ -3067,10 +3390,10 @@
30673390 case PORT_VALID:
30683391 break;
30693392 case PORT_INVALID:
3070
- PM8001_MSG_DBG(pm8001_ha,
3071
- pm8001_printk(" PortInvalid portID %d\n", port_id));
3072
- PM8001_MSG_DBG(pm8001_ha,
3073
- pm8001_printk(" Last phy Down and port invalid\n"));
3393
+ pm8001_dbg(pm8001_ha, MSG, " PortInvalid portID %d\n",
3394
+ port_id);
3395
+ pm8001_dbg(pm8001_ha, MSG,
3396
+ " Last phy Down and port invalid\n");
30743397 if (port_sata) {
30753398 phy->phy_type = 0;
30763399 port->port_attached = 0;
....@@ -3080,19 +3403,18 @@
30803403 sas_phy_disconnected(&phy->sas_phy);
30813404 break;
30823405 case PORT_IN_RESET:
3083
- PM8001_MSG_DBG(pm8001_ha,
3084
- pm8001_printk(" Port In Reset portID %d\n", port_id));
3406
+ pm8001_dbg(pm8001_ha, MSG, " Port In Reset portID %d\n",
3407
+ port_id);
30853408 break;
30863409 case PORT_NOT_ESTABLISHED:
3087
- PM8001_MSG_DBG(pm8001_ha,
3088
- pm8001_printk(" Phy Down and PORT_NOT_ESTABLISHED\n"));
3410
+ pm8001_dbg(pm8001_ha, MSG,
3411
+ " Phy Down and PORT_NOT_ESTABLISHED\n");
30893412 port->port_attached = 0;
30903413 break;
30913414 case PORT_LOSTCOMM:
3092
- PM8001_MSG_DBG(pm8001_ha,
3093
- pm8001_printk(" Phy Down and PORT_LOSTCOMM\n"));
3094
- PM8001_MSG_DBG(pm8001_ha,
3095
- pm8001_printk(" Last phy Down and port invalid\n"));
3415
+ pm8001_dbg(pm8001_ha, MSG, " Phy Down and PORT_LOSTCOMM\n");
3416
+ pm8001_dbg(pm8001_ha, MSG,
3417
+ " Last phy Down and port invalid\n");
30963418 if (port_sata) {
30973419 port->port_attached = 0;
30983420 phy->phy_type = 0;
....@@ -3103,17 +3425,14 @@
31033425 break;
31043426 default:
31053427 port->port_attached = 0;
3106
- PM8001_MSG_DBG(pm8001_ha,
3107
- pm8001_printk(" Phy Down and(default) = 0x%x\n",
3108
- portstate));
3428
+ pm8001_dbg(pm8001_ha, DEVIO,
3429
+ " Phy Down and(default) = 0x%x\n",
3430
+ portstate);
31093431 break;
31103432
31113433 }
3112
- if (port_sata && (portstate != PORT_IN_RESET)) {
3113
- struct sas_ha_struct *sas_ha = pm8001_ha->sas;
3114
-
3115
- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL);
3116
- }
3434
+ if (port_sata && (portstate != PORT_IN_RESET))
3435
+ sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL);
31173436 }
31183437
31193438 static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
....@@ -3126,13 +3445,16 @@
31263445 le32_to_cpu(pPayload->phyid);
31273446 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
31283447
3129
- PM8001_INIT_DBG(pm8001_ha,
3130
- pm8001_printk("phy start resp status:0x%x, phyid:0x%x\n",
3131
- status, phy_id));
3132
- if (status == 0) {
3133
- phy->phy_state = 1;
3134
- if (pm8001_ha->flags == PM8001F_RUN_TIME)
3135
- complete(phy->enable_completion);
3448
+ pm8001_dbg(pm8001_ha, INIT,
3449
+ "phy start resp status:0x%x, phyid:0x%x\n",
3450
+ status, phy_id);
3451
+ if (status == 0)
3452
+ phy->phy_state = PHY_LINK_DOWN;
3453
+
3454
+ if (pm8001_ha->flags == PM8001F_RUN_TIME &&
3455
+ phy->enable_completion != NULL) {
3456
+ complete(phy->enable_completion);
3457
+ phy->enable_completion = NULL;
31363458 }
31373459 return 0;
31383460
....@@ -3152,18 +3474,18 @@
31523474 u32 rht_lht = le32_to_cpu(pPayload->rht_lht);
31533475
31543476 if (thermal_event & 0x40) {
3155
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
3156
- "Thermal Event: Local high temperature violated!\n"));
3157
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
3158
- "Thermal Event: Measured local high temperature %d\n",
3159
- ((rht_lht & 0xFF00) >> 8)));
3477
+ pm8001_dbg(pm8001_ha, IO,
3478
+ "Thermal Event: Local high temperature violated!\n");
3479
+ pm8001_dbg(pm8001_ha, IO,
3480
+ "Thermal Event: Measured local high temperature %d\n",
3481
+ ((rht_lht & 0xFF00) >> 8));
31603482 }
31613483 if (thermal_event & 0x10) {
3162
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
3163
- "Thermal Event: Remote high temperature violated!\n"));
3164
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
3165
- "Thermal Event: Measured remote high temperature %d\n",
3166
- ((rht_lht & 0xFF000000) >> 24)));
3484
+ pm8001_dbg(pm8001_ha, IO,
3485
+ "Thermal Event: Remote high temperature violated!\n");
3486
+ pm8001_dbg(pm8001_ha, IO,
3487
+ "Thermal Event: Measured remote high temperature %d\n",
3488
+ ((rht_lht & 0xFF000000) >> 24));
31673489 }
31683490 return 0;
31693491 }
....@@ -3192,149 +3514,134 @@
31923514 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
31933515 struct pm8001_port *port = &pm8001_ha->port[port_id];
31943516 struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id];
3195
- PM8001_MSG_DBG(pm8001_ha,
3196
- pm8001_printk("portid:%d phyid:%d event:0x%x status:0x%x\n",
3197
- port_id, phy_id, eventType, status));
3517
+ pm8001_dbg(pm8001_ha, DEV,
3518
+ "portid:%d phyid:%d event:0x%x status:0x%x\n",
3519
+ port_id, phy_id, eventType, status);
31983520
31993521 switch (eventType) {
32003522
32013523 case HW_EVENT_SAS_PHY_UP:
3202
- PM8001_MSG_DBG(pm8001_ha,
3203
- pm8001_printk("HW_EVENT_PHY_START_STATUS\n"));
3524
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS\n");
32043525 hw_event_sas_phy_up(pm8001_ha, piomb);
32053526 break;
32063527 case HW_EVENT_SATA_PHY_UP:
3207
- PM8001_MSG_DBG(pm8001_ha,
3208
- pm8001_printk("HW_EVENT_SATA_PHY_UP\n"));
3528
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_PHY_UP\n");
32093529 hw_event_sata_phy_up(pm8001_ha, piomb);
32103530 break;
32113531 case HW_EVENT_SATA_SPINUP_HOLD:
3212
- PM8001_MSG_DBG(pm8001_ha,
3213
- pm8001_printk("HW_EVENT_SATA_SPINUP_HOLD\n"));
3214
- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD);
3532
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n");
3533
+ sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD);
32153534 break;
32163535 case HW_EVENT_PHY_DOWN:
3217
- PM8001_MSG_DBG(pm8001_ha,
3218
- pm8001_printk("HW_EVENT_PHY_DOWN\n"));
3536
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n");
32193537 hw_event_phy_down(pm8001_ha, piomb);
32203538 if (pm8001_ha->reset_in_progress) {
3221
- PM8001_MSG_DBG(pm8001_ha,
3222
- pm8001_printk("Reset in progress\n"));
3539
+ pm8001_dbg(pm8001_ha, MSG, "Reset in progress\n");
32233540 return 0;
32243541 }
32253542 phy->phy_attached = 0;
3226
- phy->phy_state = 0;
3543
+ phy->phy_state = PHY_LINK_DISABLE;
32273544 break;
32283545 case HW_EVENT_PORT_INVALID:
3229
- PM8001_MSG_DBG(pm8001_ha,
3230
- pm8001_printk("HW_EVENT_PORT_INVALID\n"));
3546
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n");
32313547 sas_phy_disconnected(sas_phy);
32323548 phy->phy_attached = 0;
3233
- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3549
+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
32343550 break;
32353551 /* the broadcast change primitive received, tell the LIBSAS this event
32363552 to revalidate the sas domain*/
32373553 case HW_EVENT_BROADCAST_CHANGE:
3238
- PM8001_MSG_DBG(pm8001_ha,
3239
- pm8001_printk("HW_EVENT_BROADCAST_CHANGE\n"));
3554
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_CHANGE\n");
32403555 pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE,
32413556 port_id, phy_id, 1, 0);
32423557 spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
32433558 sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE;
32443559 spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
3245
- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
3560
+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
32463561 break;
32473562 case HW_EVENT_PHY_ERROR:
3248
- PM8001_MSG_DBG(pm8001_ha,
3249
- pm8001_printk("HW_EVENT_PHY_ERROR\n"));
3563
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n");
32503564 sas_phy_disconnected(&phy->sas_phy);
32513565 phy->phy_attached = 0;
3252
- sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR);
3566
+ sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR);
32533567 break;
32543568 case HW_EVENT_BROADCAST_EXP:
3255
- PM8001_MSG_DBG(pm8001_ha,
3256
- pm8001_printk("HW_EVENT_BROADCAST_EXP\n"));
3569
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n");
32573570 spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
32583571 sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP;
32593572 spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
3260
- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
3573
+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
32613574 break;
32623575 case HW_EVENT_LINK_ERR_INVALID_DWORD:
3263
- PM8001_MSG_DBG(pm8001_ha,
3264
- pm8001_printk("HW_EVENT_LINK_ERR_INVALID_DWORD\n"));
3576
+ pm8001_dbg(pm8001_ha, MSG,
3577
+ "HW_EVENT_LINK_ERR_INVALID_DWORD\n");
32653578 pm80xx_hw_event_ack_req(pm8001_ha, 0,
32663579 HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0);
32673580 break;
32683581 case HW_EVENT_LINK_ERR_DISPARITY_ERROR:
3269
- PM8001_MSG_DBG(pm8001_ha,
3270
- pm8001_printk("HW_EVENT_LINK_ERR_DISPARITY_ERROR\n"));
3582
+ pm8001_dbg(pm8001_ha, MSG,
3583
+ "HW_EVENT_LINK_ERR_DISPARITY_ERROR\n");
32713584 pm80xx_hw_event_ack_req(pm8001_ha, 0,
32723585 HW_EVENT_LINK_ERR_DISPARITY_ERROR,
32733586 port_id, phy_id, 0, 0);
32743587 break;
32753588 case HW_EVENT_LINK_ERR_CODE_VIOLATION:
3276
- PM8001_MSG_DBG(pm8001_ha,
3277
- pm8001_printk("HW_EVENT_LINK_ERR_CODE_VIOLATION\n"));
3589
+ pm8001_dbg(pm8001_ha, MSG,
3590
+ "HW_EVENT_LINK_ERR_CODE_VIOLATION\n");
32783591 pm80xx_hw_event_ack_req(pm8001_ha, 0,
32793592 HW_EVENT_LINK_ERR_CODE_VIOLATION,
32803593 port_id, phy_id, 0, 0);
32813594 break;
32823595 case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH:
3283
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3284
- "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n"));
3596
+ pm8001_dbg(pm8001_ha, MSG,
3597
+ "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n");
32853598 pm80xx_hw_event_ack_req(pm8001_ha, 0,
32863599 HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH,
32873600 port_id, phy_id, 0, 0);
32883601 break;
32893602 case HW_EVENT_MALFUNCTION:
3290
- PM8001_MSG_DBG(pm8001_ha,
3291
- pm8001_printk("HW_EVENT_MALFUNCTION\n"));
3603
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_MALFUNCTION\n");
32923604 break;
32933605 case HW_EVENT_BROADCAST_SES:
3294
- PM8001_MSG_DBG(pm8001_ha,
3295
- pm8001_printk("HW_EVENT_BROADCAST_SES\n"));
3606
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_SES\n");
32963607 spin_lock_irqsave(&sas_phy->sas_prim_lock, flags);
32973608 sas_phy->sas_prim = HW_EVENT_BROADCAST_SES;
32983609 spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags);
3299
- sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
3610
+ sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
33003611 break;
33013612 case HW_EVENT_INBOUND_CRC_ERROR:
3302
- PM8001_MSG_DBG(pm8001_ha,
3303
- pm8001_printk("HW_EVENT_INBOUND_CRC_ERROR\n"));
3613
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n");
33043614 pm80xx_hw_event_ack_req(pm8001_ha, 0,
33053615 HW_EVENT_INBOUND_CRC_ERROR,
33063616 port_id, phy_id, 0, 0);
33073617 break;
33083618 case HW_EVENT_HARD_RESET_RECEIVED:
3309
- PM8001_MSG_DBG(pm8001_ha,
3310
- pm8001_printk("HW_EVENT_HARD_RESET_RECEIVED\n"));
3311
- sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET);
3619
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n");
3620
+ sas_notify_port_event(sas_phy, PORTE_HARD_RESET);
33123621 break;
33133622 case HW_EVENT_ID_FRAME_TIMEOUT:
3314
- PM8001_MSG_DBG(pm8001_ha,
3315
- pm8001_printk("HW_EVENT_ID_FRAME_TIMEOUT\n"));
3623
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n");
33163624 sas_phy_disconnected(sas_phy);
33173625 phy->phy_attached = 0;
3318
- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3626
+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
33193627 break;
33203628 case HW_EVENT_LINK_ERR_PHY_RESET_FAILED:
3321
- PM8001_MSG_DBG(pm8001_ha,
3322
- pm8001_printk("HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n"));
3629
+ pm8001_dbg(pm8001_ha, MSG,
3630
+ "HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n");
33233631 pm80xx_hw_event_ack_req(pm8001_ha, 0,
33243632 HW_EVENT_LINK_ERR_PHY_RESET_FAILED,
33253633 port_id, phy_id, 0, 0);
33263634 sas_phy_disconnected(sas_phy);
33273635 phy->phy_attached = 0;
3328
- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3636
+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
33293637 break;
33303638 case HW_EVENT_PORT_RESET_TIMER_TMO:
3331
- PM8001_MSG_DBG(pm8001_ha,
3332
- pm8001_printk("HW_EVENT_PORT_RESET_TIMER_TMO\n"));
3639
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n");
33333640 pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN,
33343641 port_id, phy_id, 0, 0);
33353642 sas_phy_disconnected(sas_phy);
33363643 phy->phy_attached = 0;
3337
- sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
3644
+ sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR);
33383645 if (pm8001_ha->phy[phy_id].reset_completion) {
33393646 pm8001_ha->phy[phy_id].port_reset_status =
33403647 PORT_RESET_TMO;
....@@ -3343,28 +3650,26 @@
33433650 }
33443651 break;
33453652 case HW_EVENT_PORT_RECOVERY_TIMER_TMO:
3346
- PM8001_MSG_DBG(pm8001_ha,
3347
- pm8001_printk("HW_EVENT_PORT_RECOVERY_TIMER_TMO\n"));
3653
+ pm8001_dbg(pm8001_ha, MSG,
3654
+ "HW_EVENT_PORT_RECOVERY_TIMER_TMO\n");
33483655 pm80xx_hw_event_ack_req(pm8001_ha, 0,
33493656 HW_EVENT_PORT_RECOVERY_TIMER_TMO,
33503657 port_id, phy_id, 0, 0);
33513658 for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
33523659 if (port->wide_port_phymap & (1 << i)) {
33533660 phy = &pm8001_ha->phy[i];
3354
- sas_ha->notify_phy_event(&phy->sas_phy,
3661
+ sas_notify_phy_event(&phy->sas_phy,
33553662 PHYE_LOSS_OF_SIGNAL);
33563663 port->wide_port_phymap &= ~(1 << i);
33573664 }
33583665 }
33593666 break;
33603667 case HW_EVENT_PORT_RECOVER:
3361
- PM8001_MSG_DBG(pm8001_ha,
3362
- pm8001_printk("HW_EVENT_PORT_RECOVER\n"));
3668
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RECOVER\n");
33633669 hw_event_port_recover(pm8001_ha, piomb);
33643670 break;
33653671 case HW_EVENT_PORT_RESET_COMPLETE:
3366
- PM8001_MSG_DBG(pm8001_ha,
3367
- pm8001_printk("HW_EVENT_PORT_RESET_COMPLETE\n"));
3672
+ pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_COMPLETE\n");
33683673 if (pm8001_ha->phy[phy_id].reset_completion) {
33693674 pm8001_ha->phy[phy_id].port_reset_status =
33703675 PORT_RESET_SUCCESS;
....@@ -3373,12 +3678,11 @@
33733678 }
33743679 break;
33753680 case EVENT_BROADCAST_ASYNCH_EVENT:
3376
- PM8001_MSG_DBG(pm8001_ha,
3377
- pm8001_printk("EVENT_BROADCAST_ASYNCH_EVENT\n"));
3681
+ pm8001_dbg(pm8001_ha, MSG, "EVENT_BROADCAST_ASYNCH_EVENT\n");
33783682 break;
33793683 default:
3380
- PM8001_MSG_DBG(pm8001_ha,
3381
- pm8001_printk("Unknown event type 0x%x\n", eventType));
3684
+ pm8001_dbg(pm8001_ha, DEVIO, "Unknown event type 0x%x\n",
3685
+ eventType);
33823686 break;
33833687 }
33843688 return 0;
....@@ -3396,13 +3700,13 @@
33963700 u32 status =
33973701 le32_to_cpu(pPayload->status);
33983702 u32 phyid =
3399
- le32_to_cpu(pPayload->phyid);
3703
+ le32_to_cpu(pPayload->phyid) & 0xFF;
34003704 struct pm8001_phy *phy = &pm8001_ha->phy[phyid];
3401
- PM8001_MSG_DBG(pm8001_ha,
3402
- pm8001_printk("phy:0x%x status:0x%x\n",
3403
- phyid, status));
3404
- if (status == 0)
3405
- phy->phy_state = 0;
3705
+ pm8001_dbg(pm8001_ha, MSG, "phy:0x%x status:0x%x\n",
3706
+ phyid, status);
3707
+ if (status == PHY_STOP_SUCCESS ||
3708
+ status == PHY_STOP_ERR_DEVICE_ATTACHED)
3709
+ phy->phy_state = PHY_LINK_DISABLE;
34063710 return 0;
34073711 }
34083712
....@@ -3418,10 +3722,12 @@
34183722 (struct set_ctrl_cfg_resp *)(piomb + 4);
34193723 u32 status = le32_to_cpu(pPayload->status);
34203724 u32 err_qlfr_pgcd = le32_to_cpu(pPayload->err_qlfr_pgcd);
3725
+ u32 tag = le32_to_cpu(pPayload->tag);
34213726
3422
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3423
- "SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n",
3424
- status, err_qlfr_pgcd));
3727
+ pm8001_dbg(pm8001_ha, MSG,
3728
+ "SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n",
3729
+ status, err_qlfr_pgcd);
3730
+ pm8001_tag_free(pm8001_ha, tag);
34253731
34263732 return 0;
34273733 }
....@@ -3434,8 +3740,7 @@
34343740 static int mpi_get_controller_config_resp(struct pm8001_hba_info *pm8001_ha,
34353741 void *piomb)
34363742 {
3437
- PM8001_MSG_DBG(pm8001_ha,
3438
- pm8001_printk(" pm80xx_addition_functionality\n"));
3743
+ pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n");
34393744
34403745 return 0;
34413746 }
....@@ -3448,8 +3753,7 @@
34483753 static int mpi_get_phy_profile_resp(struct pm8001_hba_info *pm8001_ha,
34493754 void *piomb)
34503755 {
3451
- PM8001_MSG_DBG(pm8001_ha,
3452
- pm8001_printk(" pm80xx_addition_functionality\n"));
3756
+ pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n");
34533757
34543758 return 0;
34553759 }
....@@ -3461,8 +3765,7 @@
34613765 */
34623766 static int mpi_flash_op_ext_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)
34633767 {
3464
- PM8001_MSG_DBG(pm8001_ha,
3465
- pm8001_printk(" pm80xx_addition_functionality\n"));
3768
+ pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n");
34663769
34673770 return 0;
34683771 }
....@@ -3475,28 +3778,31 @@
34753778 static int mpi_set_phy_profile_resp(struct pm8001_hba_info *pm8001_ha,
34763779 void *piomb)
34773780 {
3781
+ u32 tag;
34783782 u8 page_code;
3783
+ int rc = 0;
34793784 struct set_phy_profile_resp *pPayload =
34803785 (struct set_phy_profile_resp *)(piomb + 4);
34813786 u32 ppc_phyid = le32_to_cpu(pPayload->ppc_phyid);
34823787 u32 status = le32_to_cpu(pPayload->status);
34833788
3789
+ tag = le32_to_cpu(pPayload->tag);
34843790 page_code = (u8)((ppc_phyid & 0xFF00) >> 8);
34853791 if (status) {
34863792 /* status is FAILED */
3487
- PM8001_FAIL_DBG(pm8001_ha,
3488
- pm8001_printk("PhyProfile command failed with status "
3489
- "0x%08X \n", status));
3490
- return -1;
3793
+ pm8001_dbg(pm8001_ha, FAIL,
3794
+ "PhyProfile command failed with status 0x%08X\n",
3795
+ status);
3796
+ rc = -1;
34913797 } else {
34923798 if (page_code != SAS_PHY_ANALOG_SETTINGS_PAGE) {
3493
- PM8001_FAIL_DBG(pm8001_ha,
3494
- pm8001_printk("Invalid page code 0x%X\n",
3495
- page_code));
3496
- return -1;
3799
+ pm8001_dbg(pm8001_ha, FAIL, "Invalid page code 0x%X\n",
3800
+ page_code);
3801
+ rc = -1;
34973802 }
34983803 }
3499
- return 0;
3804
+ pm8001_tag_free(pm8001_ha, tag);
3805
+ return rc;
35003806 }
35013807
35023808 /**
....@@ -3513,9 +3819,9 @@
35133819 u32 kidx_new_curr_ksop = le32_to_cpu(pPayload->kidx_new_curr_ksop);
35143820 u32 err_qlfr = le32_to_cpu(pPayload->err_qlfr);
35153821
3516
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3517
- "KEK MGMT RESP. Status 0x%x idx_ksop 0x%x err_qlfr 0x%x\n",
3518
- status, kidx_new_curr_ksop, err_qlfr));
3822
+ pm8001_dbg(pm8001_ha, MSG,
3823
+ "KEK MGMT RESP. Status 0x%x idx_ksop 0x%x err_qlfr 0x%x\n",
3824
+ status, kidx_new_curr_ksop, err_qlfr);
35193825
35203826 return 0;
35213827 }
....@@ -3528,8 +3834,7 @@
35283834 static int mpi_dek_management_resp(struct pm8001_hba_info *pm8001_ha,
35293835 void *piomb)
35303836 {
3531
- PM8001_MSG_DBG(pm8001_ha,
3532
- pm8001_printk(" pm80xx_addition_functionality\n"));
3837
+ pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n");
35333838
35343839 return 0;
35353840 }
....@@ -3542,8 +3847,7 @@
35423847 static int ssp_coalesced_comp_resp(struct pm8001_hba_info *pm8001_ha,
35433848 void *piomb)
35443849 {
3545
- PM8001_MSG_DBG(pm8001_ha,
3546
- pm8001_printk(" pm80xx_addition_functionality\n"));
3850
+ pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n");
35473851
35483852 return 0;
35493853 }
....@@ -3560,266 +3864,237 @@
35603864
35613865 switch (opc) {
35623866 case OPC_OUB_ECHO:
3563
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk("OPC_OUB_ECHO\n"));
3867
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_ECHO\n");
35643868 break;
35653869 case OPC_OUB_HW_EVENT:
3566
- PM8001_MSG_DBG(pm8001_ha,
3567
- pm8001_printk("OPC_OUB_HW_EVENT\n"));
3870
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_HW_EVENT\n");
35683871 mpi_hw_event(pm8001_ha, piomb);
35693872 break;
35703873 case OPC_OUB_THERM_HW_EVENT:
3571
- PM8001_MSG_DBG(pm8001_ha,
3572
- pm8001_printk("OPC_OUB_THERMAL_EVENT\n"));
3874
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_THERMAL_EVENT\n");
35733875 mpi_thermal_hw_event(pm8001_ha, piomb);
35743876 break;
35753877 case OPC_OUB_SSP_COMP:
3576
- PM8001_MSG_DBG(pm8001_ha,
3577
- pm8001_printk("OPC_OUB_SSP_COMP\n"));
3878
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_COMP\n");
35783879 mpi_ssp_completion(pm8001_ha, piomb);
35793880 break;
35803881 case OPC_OUB_SMP_COMP:
3581
- PM8001_MSG_DBG(pm8001_ha,
3582
- pm8001_printk("OPC_OUB_SMP_COMP\n"));
3882
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_COMP\n");
35833883 mpi_smp_completion(pm8001_ha, piomb);
35843884 break;
35853885 case OPC_OUB_LOCAL_PHY_CNTRL:
3586
- PM8001_MSG_DBG(pm8001_ha,
3587
- pm8001_printk("OPC_OUB_LOCAL_PHY_CNTRL\n"));
3886
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_LOCAL_PHY_CNTRL\n");
35883887 pm8001_mpi_local_phy_ctl(pm8001_ha, piomb);
35893888 break;
35903889 case OPC_OUB_DEV_REGIST:
3591
- PM8001_MSG_DBG(pm8001_ha,
3592
- pm8001_printk("OPC_OUB_DEV_REGIST\n"));
3890
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_REGIST\n");
35933891 pm8001_mpi_reg_resp(pm8001_ha, piomb);
35943892 break;
35953893 case OPC_OUB_DEREG_DEV:
3596
- PM8001_MSG_DBG(pm8001_ha,
3597
- pm8001_printk("unregister the device\n"));
3894
+ pm8001_dbg(pm8001_ha, MSG, "unregister the device\n");
35983895 pm8001_mpi_dereg_resp(pm8001_ha, piomb);
35993896 break;
36003897 case OPC_OUB_GET_DEV_HANDLE:
3601
- PM8001_MSG_DBG(pm8001_ha,
3602
- pm8001_printk("OPC_OUB_GET_DEV_HANDLE\n"));
3898
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEV_HANDLE\n");
36033899 break;
36043900 case OPC_OUB_SATA_COMP:
3605
- PM8001_MSG_DBG(pm8001_ha,
3606
- pm8001_printk("OPC_OUB_SATA_COMP\n"));
3901
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_COMP\n");
36073902 mpi_sata_completion(pm8001_ha, piomb);
36083903 break;
36093904 case OPC_OUB_SATA_EVENT:
3610
- PM8001_MSG_DBG(pm8001_ha,
3611
- pm8001_printk("OPC_OUB_SATA_EVENT\n"));
3905
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_EVENT\n");
36123906 mpi_sata_event(pm8001_ha, piomb);
36133907 break;
36143908 case OPC_OUB_SSP_EVENT:
3615
- PM8001_MSG_DBG(pm8001_ha,
3616
- pm8001_printk("OPC_OUB_SSP_EVENT\n"));
3909
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_EVENT\n");
36173910 mpi_ssp_event(pm8001_ha, piomb);
36183911 break;
36193912 case OPC_OUB_DEV_HANDLE_ARRIV:
3620
- PM8001_MSG_DBG(pm8001_ha,
3621
- pm8001_printk("OPC_OUB_DEV_HANDLE_ARRIV\n"));
3913
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_HANDLE_ARRIV\n");
36223914 /*This is for target*/
36233915 break;
36243916 case OPC_OUB_SSP_RECV_EVENT:
3625
- PM8001_MSG_DBG(pm8001_ha,
3626
- pm8001_printk("OPC_OUB_SSP_RECV_EVENT\n"));
3917
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_RECV_EVENT\n");
36273918 /*This is for target*/
36283919 break;
36293920 case OPC_OUB_FW_FLASH_UPDATE:
3630
- PM8001_MSG_DBG(pm8001_ha,
3631
- pm8001_printk("OPC_OUB_FW_FLASH_UPDATE\n"));
3921
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_FW_FLASH_UPDATE\n");
36323922 pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb);
36333923 break;
36343924 case OPC_OUB_GPIO_RESPONSE:
3635
- PM8001_MSG_DBG(pm8001_ha,
3636
- pm8001_printk("OPC_OUB_GPIO_RESPONSE\n"));
3925
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_RESPONSE\n");
36373926 break;
36383927 case OPC_OUB_GPIO_EVENT:
3639
- PM8001_MSG_DBG(pm8001_ha,
3640
- pm8001_printk("OPC_OUB_GPIO_EVENT\n"));
3928
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_EVENT\n");
36413929 break;
36423930 case OPC_OUB_GENERAL_EVENT:
3643
- PM8001_MSG_DBG(pm8001_ha,
3644
- pm8001_printk("OPC_OUB_GENERAL_EVENT\n"));
3931
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GENERAL_EVENT\n");
36453932 pm8001_mpi_general_event(pm8001_ha, piomb);
36463933 break;
36473934 case OPC_OUB_SSP_ABORT_RSP:
3648
- PM8001_MSG_DBG(pm8001_ha,
3649
- pm8001_printk("OPC_OUB_SSP_ABORT_RSP\n"));
3935
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_ABORT_RSP\n");
36503936 pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
36513937 break;
36523938 case OPC_OUB_SATA_ABORT_RSP:
3653
- PM8001_MSG_DBG(pm8001_ha,
3654
- pm8001_printk("OPC_OUB_SATA_ABORT_RSP\n"));
3939
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_ABORT_RSP\n");
36553940 pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
36563941 break;
36573942 case OPC_OUB_SAS_DIAG_MODE_START_END:
3658
- PM8001_MSG_DBG(pm8001_ha,
3659
- pm8001_printk("OPC_OUB_SAS_DIAG_MODE_START_END\n"));
3943
+ pm8001_dbg(pm8001_ha, MSG,
3944
+ "OPC_OUB_SAS_DIAG_MODE_START_END\n");
36603945 break;
36613946 case OPC_OUB_SAS_DIAG_EXECUTE:
3662
- PM8001_MSG_DBG(pm8001_ha,
3663
- pm8001_printk("OPC_OUB_SAS_DIAG_EXECUTE\n"));
3947
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_DIAG_EXECUTE\n");
36643948 break;
36653949 case OPC_OUB_GET_TIME_STAMP:
3666
- PM8001_MSG_DBG(pm8001_ha,
3667
- pm8001_printk("OPC_OUB_GET_TIME_STAMP\n"));
3950
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_TIME_STAMP\n");
36683951 break;
36693952 case OPC_OUB_SAS_HW_EVENT_ACK:
3670
- PM8001_MSG_DBG(pm8001_ha,
3671
- pm8001_printk("OPC_OUB_SAS_HW_EVENT_ACK\n"));
3953
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_HW_EVENT_ACK\n");
36723954 break;
36733955 case OPC_OUB_PORT_CONTROL:
3674
- PM8001_MSG_DBG(pm8001_ha,
3675
- pm8001_printk("OPC_OUB_PORT_CONTROL\n"));
3956
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_PORT_CONTROL\n");
36763957 break;
36773958 case OPC_OUB_SMP_ABORT_RSP:
3678
- PM8001_MSG_DBG(pm8001_ha,
3679
- pm8001_printk("OPC_OUB_SMP_ABORT_RSP\n"));
3959
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_ABORT_RSP\n");
36803960 pm8001_mpi_task_abort_resp(pm8001_ha, piomb);
36813961 break;
36823962 case OPC_OUB_GET_NVMD_DATA:
3683
- PM8001_MSG_DBG(pm8001_ha,
3684
- pm8001_printk("OPC_OUB_GET_NVMD_DATA\n"));
3963
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_NVMD_DATA\n");
36853964 pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb);
36863965 break;
36873966 case OPC_OUB_SET_NVMD_DATA:
3688
- PM8001_MSG_DBG(pm8001_ha,
3689
- pm8001_printk("OPC_OUB_SET_NVMD_DATA\n"));
3967
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_NVMD_DATA\n");
36903968 pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb);
36913969 break;
36923970 case OPC_OUB_DEVICE_HANDLE_REMOVAL:
3693
- PM8001_MSG_DBG(pm8001_ha,
3694
- pm8001_printk("OPC_OUB_DEVICE_HANDLE_REMOVAL\n"));
3971
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEVICE_HANDLE_REMOVAL\n");
36953972 break;
36963973 case OPC_OUB_SET_DEVICE_STATE:
3697
- PM8001_MSG_DBG(pm8001_ha,
3698
- pm8001_printk("OPC_OUB_SET_DEVICE_STATE\n"));
3974
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEVICE_STATE\n");
36993975 pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb);
37003976 break;
37013977 case OPC_OUB_GET_DEVICE_STATE:
3702
- PM8001_MSG_DBG(pm8001_ha,
3703
- pm8001_printk("OPC_OUB_GET_DEVICE_STATE\n"));
3978
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEVICE_STATE\n");
37043979 break;
37053980 case OPC_OUB_SET_DEV_INFO:
3706
- PM8001_MSG_DBG(pm8001_ha,
3707
- pm8001_printk("OPC_OUB_SET_DEV_INFO\n"));
3981
+ pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n");
37083982 break;
37093983 /* spcv specifc commands */
37103984 case OPC_OUB_PHY_START_RESP:
3711
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3712
- "OPC_OUB_PHY_START_RESP opcode:%x\n", opc));
3985
+ pm8001_dbg(pm8001_ha, MSG,
3986
+ "OPC_OUB_PHY_START_RESP opcode:%x\n", opc);
37133987 mpi_phy_start_resp(pm8001_ha, piomb);
37143988 break;
37153989 case OPC_OUB_PHY_STOP_RESP:
3716
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3717
- "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc));
3990
+ pm8001_dbg(pm8001_ha, MSG,
3991
+ "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc);
37183992 mpi_phy_stop_resp(pm8001_ha, piomb);
37193993 break;
37203994 case OPC_OUB_SET_CONTROLLER_CONFIG:
3721
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3722
- "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc));
3995
+ pm8001_dbg(pm8001_ha, MSG,
3996
+ "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc);
37233997 mpi_set_controller_config_resp(pm8001_ha, piomb);
37243998 break;
37253999 case OPC_OUB_GET_CONTROLLER_CONFIG:
3726
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3727
- "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc));
4000
+ pm8001_dbg(pm8001_ha, MSG,
4001
+ "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc);
37284002 mpi_get_controller_config_resp(pm8001_ha, piomb);
37294003 break;
37304004 case OPC_OUB_GET_PHY_PROFILE:
3731
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3732
- "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc));
4005
+ pm8001_dbg(pm8001_ha, MSG,
4006
+ "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc);
37334007 mpi_get_phy_profile_resp(pm8001_ha, piomb);
37344008 break;
37354009 case OPC_OUB_FLASH_OP_EXT:
3736
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3737
- "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc));
4010
+ pm8001_dbg(pm8001_ha, MSG,
4011
+ "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc);
37384012 mpi_flash_op_ext_resp(pm8001_ha, piomb);
37394013 break;
37404014 case OPC_OUB_SET_PHY_PROFILE:
3741
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3742
- "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc));
4015
+ pm8001_dbg(pm8001_ha, MSG,
4016
+ "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc);
37434017 mpi_set_phy_profile_resp(pm8001_ha, piomb);
37444018 break;
37454019 case OPC_OUB_KEK_MANAGEMENT_RESP:
3746
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3747
- "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc));
4020
+ pm8001_dbg(pm8001_ha, MSG,
4021
+ "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc);
37484022 mpi_kek_management_resp(pm8001_ha, piomb);
37494023 break;
37504024 case OPC_OUB_DEK_MANAGEMENT_RESP:
3751
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3752
- "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc));
4025
+ pm8001_dbg(pm8001_ha, MSG,
4026
+ "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc);
37534027 mpi_dek_management_resp(pm8001_ha, piomb);
37544028 break;
37554029 case OPC_OUB_SSP_COALESCED_COMP_RESP:
3756
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3757
- "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc));
4030
+ pm8001_dbg(pm8001_ha, MSG,
4031
+ "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc);
37584032 ssp_coalesced_comp_resp(pm8001_ha, piomb);
37594033 break;
37604034 default:
3761
- PM8001_MSG_DBG(pm8001_ha, pm8001_printk(
3762
- "Unknown outbound Queue IOMB OPC = 0x%x\n", opc));
4035
+ pm8001_dbg(pm8001_ha, DEVIO,
4036
+ "Unknown outbound Queue IOMB OPC = 0x%x\n", opc);
37634037 break;
37644038 }
37654039 }
37664040
37674041 static void print_scratchpad_registers(struct pm8001_hba_info *pm8001_ha)
37684042 {
3769
- PM8001_FAIL_DBG(pm8001_ha,
3770
- pm8001_printk("MSGU_SCRATCH_PAD_0: 0x%x\n",
3771
- pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0)));
3772
- PM8001_FAIL_DBG(pm8001_ha,
3773
- pm8001_printk("MSGU_SCRATCH_PAD_1:0x%x\n",
3774
- pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1)));
3775
- PM8001_FAIL_DBG(pm8001_ha,
3776
- pm8001_printk("MSGU_SCRATCH_PAD_2: 0x%x\n",
3777
- pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2)));
3778
- PM8001_FAIL_DBG(pm8001_ha,
3779
- pm8001_printk("MSGU_SCRATCH_PAD_3: 0x%x\n",
3780
- pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3)));
3781
- PM8001_FAIL_DBG(pm8001_ha,
3782
- pm8001_printk("MSGU_HOST_SCRATCH_PAD_0: 0x%x\n",
3783
- pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0)));
3784
- PM8001_FAIL_DBG(pm8001_ha,
3785
- pm8001_printk("MSGU_HOST_SCRATCH_PAD_1: 0x%x\n",
3786
- pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1)));
3787
- PM8001_FAIL_DBG(pm8001_ha,
3788
- pm8001_printk("MSGU_HOST_SCRATCH_PAD_2: 0x%x\n",
3789
- pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2)));
3790
- PM8001_FAIL_DBG(pm8001_ha,
3791
- pm8001_printk("MSGU_HOST_SCRATCH_PAD_3: 0x%x\n",
3792
- pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3)));
3793
- PM8001_FAIL_DBG(pm8001_ha,
3794
- pm8001_printk("MSGU_HOST_SCRATCH_PAD_4: 0x%x\n",
3795
- pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4)));
3796
- PM8001_FAIL_DBG(pm8001_ha,
3797
- pm8001_printk("MSGU_HOST_SCRATCH_PAD_5: 0x%x\n",
3798
- pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5)));
3799
- PM8001_FAIL_DBG(pm8001_ha,
3800
- pm8001_printk("MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n",
3801
- pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6)));
3802
- PM8001_FAIL_DBG(pm8001_ha,
3803
- pm8001_printk("MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n",
3804
- pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7)));
4043
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_0: 0x%x\n",
4044
+ pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0));
4045
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_1:0x%x\n",
4046
+ pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1));
4047
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_2: 0x%x\n",
4048
+ pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2));
4049
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_3: 0x%x\n",
4050
+ pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3));
4051
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_0: 0x%x\n",
4052
+ pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0));
4053
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_1: 0x%x\n",
4054
+ pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1));
4055
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_2: 0x%x\n",
4056
+ pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2));
4057
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_3: 0x%x\n",
4058
+ pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3));
4059
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_4: 0x%x\n",
4060
+ pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4));
4061
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_5: 0x%x\n",
4062
+ pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5));
4063
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n",
4064
+ pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6));
4065
+ pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n",
4066
+ pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7));
38054067 }
38064068
38074069 static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec)
38084070 {
38094071 struct outbound_queue_table *circularQ;
38104072 void *pMsg1 = NULL;
3811
- u8 uninitialized_var(bc);
4073
+ u8 bc;
38124074 u32 ret = MPI_IO_STATUS_FAIL;
38134075 unsigned long flags;
38144076 u32 regval;
38154077
3816
- if (vec == (pm8001_ha->number_of_intr - 1)) {
4078
+ /*
4079
+ * Fatal errors are programmed to be signalled in irq vector
4080
+ * pm8001_ha->max_q_num - 1 through pm8001_ha->main_cfg_tbl.pm80xx_tbl.
4081
+ * fatal_err_interrupt
4082
+ */
4083
+ if (vec == (pm8001_ha->max_q_num - 1)) {
4084
+ u32 mipsall_ready;
4085
+
4086
+ if (pm8001_ha->chip_id == chip_8008 ||
4087
+ pm8001_ha->chip_id == chip_8009)
4088
+ mipsall_ready = SCRATCH_PAD_MIPSALL_READY_8PORT;
4089
+ else
4090
+ mipsall_ready = SCRATCH_PAD_MIPSALL_READY_16PORT;
4091
+
38174092 regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
3818
- if ((regval & SCRATCH_PAD_MIPSALL_READY) !=
3819
- SCRATCH_PAD_MIPSALL_READY) {
4093
+ if ((regval & mipsall_ready) != mipsall_ready) {
38204094 pm8001_ha->controller_fatal_error = true;
3821
- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
3822
- "Firmware Fatal error! Regval:0x%x\n", regval));
4095
+ pm8001_dbg(pm8001_ha, FAIL,
4096
+ "Firmware Fatal error! Regval:0x%x\n",
4097
+ regval);
38234098 print_scratchpad_registers(pm8001_ha);
38244099 return ret;
38254100 }
....@@ -3855,12 +4130,12 @@
38554130 return ret;
38564131 }
38574132
3858
-/* PCI_DMA_... to our direction translation. */
4133
+/* DMA_... to our direction translation. */
38594134 static const u8 data_dir_flags[] = {
3860
- [PCI_DMA_BIDIRECTIONAL] = DATA_DIR_BYRECIPIENT,/* UNSPECIFIED */
3861
- [PCI_DMA_TODEVICE] = DATA_DIR_OUT,/* OUTBOUND */
3862
- [PCI_DMA_FROMDEVICE] = DATA_DIR_IN,/* INBOUND */
3863
- [PCI_DMA_NONE] = DATA_DIR_NONE,/* NO TRANSFER */
4135
+ [DMA_BIDIRECTIONAL] = DATA_DIR_BYRECIPIENT, /* UNSPECIFIED */
4136
+ [DMA_TO_DEVICE] = DATA_DIR_OUT, /* OUTBOUND */
4137
+ [DMA_FROM_DEVICE] = DATA_DIR_IN, /* INBOUND */
4138
+ [DMA_NONE] = DATA_DIR_NONE, /* NO TRANSFER */
38644139 };
38654140
38664141 static void build_smp_cmd(u32 deviceID, __le32 hTag,
....@@ -3902,13 +4177,13 @@
39024177 * DMA-map SMP request, response buffers
39034178 */
39044179 sg_req = &task->smp_task.smp_req;
3905
- elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, PCI_DMA_TODEVICE);
4180
+ elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, DMA_TO_DEVICE);
39064181 if (!elem)
39074182 return -ENOMEM;
39084183 req_len = sg_dma_len(sg_req);
39094184
39104185 sg_resp = &task->smp_task.smp_resp;
3911
- elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, PCI_DMA_FROMDEVICE);
4186
+ elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, DMA_FROM_DEVICE);
39124187 if (!elem) {
39134188 rc = -ENOMEM;
39144189 goto err_out;
....@@ -3925,8 +4200,7 @@
39254200 smp_cmd.tag = cpu_to_le32(ccb->ccb_tag);
39264201
39274202 length = sg_req->length;
3928
- PM8001_IO_DBG(pm8001_ha,
3929
- pm8001_printk("SMP Frame Length %d\n", sg_req->length));
4203
+ pm8001_dbg(pm8001_ha, IO, "SMP Frame Length %d\n", sg_req->length);
39304204 if (!(length - 8))
39314205 pm8001_ha->smp_exp_mode = SMP_DIRECT;
39324206 else
....@@ -3938,8 +4212,7 @@
39384212
39394213 /* INDIRECT MODE command settings. Use DMA */
39404214 if (pm8001_ha->smp_exp_mode == SMP_INDIRECT) {
3941
- PM8001_IO_DBG(pm8001_ha,
3942
- pm8001_printk("SMP REQUEST INDIRECT MODE\n"));
4215
+ pm8001_dbg(pm8001_ha, IO, "SMP REQUEST INDIRECT MODE\n");
39434216 /* for SPCv indirect mode. Place the top 4 bytes of
39444217 * SMP Request header here. */
39454218 for (i = 0; i < 4; i++)
....@@ -3971,38 +4244,37 @@
39714244 ((u32)sg_dma_len(&task->smp_task.smp_resp)-4);
39724245 }
39734246 if (pm8001_ha->smp_exp_mode == SMP_DIRECT) {
3974
- PM8001_IO_DBG(pm8001_ha,
3975
- pm8001_printk("SMP REQUEST DIRECT MODE\n"));
4247
+ pm8001_dbg(pm8001_ha, IO, "SMP REQUEST DIRECT MODE\n");
39764248 for (i = 0; i < length; i++)
39774249 if (i < 16) {
39784250 smp_cmd.smp_req16[i] = *(preq_dma_addr+i);
3979
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
3980
- "Byte[%d]:%x (DMA data:%x)\n",
3981
- i, smp_cmd.smp_req16[i],
3982
- *(preq_dma_addr)));
4251
+ pm8001_dbg(pm8001_ha, IO,
4252
+ "Byte[%d]:%x (DMA data:%x)\n",
4253
+ i, smp_cmd.smp_req16[i],
4254
+ *(preq_dma_addr));
39834255 } else {
39844256 smp_cmd.smp_req[i] = *(preq_dma_addr+i);
3985
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
3986
- "Byte[%d]:%x (DMA data:%x)\n",
3987
- i, smp_cmd.smp_req[i],
3988
- *(preq_dma_addr)));
4257
+ pm8001_dbg(pm8001_ha, IO,
4258
+ "Byte[%d]:%x (DMA data:%x)\n",
4259
+ i, smp_cmd.smp_req[i],
4260
+ *(preq_dma_addr));
39894261 }
39904262 }
39914263
39924264 build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag,
39934265 &smp_cmd, pm8001_ha->smp_exp_mode, length);
3994
- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,
3995
- (u32 *)&smp_cmd, 0);
4266
+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &smp_cmd,
4267
+ sizeof(smp_cmd), 0);
39964268 if (rc)
39974269 goto err_out_2;
39984270 return 0;
39994271
40004272 err_out_2:
40014273 dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_resp, 1,
4002
- PCI_DMA_FROMDEVICE);
4274
+ DMA_FROM_DEVICE);
40034275 err_out:
40044276 dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_req, 1,
4005
- PCI_DMA_TODEVICE);
4277
+ DMA_TO_DEVICE);
40064278 return rc;
40074279 }
40084280
....@@ -4053,13 +4325,15 @@
40534325 struct ssp_ini_io_start_req ssp_cmd;
40544326 u32 tag = ccb->ccb_tag;
40554327 int ret;
4056
- u64 phys_addr, start_addr, end_addr;
4328
+ u64 phys_addr, end_addr;
40574329 u32 end_addr_high, end_addr_low;
40584330 struct inbound_queue_table *circularQ;
4059
- u32 q_index;
4331
+ u32 q_index, cpu_id;
40604332 u32 opc = OPC_INB_SSPINIIOSTART;
4333
+
40614334 memset(&ssp_cmd, 0, sizeof(ssp_cmd));
40624335 memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8);
4336
+
40634337 /* data address domain added for spcv; set to 0 by host,
40644338 * used internally by controller
40654339 * 0 for SAS 1.1 and SAS 2.0 compatible TLR
....@@ -4070,20 +4344,21 @@
40704344 ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id);
40714345 ssp_cmd.tag = cpu_to_le32(tag);
40724346 if (task->ssp_task.enable_first_burst)
4073
- ssp_cmd.ssp_iu.efb_prio_attr |= 0x80;
4347
+ ssp_cmd.ssp_iu.efb_prio_attr = 0x80;
40744348 ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_prio << 3);
40754349 ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_attr & 7);
40764350 memcpy(ssp_cmd.ssp_iu.cdb, task->ssp_task.cmd->cmnd,
40774351 task->ssp_task.cmd->cmd_len);
4078
- q_index = (u32) (pm8001_dev->id & 0x00ffffff) % PM8001_MAX_INB_NUM;
4352
+ cpu_id = smp_processor_id();
4353
+ q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num);
40794354 circularQ = &pm8001_ha->inbnd_q_tbl[q_index];
40804355
40814356 /* Check if encryption is set */
40824357 if (pm8001_ha->chip->encrypt &&
40834358 !(pm8001_ha->encrypt_info.status) && check_enc_sas_cmd(task)) {
4084
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
4085
- "Encryption enabled.Sending Encrypt SAS command 0x%x\n",
4086
- task->ssp_task.cmd->cmnd[0]));
4359
+ pm8001_dbg(pm8001_ha, IO,
4360
+ "Encryption enabled.Sending Encrypt SAS command 0x%x\n",
4361
+ task->ssp_task.cmd->cmnd[0]);
40874362 opc = OPC_INB_SSP_INI_DIF_ENC_IO;
40884363 /* enable encryption. 0 for SAS 1.1 and SAS 2.0 compatible TLR*/
40894364 ssp_cmd.dad_dir_m_tlr = cpu_to_le32
....@@ -4093,8 +4368,7 @@
40934368 if (task->num_scatter > 1) {
40944369 pm8001_chip_make_sg(task->scatter,
40954370 ccb->n_elem, ccb->buf_prd);
4096
- phys_addr = ccb->ccb_dma_handle +
4097
- offsetof(struct pm8001_ccb_info, buf_prd[0]);
4371
+ phys_addr = ccb->ccb_dma_handle;
40984372 ssp_cmd.enc_addr_low =
40994373 cpu_to_le32(lower_32_bits(phys_addr));
41004374 ssp_cmd.enc_addr_high =
....@@ -4102,35 +4376,33 @@
41024376 ssp_cmd.enc_esgl = cpu_to_le32(1<<31);
41034377 } else if (task->num_scatter == 1) {
41044378 u64 dma_addr = sg_dma_address(task->scatter);
4379
+
41054380 ssp_cmd.enc_addr_low =
41064381 cpu_to_le32(lower_32_bits(dma_addr));
41074382 ssp_cmd.enc_addr_high =
41084383 cpu_to_le32(upper_32_bits(dma_addr));
41094384 ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len);
41104385 ssp_cmd.enc_esgl = 0;
4386
+
41114387 /* Check 4G Boundary */
4112
- start_addr = cpu_to_le64(dma_addr);
4113
- end_addr = (start_addr + ssp_cmd.enc_len) - 1;
4114
- end_addr_low = cpu_to_le32(lower_32_bits(end_addr));
4115
- end_addr_high = cpu_to_le32(upper_32_bits(end_addr));
4116
- if (end_addr_high != ssp_cmd.enc_addr_high) {
4117
- PM8001_FAIL_DBG(pm8001_ha,
4118
- pm8001_printk("The sg list address "
4119
- "start_addr=0x%016llx data_len=0x%x "
4120
- "end_addr_high=0x%08x end_addr_low="
4121
- "0x%08x has crossed 4G boundary\n",
4122
- start_addr, ssp_cmd.enc_len,
4123
- end_addr_high, end_addr_low));
4388
+ end_addr = dma_addr + le32_to_cpu(ssp_cmd.enc_len) - 1;
4389
+ end_addr_low = lower_32_bits(end_addr);
4390
+ end_addr_high = upper_32_bits(end_addr);
4391
+
4392
+ if (end_addr_high != le32_to_cpu(ssp_cmd.enc_addr_high)) {
4393
+ pm8001_dbg(pm8001_ha, FAIL,
4394
+ "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n",
4395
+ dma_addr,
4396
+ le32_to_cpu(ssp_cmd.enc_len),
4397
+ end_addr_high, end_addr_low);
41244398 pm8001_chip_make_sg(task->scatter, 1,
41254399 ccb->buf_prd);
4126
- phys_addr = ccb->ccb_dma_handle +
4127
- offsetof(struct pm8001_ccb_info,
4128
- buf_prd[0]);
4400
+ phys_addr = ccb->ccb_dma_handle;
41294401 ssp_cmd.enc_addr_low =
41304402 cpu_to_le32(lower_32_bits(phys_addr));
41314403 ssp_cmd.enc_addr_high =
41324404 cpu_to_le32(upper_32_bits(phys_addr));
4133
- ssp_cmd.enc_esgl = cpu_to_le32(1<<31);
4405
+ ssp_cmd.enc_esgl = cpu_to_le32(1U<<31);
41344406 }
41354407 } else if (task->num_scatter == 0) {
41364408 ssp_cmd.enc_addr_low = 0;
....@@ -4138,23 +4410,24 @@
41384410 ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len);
41394411 ssp_cmd.enc_esgl = 0;
41404412 }
4413
+
41414414 /* XTS mode. All other fields are 0 */
4142
- ssp_cmd.key_cmode = 0x6 << 4;
4415
+ ssp_cmd.key_cmode = cpu_to_le32(0x6 << 4);
4416
+
41434417 /* set tweak values. Should be the start lba */
41444418 ssp_cmd.twk_val0 = cpu_to_le32((task->ssp_task.cmd->cmnd[2] << 24) |
41454419 (task->ssp_task.cmd->cmnd[3] << 16) |
41464420 (task->ssp_task.cmd->cmnd[4] << 8) |
41474421 (task->ssp_task.cmd->cmnd[5]));
41484422 } else {
4149
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
4150
- "Sending Normal SAS command 0x%x inb q %x\n",
4151
- task->ssp_task.cmd->cmnd[0], q_index));
4423
+ pm8001_dbg(pm8001_ha, IO,
4424
+ "Sending Normal SAS command 0x%x inb q %x\n",
4425
+ task->ssp_task.cmd->cmnd[0], q_index);
41524426 /* fill in PRD (scatter/gather) table, if any */
41534427 if (task->num_scatter > 1) {
41544428 pm8001_chip_make_sg(task->scatter, ccb->n_elem,
41554429 ccb->buf_prd);
4156
- phys_addr = ccb->ccb_dma_handle +
4157
- offsetof(struct pm8001_ccb_info, buf_prd[0]);
4430
+ phys_addr = ccb->ccb_dma_handle;
41584431 ssp_cmd.addr_low =
41594432 cpu_to_le32(lower_32_bits(phys_addr));
41604433 ssp_cmd.addr_high =
....@@ -4162,29 +4435,26 @@
41624435 ssp_cmd.esgl = cpu_to_le32(1<<31);
41634436 } else if (task->num_scatter == 1) {
41644437 u64 dma_addr = sg_dma_address(task->scatter);
4438
+
41654439 ssp_cmd.addr_low = cpu_to_le32(lower_32_bits(dma_addr));
41664440 ssp_cmd.addr_high =
41674441 cpu_to_le32(upper_32_bits(dma_addr));
41684442 ssp_cmd.len = cpu_to_le32(task->total_xfer_len);
41694443 ssp_cmd.esgl = 0;
4444
+
41704445 /* Check 4G Boundary */
4171
- start_addr = cpu_to_le64(dma_addr);
4172
- end_addr = (start_addr + ssp_cmd.len) - 1;
4173
- end_addr_low = cpu_to_le32(lower_32_bits(end_addr));
4174
- end_addr_high = cpu_to_le32(upper_32_bits(end_addr));
4175
- if (end_addr_high != ssp_cmd.addr_high) {
4176
- PM8001_FAIL_DBG(pm8001_ha,
4177
- pm8001_printk("The sg list address "
4178
- "start_addr=0x%016llx data_len=0x%x "
4179
- "end_addr_high=0x%08x end_addr_low="
4180
- "0x%08x has crossed 4G boundary\n",
4181
- start_addr, ssp_cmd.len,
4182
- end_addr_high, end_addr_low));
4446
+ end_addr = dma_addr + le32_to_cpu(ssp_cmd.len) - 1;
4447
+ end_addr_low = lower_32_bits(end_addr);
4448
+ end_addr_high = upper_32_bits(end_addr);
4449
+ if (end_addr_high != le32_to_cpu(ssp_cmd.addr_high)) {
4450
+ pm8001_dbg(pm8001_ha, FAIL,
4451
+ "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n",
4452
+ dma_addr,
4453
+ le32_to_cpu(ssp_cmd.len),
4454
+ end_addr_high, end_addr_low);
41834455 pm8001_chip_make_sg(task->scatter, 1,
41844456 ccb->buf_prd);
4185
- phys_addr = ccb->ccb_dma_handle +
4186
- offsetof(struct pm8001_ccb_info,
4187
- buf_prd[0]);
4457
+ phys_addr = ccb->ccb_dma_handle;
41884458 ssp_cmd.addr_low =
41894459 cpu_to_le32(lower_32_bits(phys_addr));
41904460 ssp_cmd.addr_high =
....@@ -4198,9 +4468,8 @@
41984468 ssp_cmd.esgl = 0;
41994469 }
42004470 }
4201
- q_index = (u32) (pm8001_dev->id & 0x00ffffff) % PM8001_MAX_OUTB_NUM;
42024471 ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,
4203
- &ssp_cmd, q_index);
4472
+ &ssp_cmd, sizeof(ssp_cmd), q_index);
42044473 return ret;
42054474 }
42064475
....@@ -4212,10 +4481,10 @@
42124481 struct pm8001_device *pm8001_ha_dev = dev->lldd_dev;
42134482 u32 tag = ccb->ccb_tag;
42144483 int ret;
4215
- u32 q_index;
4484
+ u32 q_index, cpu_id;
42164485 struct sata_start_req sata_cmd;
42174486 u32 hdr_tag, ncg_tag = 0;
4218
- u64 phys_addr, start_addr, end_addr;
4487
+ u64 phys_addr, end_addr;
42194488 u32 end_addr_high, end_addr_low;
42204489 u32 ATAP = 0x0;
42214490 u32 dir;
....@@ -4223,24 +4492,24 @@
42234492 unsigned long flags;
42244493 u32 opc = OPC_INB_SATA_HOST_OPSTART;
42254494 memset(&sata_cmd, 0, sizeof(sata_cmd));
4226
- q_index = (u32) (pm8001_ha_dev->id & 0x00ffffff) % PM8001_MAX_INB_NUM;
4495
+ cpu_id = smp_processor_id();
4496
+ q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num);
42274497 circularQ = &pm8001_ha->inbnd_q_tbl[q_index];
42284498
4229
- if (task->data_dir == PCI_DMA_NONE) {
4499
+ if (task->data_dir == DMA_NONE && !task->ata_task.use_ncq) {
42304500 ATAP = 0x04; /* no data*/
4231
- PM8001_IO_DBG(pm8001_ha, pm8001_printk("no data\n"));
4501
+ pm8001_dbg(pm8001_ha, IO, "no data\n");
42324502 } else if (likely(!task->ata_task.device_control_reg_update)) {
4233
- if (task->ata_task.dma_xfer) {
4234
- ATAP = 0x06; /* DMA */
4235
- PM8001_IO_DBG(pm8001_ha, pm8001_printk("DMA\n"));
4236
- } else {
4237
- ATAP = 0x05; /* PIO*/
4238
- PM8001_IO_DBG(pm8001_ha, pm8001_printk("PIO\n"));
4239
- }
42404503 if (task->ata_task.use_ncq &&
42414504 dev->sata_dev.class != ATA_DEV_ATAPI) {
42424505 ATAP = 0x07; /* FPDMA */
4243
- PM8001_IO_DBG(pm8001_ha, pm8001_printk("FPDMA\n"));
4506
+ pm8001_dbg(pm8001_ha, IO, "FPDMA\n");
4507
+ } else if (task->ata_task.dma_xfer) {
4508
+ ATAP = 0x06; /* DMA */
4509
+ pm8001_dbg(pm8001_ha, IO, "DMA\n");
4510
+ } else {
4511
+ ATAP = 0x05; /* PIO*/
4512
+ pm8001_dbg(pm8001_ha, IO, "PIO\n");
42444513 }
42454514 }
42464515 if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) {
....@@ -4260,9 +4529,9 @@
42604529 /* Check if encryption is set */
42614530 if (pm8001_ha->chip->encrypt &&
42624531 !(pm8001_ha->encrypt_info.status) && check_enc_sat_cmd(task)) {
4263
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
4264
- "Encryption enabled.Sending Encrypt SATA cmd 0x%x\n",
4265
- sata_cmd.sata_fis.command));
4532
+ pm8001_dbg(pm8001_ha, IO,
4533
+ "Encryption enabled.Sending Encrypt SATA cmd 0x%x\n",
4534
+ sata_cmd.sata_fis.command);
42664535 opc = OPC_INB_SATA_DIF_ENC_IO;
42674536
42684537 /* set encryption bit */
....@@ -4274,39 +4543,39 @@
42744543 if (task->num_scatter > 1) {
42754544 pm8001_chip_make_sg(task->scatter,
42764545 ccb->n_elem, ccb->buf_prd);
4277
- phys_addr = ccb->ccb_dma_handle +
4278
- offsetof(struct pm8001_ccb_info, buf_prd[0]);
4279
- sata_cmd.enc_addr_low = lower_32_bits(phys_addr);
4280
- sata_cmd.enc_addr_high = upper_32_bits(phys_addr);
4546
+ phys_addr = ccb->ccb_dma_handle;
4547
+ sata_cmd.enc_addr_low =
4548
+ cpu_to_le32(lower_32_bits(phys_addr));
4549
+ sata_cmd.enc_addr_high =
4550
+ cpu_to_le32(upper_32_bits(phys_addr));
42814551 sata_cmd.enc_esgl = cpu_to_le32(1 << 31);
42824552 } else if (task->num_scatter == 1) {
42834553 u64 dma_addr = sg_dma_address(task->scatter);
4284
- sata_cmd.enc_addr_low = lower_32_bits(dma_addr);
4285
- sata_cmd.enc_addr_high = upper_32_bits(dma_addr);
4554
+
4555
+ sata_cmd.enc_addr_low =
4556
+ cpu_to_le32(lower_32_bits(dma_addr));
4557
+ sata_cmd.enc_addr_high =
4558
+ cpu_to_le32(upper_32_bits(dma_addr));
42864559 sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len);
42874560 sata_cmd.enc_esgl = 0;
4561
+
42884562 /* Check 4G Boundary */
4289
- start_addr = cpu_to_le64(dma_addr);
4290
- end_addr = (start_addr + sata_cmd.enc_len) - 1;
4291
- end_addr_low = cpu_to_le32(lower_32_bits(end_addr));
4292
- end_addr_high = cpu_to_le32(upper_32_bits(end_addr));
4293
- if (end_addr_high != sata_cmd.enc_addr_high) {
4294
- PM8001_FAIL_DBG(pm8001_ha,
4295
- pm8001_printk("The sg list address "
4296
- "start_addr=0x%016llx data_len=0x%x "
4297
- "end_addr_high=0x%08x end_addr_low"
4298
- "=0x%08x has crossed 4G boundary\n",
4299
- start_addr, sata_cmd.enc_len,
4300
- end_addr_high, end_addr_low));
4563
+ end_addr = dma_addr + le32_to_cpu(sata_cmd.enc_len) - 1;
4564
+ end_addr_low = lower_32_bits(end_addr);
4565
+ end_addr_high = upper_32_bits(end_addr);
4566
+ if (end_addr_high != le32_to_cpu(sata_cmd.enc_addr_high)) {
4567
+ pm8001_dbg(pm8001_ha, FAIL,
4568
+ "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n",
4569
+ dma_addr,
4570
+ le32_to_cpu(sata_cmd.enc_len),
4571
+ end_addr_high, end_addr_low);
43014572 pm8001_chip_make_sg(task->scatter, 1,
43024573 ccb->buf_prd);
4303
- phys_addr = ccb->ccb_dma_handle +
4304
- offsetof(struct pm8001_ccb_info,
4305
- buf_prd[0]);
4574
+ phys_addr = ccb->ccb_dma_handle;
43064575 sata_cmd.enc_addr_low =
4307
- lower_32_bits(phys_addr);
4576
+ cpu_to_le32(lower_32_bits(phys_addr));
43084577 sata_cmd.enc_addr_high =
4309
- upper_32_bits(phys_addr);
4578
+ cpu_to_le32(upper_32_bits(phys_addr));
43104579 sata_cmd.enc_esgl =
43114580 cpu_to_le32(1 << 31);
43124581 }
....@@ -4317,7 +4586,8 @@
43174586 sata_cmd.enc_esgl = 0;
43184587 }
43194588 /* XTS mode. All other fields are 0 */
4320
- sata_cmd.key_index_mode = 0x6 << 4;
4589
+ sata_cmd.key_index_mode = cpu_to_le32(0x6 << 4);
4590
+
43214591 /* set tweak values. Should be the start lba */
43224592 sata_cmd.twk_val0 =
43234593 cpu_to_le32((sata_cmd.sata_fis.lbal_exp << 24) |
....@@ -4328,9 +4598,9 @@
43284598 cpu_to_le32((sata_cmd.sata_fis.lbah_exp << 8) |
43294599 (sata_cmd.sata_fis.lbam_exp));
43304600 } else {
4331
- PM8001_IO_DBG(pm8001_ha, pm8001_printk(
4332
- "Sending Normal SATA command 0x%x inb %x\n",
4333
- sata_cmd.sata_fis.command, q_index));
4601
+ pm8001_dbg(pm8001_ha, IO,
4602
+ "Sending Normal SATA command 0x%x inb %x\n",
4603
+ sata_cmd.sata_fis.command, q_index);
43344604 /* dad (bit 0-1) is 0 */
43354605 sata_cmd.ncqtag_atap_dir_m_dad =
43364606 cpu_to_le32(((ncg_tag & 0xff)<<16) |
....@@ -4340,40 +4610,34 @@
43404610 if (task->num_scatter > 1) {
43414611 pm8001_chip_make_sg(task->scatter,
43424612 ccb->n_elem, ccb->buf_prd);
4343
- phys_addr = ccb->ccb_dma_handle +
4344
- offsetof(struct pm8001_ccb_info, buf_prd[0]);
4613
+ phys_addr = ccb->ccb_dma_handle;
43454614 sata_cmd.addr_low = lower_32_bits(phys_addr);
43464615 sata_cmd.addr_high = upper_32_bits(phys_addr);
4347
- sata_cmd.esgl = cpu_to_le32(1 << 31);
4616
+ sata_cmd.esgl = cpu_to_le32(1U << 31);
43484617 } else if (task->num_scatter == 1) {
43494618 u64 dma_addr = sg_dma_address(task->scatter);
4619
+
43504620 sata_cmd.addr_low = lower_32_bits(dma_addr);
43514621 sata_cmd.addr_high = upper_32_bits(dma_addr);
43524622 sata_cmd.len = cpu_to_le32(task->total_xfer_len);
43534623 sata_cmd.esgl = 0;
4624
+
43544625 /* Check 4G Boundary */
4355
- start_addr = cpu_to_le64(dma_addr);
4356
- end_addr = (start_addr + sata_cmd.len) - 1;
4357
- end_addr_low = cpu_to_le32(lower_32_bits(end_addr));
4358
- end_addr_high = cpu_to_le32(upper_32_bits(end_addr));
4626
+ end_addr = dma_addr + le32_to_cpu(sata_cmd.len) - 1;
4627
+ end_addr_low = lower_32_bits(end_addr);
4628
+ end_addr_high = upper_32_bits(end_addr);
43594629 if (end_addr_high != sata_cmd.addr_high) {
4360
- PM8001_FAIL_DBG(pm8001_ha,
4361
- pm8001_printk("The sg list address "
4362
- "start_addr=0x%016llx data_len=0x%x"
4363
- "end_addr_high=0x%08x end_addr_low="
4364
- "0x%08x has crossed 4G boundary\n",
4365
- start_addr, sata_cmd.len,
4366
- end_addr_high, end_addr_low));
4630
+ pm8001_dbg(pm8001_ha, FAIL,
4631
+ "The sg list address start_addr=0x%016llx data_len=0x%xend_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n",
4632
+ dma_addr,
4633
+ le32_to_cpu(sata_cmd.len),
4634
+ end_addr_high, end_addr_low);
43674635 pm8001_chip_make_sg(task->scatter, 1,
43684636 ccb->buf_prd);
4369
- phys_addr = ccb->ccb_dma_handle +
4370
- offsetof(struct pm8001_ccb_info,
4371
- buf_prd[0]);
4372
- sata_cmd.addr_low =
4373
- lower_32_bits(phys_addr);
4374
- sata_cmd.addr_high =
4375
- upper_32_bits(phys_addr);
4376
- sata_cmd.esgl = cpu_to_le32(1 << 31);
4637
+ phys_addr = ccb->ccb_dma_handle;
4638
+ sata_cmd.addr_low = lower_32_bits(phys_addr);
4639
+ sata_cmd.addr_high = upper_32_bits(phys_addr);
4640
+ sata_cmd.esgl = cpu_to_le32(1U << 31);
43774641 }
43784642 } else if (task->num_scatter == 0) {
43794643 sata_cmd.addr_low = 0;
....@@ -4381,27 +4645,28 @@
43814645 sata_cmd.len = cpu_to_le32(task->total_xfer_len);
43824646 sata_cmd.esgl = 0;
43834647 }
4384
- /* scsi cdb */
4385
- sata_cmd.atapi_scsi_cdb[0] =
4386
- cpu_to_le32(((task->ata_task.atapi_packet[0]) |
4387
- (task->ata_task.atapi_packet[1] << 8) |
4388
- (task->ata_task.atapi_packet[2] << 16) |
4389
- (task->ata_task.atapi_packet[3] << 24)));
4390
- sata_cmd.atapi_scsi_cdb[1] =
4391
- cpu_to_le32(((task->ata_task.atapi_packet[4]) |
4392
- (task->ata_task.atapi_packet[5] << 8) |
4393
- (task->ata_task.atapi_packet[6] << 16) |
4394
- (task->ata_task.atapi_packet[7] << 24)));
4395
- sata_cmd.atapi_scsi_cdb[2] =
4396
- cpu_to_le32(((task->ata_task.atapi_packet[8]) |
4397
- (task->ata_task.atapi_packet[9] << 8) |
4398
- (task->ata_task.atapi_packet[10] << 16) |
4399
- (task->ata_task.atapi_packet[11] << 24)));
4400
- sata_cmd.atapi_scsi_cdb[3] =
4401
- cpu_to_le32(((task->ata_task.atapi_packet[12]) |
4402
- (task->ata_task.atapi_packet[13] << 8) |
4403
- (task->ata_task.atapi_packet[14] << 16) |
4404
- (task->ata_task.atapi_packet[15] << 24)));
4648
+
4649
+ /* scsi cdb */
4650
+ sata_cmd.atapi_scsi_cdb[0] =
4651
+ cpu_to_le32(((task->ata_task.atapi_packet[0]) |
4652
+ (task->ata_task.atapi_packet[1] << 8) |
4653
+ (task->ata_task.atapi_packet[2] << 16) |
4654
+ (task->ata_task.atapi_packet[3] << 24)));
4655
+ sata_cmd.atapi_scsi_cdb[1] =
4656
+ cpu_to_le32(((task->ata_task.atapi_packet[4]) |
4657
+ (task->ata_task.atapi_packet[5] << 8) |
4658
+ (task->ata_task.atapi_packet[6] << 16) |
4659
+ (task->ata_task.atapi_packet[7] << 24)));
4660
+ sata_cmd.atapi_scsi_cdb[2] =
4661
+ cpu_to_le32(((task->ata_task.atapi_packet[8]) |
4662
+ (task->ata_task.atapi_packet[9] << 8) |
4663
+ (task->ata_task.atapi_packet[10] << 16) |
4664
+ (task->ata_task.atapi_packet[11] << 24)));
4665
+ sata_cmd.atapi_scsi_cdb[3] =
4666
+ cpu_to_le32(((task->ata_task.atapi_packet[12]) |
4667
+ (task->ata_task.atapi_packet[13] << 8) |
4668
+ (task->ata_task.atapi_packet[14] << 16) |
4669
+ (task->ata_task.atapi_packet[15] << 24)));
44054670 }
44064671
44074672 /* Check for read log for failed drive and return */
....@@ -4416,7 +4681,7 @@
44164681
44174682 spin_lock_irqsave(&task->task_state_lock, flags);
44184683 ts->resp = SAS_TASK_COMPLETE;
4419
- ts->stat = SAM_STAT_GOOD;
4684
+ ts->stat = SAS_SAM_STAT_GOOD;
44204685 task->task_state_flags &= ~SAS_TASK_STATE_PENDING;
44214686 task->task_state_flags &= ~SAS_TASK_AT_INITIATOR;
44224687 task->task_state_flags |= SAS_TASK_STATE_DONE;
....@@ -4424,10 +4689,10 @@
44244689 SAS_TASK_STATE_ABORTED))) {
44254690 spin_unlock_irqrestore(&task->task_state_lock,
44264691 flags);
4427
- PM8001_FAIL_DBG(pm8001_ha,
4428
- pm8001_printk("task 0x%p resp 0x%x "
4429
- " stat 0x%x but aborted by upper layer "
4430
- "\n", task, ts->resp, ts->stat));
4692
+ pm8001_dbg(pm8001_ha, FAIL,
4693
+ "task 0x%p resp 0x%x stat 0x%x but aborted by upper layer\n",
4694
+ task, ts->resp,
4695
+ ts->stat);
44314696 pm8001_ccb_task_free(pm8001_ha, task, ccb, tag);
44324697 return 0;
44334698 } else {
....@@ -4435,20 +4700,19 @@
44354700 flags);
44364701 pm8001_ccb_task_free_done(pm8001_ha, task,
44374702 ccb, tag);
4703
+ atomic_dec(&pm8001_ha_dev->running_req);
44384704 return 0;
44394705 }
44404706 }
44414707 }
4442
- q_index = (u32) (pm8001_ha_dev->id & 0x00ffffff) % PM8001_MAX_OUTB_NUM;
44434708 ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,
4444
- &sata_cmd, q_index);
4709
+ &sata_cmd, sizeof(sata_cmd), q_index);
44454710 return ret;
44464711 }
44474712
44484713 /**
44494714 * pm80xx_chip_phy_start_req - start phy via PHY_START COMMAND
44504715 * @pm8001_ha: our hba card information.
4451
- * @num: the inbound queue number
44524716 * @phy_id: the phy id which we wanted to start up.
44534717 */
44544718 static int
....@@ -4463,25 +4727,10 @@
44634727 memset(&payload, 0, sizeof(payload));
44644728 payload.tag = cpu_to_le32(tag);
44654729
4466
- PM8001_INIT_DBG(pm8001_ha,
4467
- pm8001_printk("PHY START REQ for phy_id %d\n", phy_id));
4468
- /*
4469
- ** [0:7] PHY Identifier
4470
- ** [8:11] link rate 1.5G, 3G, 6G
4471
- ** [12:13] link mode 01b SAS mode; 10b SATA mode; 11b Auto mode
4472
- ** [14] 0b disable spin up hold; 1b enable spin up hold
4473
- ** [15] ob no change in current PHY analig setup 1b enable using SPAST
4474
- */
4475
- if (!IS_SPCV_12G(pm8001_ha->pdev))
4476
- payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE |
4477
- LINKMODE_AUTO | LINKRATE_15 |
4478
- LINKRATE_30 | LINKRATE_60 | phy_id);
4479
- else
4480
- payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE |
4481
- LINKMODE_AUTO | LINKRATE_15 |
4482
- LINKRATE_30 | LINKRATE_60 | LINKRATE_120 |
4483
- phy_id);
4730
+ pm8001_dbg(pm8001_ha, INIT, "PHY START REQ for phy_id %d\n", phy_id);
44844731
4732
+ payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE |
4733
+ LINKMODE_AUTO | pm8001_ha->link_rate | phy_id);
44854734 /* SSC Disable and SAS Analog ST configuration */
44864735 /**
44874736 payload.ase_sh_lm_slr_phyid =
....@@ -4494,16 +4743,16 @@
44944743 payload.sas_identify.dev_type = SAS_END_DEVICE;
44954744 payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL;
44964745 memcpy(payload.sas_identify.sas_addr,
4497
- &pm8001_ha->phy[phy_id].dev_sas_addr, SAS_ADDR_SIZE);
4746
+ &pm8001_ha->phy[phy_id].dev_sas_addr, SAS_ADDR_SIZE);
44984747 payload.sas_identify.phy_id = phy_id;
4499
- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 0);
4748
+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload,
4749
+ sizeof(payload), 0);
45004750 return ret;
45014751 }
45024752
45034753 /**
45044754 * pm8001_chip_phy_stop_req - start phy via PHY_STOP COMMAND
45054755 * @pm8001_ha: our hba card information.
4506
- * @num: the inbound queue number
45074756 * @phy_id: the phy id which we wanted to start up.
45084757 */
45094758 static int pm80xx_chip_phy_stop_req(struct pm8001_hba_info *pm8001_ha,
....@@ -4518,11 +4767,12 @@
45184767 memset(&payload, 0, sizeof(payload));
45194768 payload.tag = cpu_to_le32(tag);
45204769 payload.phy_id = cpu_to_le32(phy_id);
4521
- ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 0);
4770
+ ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload,
4771
+ sizeof(payload), 0);
45224772 return ret;
45234773 }
45244774
4525
-/**
4775
+/*
45264776 * see comments on pm8001_mpi_reg_resp.
45274777 */
45284778 static int pm80xx_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha,
....@@ -4561,7 +4811,7 @@
45614811 pm8001_dev->dev_type == SAS_FANOUT_EXPANDER_DEVICE)
45624812 stp_sspsmp_sata = 0x01; /*ssp or smp*/
45634813 }
4564
- if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type))
4814
+ if (parent_dev && dev_is_expander(parent_dev->dev_type))
45654815 phy_id = parent_dev->ex_dev.ex_phy->phy_id;
45664816 else
45674817 phy_id = pm8001_dev->attached_phy;
....@@ -4584,7 +4834,8 @@
45844834 memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr,
45854835 SAS_ADDR_SIZE);
45864836
4587
- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
4837
+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
4838
+ sizeof(payload), 0);
45884839 if (rc)
45894840 pm8001_tag_free(pm8001_ha, tag);
45904841
....@@ -4594,9 +4845,8 @@
45944845 /**
45954846 * pm80xx_chip_phy_ctl_req - support the local phy operation
45964847 * @pm8001_ha: our hba card information.
4597
- * @num: the inbound queue number
4598
- * @phy_id: the phy id which we wanted to operate
4599
- * @phy_op:
4848
+ * @phyId: the phy id which we wanted to operate
4849
+ * @phy_op: phy operation to request
46004850 */
46014851 static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha,
46024852 u32 phyId, u32 phy_op)
....@@ -4614,39 +4864,49 @@
46144864 payload.tag = cpu_to_le32(tag);
46154865 payload.phyop_phyid =
46164866 cpu_to_le32(((phy_op & 0xFF) << 8) | (phyId & 0xFF));
4617
- return pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
4867
+
4868
+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
4869
+ sizeof(payload), 0);
4870
+ if (rc)
4871
+ pm8001_tag_free(pm8001_ha, tag);
4872
+
4873
+ return rc;
46184874 }
46194875
4620
-static u32 pm80xx_chip_is_our_interupt(struct pm8001_hba_info *pm8001_ha)
4876
+static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha)
46214877 {
4622
- u32 value;
46234878 #ifdef PM8001_USE_MSIX
46244879 return 1;
4625
-#endif
4880
+#else
4881
+ u32 value;
4882
+
46264883 value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR);
46274884 if (value)
46284885 return 1;
46294886 return 0;
4630
-
4887
+#endif
46314888 }
46324889
46334890 /**
46344891 * pm8001_chip_isr - PM8001 isr handler.
46354892 * @pm8001_ha: our hba card information.
4636
- * @irq: irq number.
4637
- * @stat: stat.
4893
+ * @vec: irq number.
46384894 */
46394895 static irqreturn_t
46404896 pm80xx_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec)
46414897 {
46424898 pm80xx_chip_interrupt_disable(pm8001_ha, vec);
4899
+ pm8001_dbg(pm8001_ha, DEVIO,
4900
+ "irq vec %d, ODMR:0x%x\n",
4901
+ vec, pm8001_cr32(pm8001_ha, 0, 0x30));
46434902 process_oq(pm8001_ha, vec);
46444903 pm80xx_chip_interrupt_enable(pm8001_ha, vec);
46454904 return IRQ_HANDLED;
46464905 }
46474906
4648
-void mpi_set_phy_profile_req(struct pm8001_hba_info *pm8001_ha,
4649
- u32 operation, u32 phyid, u32 length, u32 *buf)
4907
+static void mpi_set_phy_profile_req(struct pm8001_hba_info *pm8001_ha,
4908
+ u32 operation, u32 phyid,
4909
+ u32 length, u32 *buf)
46504910 {
46514911 u32 tag , i, j = 0;
46524912 int rc;
....@@ -4657,18 +4917,19 @@
46574917 memset(&payload, 0, sizeof(payload));
46584918 rc = pm8001_tag_alloc(pm8001_ha, &tag);
46594919 if (rc)
4660
- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("Invalid tag\n"));
4920
+ pm8001_dbg(pm8001_ha, FAIL, "Invalid tag\n");
46614921 circularQ = &pm8001_ha->inbnd_q_tbl[0];
46624922 payload.tag = cpu_to_le32(tag);
46634923 payload.ppc_phyid = (((operation & 0xF) << 8) | (phyid & 0xFF));
4664
- PM8001_INIT_DBG(pm8001_ha,
4665
- pm8001_printk(" phy profile command for phy %x ,length is %d\n",
4666
- payload.ppc_phyid, length));
4924
+ pm8001_dbg(pm8001_ha, INIT,
4925
+ " phy profile command for phy %x ,length is %d\n",
4926
+ payload.ppc_phyid, length);
46674927 for (i = length; i < (length + PHY_DWORD_LENGTH - 1); i++) {
46684928 payload.reserved[j] = cpu_to_le32(*((u32 *)buf + i));
46694929 j++;
46704930 }
4671
- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
4931
+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
4932
+ sizeof(payload), 0);
46724933 if (rc)
46734934 pm8001_tag_free(pm8001_ha, tag);
46744935 }
....@@ -4676,15 +4937,14 @@
46764937 void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha,
46774938 u32 length, u8 *buf)
46784939 {
4679
- u32 page_code, i;
4940
+ u32 i;
46804941
4681
- page_code = SAS_PHY_ANALOG_SETTINGS_PAGE;
46824942 for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
46834943 mpi_set_phy_profile_req(pm8001_ha,
46844944 SAS_PHY_ANALOG_SETTINGS_PAGE, i, length, (u32 *)buf);
46854945 length = length + PHY_DWORD_LENGTH;
46864946 }
4687
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk("phy settings completed\n"));
4947
+ pm8001_dbg(pm8001_ha, INIT, "phy settings completed\n");
46884948 }
46894949
46904950 void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha,
....@@ -4699,7 +4959,7 @@
46994959
47004960 rc = pm8001_tag_alloc(pm8001_ha, &tag);
47014961 if (rc)
4702
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk("Invalid tag"));
4962
+ pm8001_dbg(pm8001_ha, INIT, "Invalid tag\n");
47034963
47044964 circularQ = &pm8001_ha->inbnd_q_tbl[0];
47054965 opc = OPC_INB_SET_PHY_PROFILE;
....@@ -4711,12 +4971,12 @@
47114971 for (i = 0; i < length; i++)
47124972 payload.reserved[i] = cpu_to_le32(*(buf + i));
47134973
4714
- rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0);
4974
+ rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload,
4975
+ sizeof(payload), 0);
47154976 if (rc)
47164977 pm8001_tag_free(pm8001_ha, tag);
47174978
4718
- PM8001_INIT_DBG(pm8001_ha,
4719
- pm8001_printk("PHY %d settings applied", phy));
4979
+ pm8001_dbg(pm8001_ha, INIT, "PHY %d settings applied\n", phy);
47204980 }
47214981 const struct pm8001_dispatch pm8001_80xx_dispatch = {
47224982 .name = "pmc80xx",
....@@ -4725,7 +4985,7 @@
47254985 .chip_rst = pm80xx_hw_chip_rst,
47264986 .chip_iounmap = pm8001_chip_iounmap,
47274987 .isr = pm80xx_chip_isr,
4728
- .is_our_interupt = pm80xx_chip_is_our_interupt,
4988
+ .is_our_interrupt = pm80xx_chip_is_our_interrupt,
47294989 .isr_process_oq = process_oq,
47304990 .interrupt_enable = pm80xx_chip_interrupt_enable,
47314991 .interrupt_disable = pm80xx_chip_interrupt_disable,