hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
....@@ -392,6 +392,8 @@
392392 #define CMPLT_HDR_ERROR_PHASE_MSK (0xff << CMPLT_HDR_ERROR_PHASE_OFF)
393393 #define CMPLT_HDR_RSPNS_XFRD_OFF 10
394394 #define CMPLT_HDR_RSPNS_XFRD_MSK (0x1 << CMPLT_HDR_RSPNS_XFRD_OFF)
395
+#define CMPLT_HDR_RSPNS_GOOD_OFF 11
396
+#define CMPLT_HDR_RSPNS_GOOD_MSK (0x1 << CMPLT_HDR_RSPNS_GOOD_OFF)
395397 #define CMPLT_HDR_ERX_OFF 12
396398 #define CMPLT_HDR_ERX_MSK (0x1 << CMPLT_HDR_ERX_OFF)
397399 #define CMPLT_HDR_ABORT_STAT_OFF 13
....@@ -464,6 +466,9 @@
464466
465467 #define RX_DATA_LEN_UNDERFLOW_OFF 6
466468 #define RX_DATA_LEN_UNDERFLOW_MSK (1 << RX_DATA_LEN_UNDERFLOW_OFF)
469
+
470
+#define RX_FIS_STATUS_ERR_OFF 0
471
+#define RX_FIS_STATUS_ERR_MSK (1 << RX_FIS_STATUS_ERR_OFF)
467472
468473 #define HISI_SAS_COMMAND_ENTRIES_V3_HW 4096
469474 #define HISI_SAS_MSI_COUNT_V3_HW 32
....@@ -2115,7 +2120,7 @@
21152120 return IRQ_HANDLED;
21162121 }
21172122
2118
-static void
2123
+static bool
21192124 slot_err_v3_hw(struct hisi_hba *hisi_hba, struct sas_task *task,
21202125 struct hisi_sas_slot *slot)
21212126 {
....@@ -2128,11 +2133,22 @@
21282133 hisi_sas_status_buf_addr_mem(slot);
21292134 u32 dma_rx_err_type = le32_to_cpu(record->dma_rx_err_type);
21302135 u32 trans_tx_fail_type = le32_to_cpu(record->trans_tx_fail_type);
2136
+ u16 sipc_rx_err_type = le16_to_cpu(record->sipc_rx_err_type);
21312137 u32 dw3 = le32_to_cpu(complete_hdr->dw3);
2138
+ u32 dw0 = le32_to_cpu(complete_hdr->dw0);
21322139
21332140 switch (task->task_proto) {
21342141 case SAS_PROTOCOL_SSP:
21352142 if (dma_rx_err_type & RX_DATA_LEN_UNDERFLOW_MSK) {
2143
+ /*
2144
+ * If returned response frame is incorrect because of data underflow,
2145
+ * but I/O information has been written to the host memory, we examine
2146
+ * response IU.
2147
+ */
2148
+ if (!(dw0 & CMPLT_HDR_RSPNS_GOOD_MSK) &&
2149
+ (dw0 & CMPLT_HDR_RSPNS_XFRD_MSK))
2150
+ return false;
2151
+
21362152 ts->residual = trans_tx_fail_type;
21372153 ts->stat = SAS_DATA_UNDERRUN;
21382154 } else if (dw3 & CMPLT_HDR_IO_IN_TARGET_MSK) {
....@@ -2146,7 +2162,10 @@
21462162 case SAS_PROTOCOL_SATA:
21472163 case SAS_PROTOCOL_STP:
21482164 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
2149
- if (dma_rx_err_type & RX_DATA_LEN_UNDERFLOW_MSK) {
2165
+ if ((dw0 & CMPLT_HDR_RSPNS_XFRD_MSK) &&
2166
+ (sipc_rx_err_type & RX_FIS_STATUS_ERR_MSK)) {
2167
+ ts->stat = SAS_PROTO_RESPONSE;
2168
+ } else if (dma_rx_err_type & RX_DATA_LEN_UNDERFLOW_MSK) {
21502169 ts->residual = trans_tx_fail_type;
21512170 ts->stat = SAS_DATA_UNDERRUN;
21522171 } else if (dw3 & CMPLT_HDR_IO_IN_TARGET_MSK) {
....@@ -2156,14 +2175,16 @@
21562175 ts->stat = SAS_OPEN_REJECT;
21572176 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
21582177 }
2159
- hisi_sas_sata_done(task, slot);
2178
+ if (dw0 & CMPLT_HDR_RSPNS_XFRD_MSK)
2179
+ hisi_sas_sata_done(task, slot);
21602180 break;
21612181 case SAS_PROTOCOL_SMP:
2162
- ts->stat = SAM_STAT_CHECK_CONDITION;
2182
+ ts->stat = SAS_SAM_STAT_CHECK_CONDITION;
21632183 break;
21642184 default:
21652185 break;
21662186 }
2187
+ return true;
21672188 }
21682189
21692190 static void slot_complete_v3_hw(struct hisi_hba *hisi_hba,
....@@ -2238,18 +2259,20 @@
22382259 if ((dw0 & CMPLT_HDR_CMPLT_MSK) == 0x3) {
22392260 u32 *error_info = hisi_sas_status_buf_addr_mem(slot);
22402261
2241
- slot_err_v3_hw(hisi_hba, task, slot);
2242
- if (ts->stat != SAS_DATA_UNDERRUN)
2243
- dev_info(dev, "erroneous completion iptt=%d task=%pK dev id=%d CQ hdr: 0x%x 0x%x 0x%x 0x%x Error info: 0x%x 0x%x 0x%x 0x%x\n",
2244
- slot->idx, task, sas_dev->device_id,
2245
- dw0, dw1, complete_hdr->act, dw3,
2246
- error_info[0], error_info[1],
2247
- error_info[2], error_info[3]);
2248
- if (unlikely(slot->abort)) {
2249
- sas_task_abort(task);
2250
- return;
2262
+ if (slot_err_v3_hw(hisi_hba, task, slot)) {
2263
+ if (ts->stat != SAS_DATA_UNDERRUN)
2264
+ dev_info(dev, "erroneous completion iptt=%d task=%pK dev id=%d addr=%016llx CQ hdr: 0x%x 0x%x 0x%x 0x%x Error info: 0x%x 0x%x 0x%x 0x%x\n",
2265
+ slot->idx, task, sas_dev->device_id,
2266
+ SAS_ADDR(device->sas_addr),
2267
+ dw0, dw1, complete_hdr->act, dw3,
2268
+ error_info[0], error_info[1],
2269
+ error_info[2], error_info[3]);
2270
+ if (unlikely(slot->abort)) {
2271
+ sas_task_abort(task);
2272
+ return;
2273
+ }
2274
+ goto out;
22512275 }
2252
- goto out;
22532276 }
22542277
22552278 switch (task->task_proto) {
....@@ -2265,7 +2288,7 @@
22652288 struct scatterlist *sg_resp = &task->smp_task.smp_resp;
22662289 void *to = page_address(sg_page(sg_resp));
22672290
2268
- ts->stat = SAM_STAT_GOOD;
2291
+ ts->stat = SAS_SAM_STAT_GOOD;
22692292
22702293 dma_unmap_sg(dev, &task->smp_task.smp_req, 1,
22712294 DMA_TO_DEVICE);
....@@ -2278,11 +2301,12 @@
22782301 case SAS_PROTOCOL_SATA:
22792302 case SAS_PROTOCOL_STP:
22802303 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
2281
- ts->stat = SAM_STAT_GOOD;
2282
- hisi_sas_sata_done(task, slot);
2304
+ ts->stat = SAS_SAM_STAT_GOOD;
2305
+ if (dw0 & CMPLT_HDR_RSPNS_XFRD_MSK)
2306
+ hisi_sas_sata_done(task, slot);
22832307 break;
22842308 default:
2285
- ts->stat = SAM_STAT_CHECK_CONDITION;
2309
+ ts->stat = SAS_SAM_STAT_CHECK_CONDITION;
22862310 break;
22872311 }
22882312
....@@ -2402,8 +2426,7 @@
24022426 hisi_hba->cq_nvecs = vectors - BASE_VECTORS_V3_HW;
24032427 shost->nr_hw_queues = hisi_hba->cq_nvecs;
24042428
2405
- devm_add_action(&pdev->dev, hisi_sas_v3_free_vectors, pdev);
2406
- return 0;
2429
+ return devm_add_action(&pdev->dev, hisi_sas_v3_free_vectors, pdev);
24072430 }
24082431
24092432 static int interrupt_init_v3_hw(struct hisi_hba *hisi_hba)