.. | .. |
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31 | 31 | MODULE_LICENSE("GPL"); |
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32 | 32 | |
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33 | 33 | static inline int do_siga_sync(unsigned long schid, |
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34 | | - unsigned int out_mask, unsigned int in_mask, |
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| 34 | + unsigned long out_mask, unsigned long in_mask, |
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35 | 35 | unsigned int fc) |
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36 | 36 | { |
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37 | | - register unsigned long __fc asm ("0") = fc; |
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38 | | - register unsigned long __schid asm ("1") = schid; |
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39 | | - register unsigned long out asm ("2") = out_mask; |
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40 | | - register unsigned long in asm ("3") = in_mask; |
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41 | 37 | int cc; |
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42 | 38 | |
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43 | 39 | asm volatile( |
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| 40 | + " lgr 0,%[fc]\n" |
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| 41 | + " lgr 1,%[schid]\n" |
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| 42 | + " lgr 2,%[out]\n" |
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| 43 | + " lgr 3,%[in]\n" |
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44 | 44 | " siga 0\n" |
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45 | | - " ipm %0\n" |
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46 | | - " srl %0,28\n" |
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47 | | - : "=d" (cc) |
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48 | | - : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc"); |
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| 45 | + " ipm %[cc]\n" |
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| 46 | + " srl %[cc],28\n" |
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| 47 | + : [cc] "=&d" (cc) |
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| 48 | + : [fc] "d" (fc), [schid] "d" (schid), |
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| 49 | + [out] "d" (out_mask), [in] "d" (in_mask) |
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| 50 | + : "cc", "0", "1", "2", "3"); |
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49 | 51 | return cc; |
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50 | 52 | } |
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51 | 53 | |
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52 | | -static inline int do_siga_input(unsigned long schid, unsigned int mask, |
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53 | | - unsigned int fc) |
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| 54 | +static inline int do_siga_input(unsigned long schid, unsigned long mask, |
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| 55 | + unsigned long fc) |
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54 | 56 | { |
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55 | | - register unsigned long __fc asm ("0") = fc; |
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56 | | - register unsigned long __schid asm ("1") = schid; |
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57 | | - register unsigned long __mask asm ("2") = mask; |
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58 | 57 | int cc; |
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59 | 58 | |
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60 | 59 | asm volatile( |
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| 60 | + " lgr 0,%[fc]\n" |
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| 61 | + " lgr 1,%[schid]\n" |
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| 62 | + " lgr 2,%[mask]\n" |
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61 | 63 | " siga 0\n" |
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62 | | - " ipm %0\n" |
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63 | | - " srl %0,28\n" |
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64 | | - : "=d" (cc) |
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65 | | - : "d" (__fc), "d" (__schid), "d" (__mask) : "cc"); |
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| 64 | + " ipm %[cc]\n" |
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| 65 | + " srl %[cc],28\n" |
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| 66 | + : [cc] "=&d" (cc) |
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| 67 | + : [fc] "d" (fc), [schid] "d" (schid), [mask] "d" (mask) |
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| 68 | + : "cc", "0", "1", "2"); |
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66 | 69 | return cc; |
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67 | 70 | } |
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68 | 71 | |
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.. | .. |
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78 | 81 | * Note: For IQDC unicast queues only the highest priority queue is processed. |
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79 | 82 | */ |
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80 | 83 | static inline int do_siga_output(unsigned long schid, unsigned long mask, |
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81 | | - unsigned int *bb, unsigned int fc, |
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| 84 | + unsigned int *bb, unsigned long fc, |
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82 | 85 | unsigned long aob) |
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83 | 86 | { |
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84 | | - register unsigned long __fc asm("0") = fc; |
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85 | | - register unsigned long __schid asm("1") = schid; |
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86 | | - register unsigned long __mask asm("2") = mask; |
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87 | | - register unsigned long __aob asm("3") = aob; |
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88 | 87 | int cc; |
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89 | 88 | |
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90 | 89 | asm volatile( |
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| 90 | + " lgr 0,%[fc]\n" |
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| 91 | + " lgr 1,%[schid]\n" |
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| 92 | + " lgr 2,%[mask]\n" |
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| 93 | + " lgr 3,%[aob]\n" |
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91 | 94 | " siga 0\n" |
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92 | | - " ipm %0\n" |
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93 | | - " srl %0,28\n" |
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94 | | - : "=d" (cc), "+d" (__fc), "+d" (__aob) |
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95 | | - : "d" (__schid), "d" (__mask) |
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96 | | - : "cc"); |
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97 | | - *bb = __fc >> 31; |
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| 95 | + " lgr %[fc],0\n" |
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| 96 | + " ipm %[cc]\n" |
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| 97 | + " srl %[cc],28\n" |
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| 98 | + : [cc] "=&d" (cc), [fc] "+&d" (fc) |
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| 99 | + : [schid] "d" (schid), [mask] "d" (mask), [aob] "d" (aob) |
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| 100 | + : "cc", "0", "1", "2", "3"); |
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| 101 | + *bb = fc >> 31; |
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98 | 102 | return cc; |
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99 | 103 | } |
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100 | 104 | |
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