.. | .. |
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1606 | 1606 | EXPORT_SYMBOL_GPL(intel_pinctrl_get_soc_data); |
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1607 | 1607 | |
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1608 | 1608 | #ifdef CONFIG_PM_SLEEP |
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| 1609 | +static bool __intel_gpio_is_direct_irq(u32 value) |
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| 1610 | +{ |
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| 1611 | + return (value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) && |
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| 1612 | + (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO); |
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| 1613 | +} |
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| 1614 | + |
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1609 | 1615 | static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int pin) |
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1610 | 1616 | { |
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1611 | 1617 | const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin); |
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.. | .. |
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1639 | 1645 | * See https://bugzilla.kernel.org/show_bug.cgi?id=214749. |
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1640 | 1646 | */ |
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1641 | 1647 | value = readl(intel_get_padcfg(pctrl, pin, PADCFG0)); |
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1642 | | - if ((value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) && |
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1643 | | - (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO)) |
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| 1648 | + if (__intel_gpio_is_direct_irq(value)) |
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1644 | 1649 | return true; |
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1645 | 1650 | |
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1646 | 1651 | return false; |
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.. | .. |
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1770 | 1775 | for (i = 0; i < pctrl->soc->npins; i++) { |
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1771 | 1776 | const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i]; |
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1772 | 1777 | |
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1773 | | - if (!intel_pinctrl_should_save(pctrl, desc->number)) |
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| 1778 | + if (!(intel_pinctrl_should_save(pctrl, desc->number) || |
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| 1779 | + /* |
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| 1780 | + * If the firmware mangled the register contents too much, |
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| 1781 | + * check the saved value for the Direct IRQ mode. |
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| 1782 | + */ |
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| 1783 | + __intel_gpio_is_direct_irq(pads[i].padcfg0))) |
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1774 | 1784 | continue; |
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1775 | 1785 | |
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1776 | 1786 | intel_restore_padcfg(pctrl, desc->number, PADCFG0, pads[i].padcfg0); |
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