update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
..
..
@@ -287,9 +287,42 @@
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 	return 0;
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 }
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+static const char *rockchip_combphy_mode2str(enum phy_mode mode)
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+{
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+	switch (mode) {
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+	case PHY_TYPE_SATA:
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+		return "SATA";
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+	case PHY_TYPE_PCIE:
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+		return "PCIe";
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+	case PHY_TYPE_USB3:
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+		return "USB3";
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+	case PHY_TYPE_SGMII:
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+	case PHY_TYPE_QSGMII:
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+		return "GMII";
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+	default:
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+		return "Unknown";
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+	}
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+}
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+
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+static int rockchip_combphy_validate(struct phy *phy, enum phy_mode mode, int submode,
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+			      union phy_configure_opts *opts)
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+{
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+	struct rockchip_combphy_priv *priv = phy_get_drvdata(phy);
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+
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+	if (mode != priv->mode) {
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+		dev_err(priv->dev, "expected mode is %s, but current mode is %s\n",
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+			rockchip_combphy_mode2str(mode),
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+			rockchip_combphy_mode2str(priv->mode));
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+		return -EINVAL;
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+	}
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+
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+	return 0;
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+}
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+
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 static const struct phy_ops rochchip_combphy_ops = {
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 	.init = rockchip_combphy_init,
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 	.exit = rockchip_combphy_exit,
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+	.validate = rockchip_combphy_validate,
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 	.owner = THIS_MODULE,
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 };
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