hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
....@@ -39,6 +39,8 @@
3939 #include <linux/if_link.h>
4040 #include <linux/firmware.h>
4141 #include <linux/mlx5/cq.h>
42
+#include <linux/mlx5/fs.h>
43
+#include <linux/mlx5/driver.h>
4244
4345 #define DRIVER_NAME "mlx5_core"
4446 #define DRIVER_VERSION "5.0-0"
....@@ -46,39 +48,62 @@
4648 extern uint mlx5_core_debug_mask;
4749
4850 #define mlx5_core_dbg(__dev, format, ...) \
49
- dev_dbg(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
51
+ dev_dbg((__dev)->device, "%s:%d:(pid %d): " format, \
5052 __func__, __LINE__, current->pid, \
5153 ##__VA_ARGS__)
5254
53
-#define mlx5_core_dbg_once(__dev, format, ...) \
54
- dev_dbg_once(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
55
- __func__, __LINE__, current->pid, \
55
+#define mlx5_core_dbg_once(__dev, format, ...) \
56
+ dev_dbg_once((__dev)->device, \
57
+ "%s:%d:(pid %d): " format, \
58
+ __func__, __LINE__, current->pid, \
5659 ##__VA_ARGS__)
5760
58
-#define mlx5_core_dbg_mask(__dev, mask, format, ...) \
59
-do { \
60
- if ((mask) & mlx5_core_debug_mask) \
61
- mlx5_core_dbg(__dev, format, ##__VA_ARGS__); \
61
+#define mlx5_core_dbg_mask(__dev, mask, format, ...) \
62
+do { \
63
+ if ((mask) & mlx5_core_debug_mask) \
64
+ mlx5_core_dbg(__dev, format, ##__VA_ARGS__); \
6265 } while (0)
6366
64
-#define mlx5_core_err(__dev, format, ...) \
65
- dev_err(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
66
- __func__, __LINE__, current->pid, \
67
+#define mlx5_core_err(__dev, format, ...) \
68
+ dev_err((__dev)->device, "%s:%d:(pid %d): " format, \
69
+ __func__, __LINE__, current->pid, \
6770 ##__VA_ARGS__)
6871
69
-#define mlx5_core_err_rl(__dev, format, ...) \
70
- dev_err_ratelimited(&(__dev)->pdev->dev, \
71
- "%s:%d:(pid %d): " format, \
72
- __func__, __LINE__, current->pid, \
73
- ##__VA_ARGS__)
72
+#define mlx5_core_err_rl(__dev, format, ...) \
73
+ dev_err_ratelimited((__dev)->device, \
74
+ "%s:%d:(pid %d): " format, \
75
+ __func__, __LINE__, current->pid, \
76
+ ##__VA_ARGS__)
7477
75
-#define mlx5_core_warn(__dev, format, ...) \
76
- dev_warn(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \
77
- __func__, __LINE__, current->pid, \
78
- ##__VA_ARGS__)
78
+#define mlx5_core_warn(__dev, format, ...) \
79
+ dev_warn((__dev)->device, "%s:%d:(pid %d): " format, \
80
+ __func__, __LINE__, current->pid, \
81
+ ##__VA_ARGS__)
7982
80
-#define mlx5_core_info(__dev, format, ...) \
81
- dev_info(&(__dev)->pdev->dev, format, ##__VA_ARGS__)
83
+#define mlx5_core_warn_once(__dev, format, ...) \
84
+ dev_warn_once((__dev)->device, "%s:%d:(pid %d): " format, \
85
+ __func__, __LINE__, current->pid, \
86
+ ##__VA_ARGS__)
87
+
88
+#define mlx5_core_warn_rl(__dev, format, ...) \
89
+ dev_warn_ratelimited((__dev)->device, \
90
+ "%s:%d:(pid %d): " format, \
91
+ __func__, __LINE__, current->pid, \
92
+ ##__VA_ARGS__)
93
+
94
+#define mlx5_core_info(__dev, format, ...) \
95
+ dev_info((__dev)->device, format, ##__VA_ARGS__)
96
+
97
+#define mlx5_core_info_rl(__dev, format, ...) \
98
+ dev_info_ratelimited((__dev)->device, \
99
+ "%s:%d:(pid %d): " format, \
100
+ __func__, __LINE__, current->pid, \
101
+ ##__VA_ARGS__)
102
+
103
+static inline struct device *mlx5_core_dma_dev(struct mlx5_core_dev *dev)
104
+{
105
+ return &dev->pdev->dev;
106
+}
82107
83108 enum {
84109 MLX5_CMD_DATA, /* print command payload only */
....@@ -90,17 +115,21 @@
90115 MLX5_DRIVER_SYND = 0xbadd00de,
91116 };
92117
118
+enum mlx5_semaphore_space_address {
119
+ MLX5_SEMAPHORE_SPACE_DOMAIN = 0xA,
120
+ MLX5_SEMAPHORE_SW_RESET = 0x20,
121
+};
122
+
93123 int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
94124 int mlx5_query_board_id(struct mlx5_core_dev *dev);
95125 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev, uint32_t *sw_owner_id);
96126 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
97127 int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev);
98
-void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
99
- unsigned long param);
100
-void mlx5_core_page_fault(struct mlx5_core_dev *dev,
101
- struct mlx5_pagefault *pfault);
102
-void mlx5_port_module_event(struct mlx5_core_dev *dev, struct mlx5_eqe *eqe);
128
+int mlx5_cmd_fast_teardown_hca(struct mlx5_core_dev *dev);
103129 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force);
130
+void mlx5_error_sw_reset(struct mlx5_core_dev *dev);
131
+u32 mlx5_health_check_fatal_sensors(struct mlx5_core_dev *dev);
132
+int mlx5_health_wait_pci_up(struct mlx5_core_dev *dev);
104133 void mlx5_disable_device(struct mlx5_core_dev *dev);
105134 void mlx5_recover_device(struct mlx5_core_dev *dev);
106135 int mlx5_sriov_init(struct mlx5_core_dev *dev);
....@@ -108,7 +137,6 @@
108137 int mlx5_sriov_attach(struct mlx5_core_dev *dev);
109138 void mlx5_sriov_detach(struct mlx5_core_dev *dev);
110139 int mlx5_core_sriov_configure(struct pci_dev *dev, int num_vfs);
111
-bool mlx5_sriov_is_enabled(struct mlx5_core_dev *dev);
112140 int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id);
113141 int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id);
114142 int mlx5_create_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
....@@ -118,32 +146,11 @@
118146 u32 modify_bitmask);
119147 int mlx5_destroy_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
120148 u32 element_id);
121
-int mlx5_wait_for_vf_pages(struct mlx5_core_dev *dev);
122
-u64 mlx5_read_internal_timer(struct mlx5_core_dev *dev);
149
+int mlx5_wait_for_pages(struct mlx5_core_dev *dev, int *pages);
123150
124
-int mlx5_eq_init(struct mlx5_core_dev *dev);
125
-void mlx5_eq_cleanup(struct mlx5_core_dev *dev);
126
-int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx,
127
- int nent, u64 mask, const char *name,
128
- enum mlx5_eq_type type);
129
-int mlx5_destroy_unmap_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
130
-int mlx5_eq_add_cq(struct mlx5_eq *eq, struct mlx5_core_cq *cq);
131
-int mlx5_eq_del_cq(struct mlx5_eq *eq, struct mlx5_core_cq *cq);
132
-int mlx5_core_eq_query(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
133
- u32 *out, int outlen);
134
-int mlx5_start_eqs(struct mlx5_core_dev *dev);
135
-void mlx5_stop_eqs(struct mlx5_core_dev *dev);
136
-/* This function should only be called after mlx5_cmd_force_teardown_hca */
137
-void mlx5_core_eq_free_irqs(struct mlx5_core_dev *dev);
138
-struct mlx5_eq *mlx5_eqn2eq(struct mlx5_core_dev *dev, int eqn);
139
-u32 mlx5_eq_poll_irq_disabled(struct mlx5_eq *eq);
140
-void mlx5_cq_tasklet_cb(unsigned long data);
141
-void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vec, bool forced);
142
-int mlx5_debug_eq_add(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
143
-void mlx5_debug_eq_remove(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
144
-int mlx5_eq_debugfs_init(struct mlx5_core_dev *dev);
145
-void mlx5_eq_debugfs_cleanup(struct mlx5_core_dev *dev);
146
-int mlx5_cq_debugfs_init(struct mlx5_core_dev *dev);
151
+void mlx5_cmd_trigger_completions(struct mlx5_core_dev *dev);
152
+void mlx5_cmd_flush(struct mlx5_core_dev *dev);
153
+void mlx5_cq_debugfs_init(struct mlx5_core_dev *dev);
147154 void mlx5_cq_debugfs_cleanup(struct mlx5_core_dev *dev);
148155
149156 int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam, u8 feature_group,
....@@ -156,12 +163,30 @@
156163 void mlx5_lag_add(struct mlx5_core_dev *dev, struct net_device *netdev);
157164 void mlx5_lag_remove(struct mlx5_core_dev *dev);
158165
166
+int mlx5_irq_table_init(struct mlx5_core_dev *dev);
167
+void mlx5_irq_table_cleanup(struct mlx5_core_dev *dev);
168
+int mlx5_irq_table_create(struct mlx5_core_dev *dev);
169
+void mlx5_irq_table_destroy(struct mlx5_core_dev *dev);
170
+int mlx5_irq_attach_nb(struct mlx5_irq_table *irq_table, int vecidx,
171
+ struct notifier_block *nb);
172
+int mlx5_irq_detach_nb(struct mlx5_irq_table *irq_table, int vecidx,
173
+ struct notifier_block *nb);
174
+struct cpumask *
175
+mlx5_irq_get_affinity_mask(struct mlx5_irq_table *irq_table, int vecidx);
176
+struct cpu_rmap *mlx5_irq_get_rmap(struct mlx5_irq_table *table);
177
+int mlx5_irq_get_num_comp(struct mlx5_irq_table *table);
178
+
179
+int mlx5_events_init(struct mlx5_core_dev *dev);
180
+void mlx5_events_cleanup(struct mlx5_core_dev *dev);
181
+void mlx5_events_start(struct mlx5_core_dev *dev);
182
+void mlx5_events_stop(struct mlx5_core_dev *dev);
183
+
159184 void mlx5_add_device(struct mlx5_interface *intf, struct mlx5_priv *priv);
160185 void mlx5_remove_device(struct mlx5_interface *intf, struct mlx5_priv *priv);
161186 void mlx5_attach_device(struct mlx5_core_dev *dev);
162187 void mlx5_detach_device(struct mlx5_core_dev *dev);
163188 bool mlx5_device_registered(struct mlx5_core_dev *dev);
164
-int mlx5_register_device(struct mlx5_core_dev *dev);
189
+void mlx5_register_device(struct mlx5_core_dev *dev);
165190 void mlx5_unregister_device(struct mlx5_core_dev *dev);
166191 void mlx5_add_dev_by_protocol(struct mlx5_core_dev *dev, int protocol);
167192 void mlx5_remove_dev_by_protocol(struct mlx5_core_dev *dev, int protocol);
....@@ -169,17 +194,6 @@
169194 void mlx5_dev_list_lock(void);
170195 void mlx5_dev_list_unlock(void);
171196 int mlx5_dev_list_trylock(void);
172
-int mlx5_encap_alloc(struct mlx5_core_dev *dev,
173
- int header_type,
174
- size_t size,
175
- void *encap_header,
176
- u32 *encap_id);
177
-void mlx5_encap_dealloc(struct mlx5_core_dev *dev, u32 encap_id);
178
-
179
-int mlx5_modify_header_alloc(struct mlx5_core_dev *dev,
180
- u8 namespace, u8 num_actions,
181
- void *modify_actions, u32 *modify_header_id);
182
-void mlx5_modify_header_dealloc(struct mlx5_core_dev *dev, u32 modify_header_id);
183197
184198 bool mlx5_lag_intf_add(struct mlx5_interface *intf, struct mlx5_priv *priv);
185199
....@@ -188,15 +202,26 @@
188202 int mlx5_query_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 *arm, u8 *mode);
189203 int mlx5_set_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 arm, u8 mode);
190204
205
+struct mlx5_dm *mlx5_dm_create(struct mlx5_core_dev *dev);
206
+void mlx5_dm_cleanup(struct mlx5_core_dev *dev);
207
+
191208 #define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) && \
192209 MLX5_CAP_GEN((mdev), pps_modify) && \
193210 MLX5_CAP_MCAM_FEATURE((mdev), mtpps_fs) && \
194211 MLX5_CAP_MCAM_FEATURE((mdev), mtpps_enh_out_per_adj))
195212
196
-int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw);
213
+int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw,
214
+ struct netlink_ext_ack *extack);
215
+int mlx5_fw_version_query(struct mlx5_core_dev *dev,
216
+ u32 *running_ver, u32 *stored_ver);
197217
198218 void mlx5e_init(void);
199219 void mlx5e_cleanup(void);
220
+
221
+static inline bool mlx5_sriov_is_enabled(struct mlx5_core_dev *dev)
222
+{
223
+ return pci_num_vf(dev->pdev) ? true : false;
224
+}
200225
201226 static inline int mlx5_lag_is_lacp_owner(struct mlx5_core_dev *dev)
202227 {
....@@ -210,8 +235,19 @@
210235 MLX5_CAP_GEN(dev, lag_master);
211236 }
212237
213
-int mlx5_lag_allow(struct mlx5_core_dev *dev);
214
-int mlx5_lag_forbid(struct mlx5_core_dev *dev);
215
-
216238 void mlx5_reload_interface(struct mlx5_core_dev *mdev, int protocol);
239
+void mlx5_lag_update(struct mlx5_core_dev *dev);
240
+
241
+enum {
242
+ MLX5_NIC_IFC_FULL = 0,
243
+ MLX5_NIC_IFC_DISABLED = 1,
244
+ MLX5_NIC_IFC_NO_DRAM_NIC = 2,
245
+ MLX5_NIC_IFC_SW_RESET = 7
246
+};
247
+
248
+u8 mlx5_get_nic_state(struct mlx5_core_dev *dev);
249
+void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state);
250
+
251
+void mlx5_unload_one(struct mlx5_core_dev *dev, bool cleanup);
252
+int mlx5_load_one(struct mlx5_core_dev *dev, bool boot);
217253 #endif /* __MLX5_CORE_H__ */