hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
....@@ -74,6 +74,20 @@
7474 return rvu->cgx_idmap[cgx_id];
7575 }
7676
77
+/* Based on P2X connectivity find mapped NIX block for a PF */
78
+static void rvu_map_cgx_nix_block(struct rvu *rvu, int pf,
79
+ int cgx_id, int lmac_id)
80
+{
81
+ struct rvu_pfvf *pfvf = &rvu->pf[pf];
82
+ u8 p2x;
83
+
84
+ p2x = cgx_lmac_get_p2x(cgx_id, lmac_id);
85
+ /* Firmware sets P2X_SELECT as either NIX0 or NIX1 */
86
+ pfvf->nix_blkaddr = BLKADDR_NIX0;
87
+ if (is_rvu_supports_nix1(rvu) && p2x == CMR_P2X_SEL_NIX1)
88
+ pfvf->nix_blkaddr = BLKADDR_NIX1;
89
+}
90
+
7791 static int rvu_map_cgx_lmac_pf(struct rvu *rvu)
7892 {
7993 struct npc_pkind *pkind = &rvu->hw->pkind;
....@@ -117,6 +131,7 @@
117131 rvu->cgxlmac2pf_map[CGX_OFFSET(cgx) + lmac] = 1 << pf;
118132 free_pkind = rvu_alloc_rsrc(&pkind->rsrc);
119133 pkind->pfchan_map[free_pkind] = ((pf) & 0x3F) << 16;
134
+ rvu_map_cgx_nix_block(rvu, pf, cgx, lmac);
120135 rvu->cgx_mapped_pfs++;
121136 }
122137 }