forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf 
 kernel/drivers/net/ethernet/broadcom/tg3.c
....@@ -66,11 +66,6 @@
6666 #include <uapi/linux/net_tstamp.h>
6767 #include <linux/ptp_clock_kernel.h>
6868 
69
-#ifdef CONFIG_SPARC
70
-#include <asm/idprom.h>
71
-#include <asm/prom.h>
72
-#endif
73
-
7469 #define BAR_0	0
7570 #define BAR_2	2
7671 
....@@ -101,11 +96,9 @@
10196 	_tg3_flag_clear(TG3_FLAG_##flag, (tp)->tg3_flags)
10297 
10398 #define DRV_MODULE_NAME		"tg3"
99
+/* DO NOT UPDATE TG3_*_NUM defines */
104100 #define TG3_MAJ_NUM			3
105101 #define TG3_MIN_NUM			137
106
-#define DRV_MODULE_VERSION	\
107
-	__stringify(TG3_MAJ_NUM) "." __stringify(TG3_MIN_NUM)
108
-#define DRV_MODULE_RELDATE	"May 11, 2014"
109102 
110103 #define RESET_KIND_SHUTDOWN	0
111104 #define RESET_KIND_INIT		1
....@@ -227,14 +220,11 @@
227220 #define FIRMWARE_TG3TSO		"tigon/tg3_tso.bin"
228221 #define FIRMWARE_TG3TSO5	"tigon/tg3_tso5.bin"
229222 
230
-static char version[] =
231
-	DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")";
232
-
233223 MODULE_AUTHOR("David S. Miller (davem@redhat.com) and Jeff Garzik (jgarzik@pobox.com)");
234224 MODULE_DESCRIPTION("Broadcom Tigon3 ethernet driver");
235225 MODULE_LICENSE("GPL");
236
-MODULE_VERSION(DRV_MODULE_VERSION);
237226 MODULE_FIRMWARE(FIRMWARE_TG3);
227
+MODULE_FIRMWARE(FIRMWARE_TG357766);
238228 MODULE_FIRMWARE(FIRMWARE_TG3TSO);
239229 MODULE_FIRMWARE(FIRMWARE_TG3TSO5);
240230 
....@@ -726,7 +716,7 @@
726716 	case TG3_APE_LOCK_GPIO:
727717 		if (tg3_asic_rev(tp) == ASIC_REV_5761)
728718 			return 0;
729
-		/* else: fall through */
719
+		fallthrough;
730720 	case TG3_APE_LOCK_GRC:
731721 	case TG3_APE_LOCK_MEM:
732722 		if (!tp->pci_fn)
....@@ -787,7 +777,7 @@
787777 	case TG3_APE_LOCK_GPIO:
788778 		if (tg3_asic_rev(tp) == ASIC_REV_5761)
789779 			return;
790
-		/* else: fall through */
780
+		fallthrough;
791781 	case TG3_APE_LOCK_GRC:
792782 	case TG3_APE_LOCK_MEM:
793783 		if (!tp->pci_fn)
....@@ -1078,7 +1068,6 @@
10781068 	struct tg3 *tp = tnapi->tp;
10791069 
10801070 	tw32_mailbox(tnapi->int_mbox, tnapi->last_tag << 24);
1081
-	mmiowb();
10821071 
10831072 	/* When doing tagged status, this work check is unnecessary.
10841073 	 * The last_tag we write above tells the chip which piece of
....@@ -1598,7 +1587,7 @@
15981587 			phydev->dev_flags |= PHY_BRCM_EXT_IBND_RX_ENABLE;
15991588 		if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN))
16001589 			phydev->dev_flags |= PHY_BRCM_EXT_IBND_TX_ENABLE;
1601
-		/* fallthru */
1590
+		fallthrough;
16021591 	case PHY_ID_RTL8211C:
16031592 		phydev->interface = PHY_INTERFACE_MODE_RGMII;
16041593 		break;
....@@ -2122,16 +2111,14 @@
21222111 	case PHY_INTERFACE_MODE_GMII:
21232112 	case PHY_INTERFACE_MODE_RGMII:
21242113 		if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) {
2125
-			phydev->supported &= (PHY_GBIT_FEATURES |
2126
-					      SUPPORTED_Pause |
2127
-					      SUPPORTED_Asym_Pause);
2114
+			phy_set_max_speed(phydev, SPEED_1000);
2115
+			phy_support_asym_pause(phydev);
21282116 			break;
21292117 		}
2130
-		/* fallthru */
2118
+		fallthrough;
21312119 	case PHY_INTERFACE_MODE_MII:
2132
-		phydev->supported &= (PHY_BASIC_FEATURES |
2133
-				      SUPPORTED_Pause |
2134
-				      SUPPORTED_Asym_Pause);
2120
+		phy_set_max_speed(phydev, SPEED_100);
2121
+		phy_support_asym_pause(phydev);
21352122 		break;
21362123 	default:
21372124 		phy_disconnect(mdiobus_get_phy(tp->mdio_bus, tp->phy_addr));
....@@ -2139,8 +2126,6 @@
21392126 	}
21402127 
21412128 	tp->phy_flags |= TG3_PHYFLG_IS_CONNECTED;
2142
-
2143
-	phydev->advertising = phydev->supported;
21442129 
21452130 	phy_attached_info(phydev);
21462131 
....@@ -2161,7 +2146,8 @@
21612146 		phydev->speed = tp->link_config.speed;
21622147 		phydev->duplex = tp->link_config.duplex;
21632148 		phydev->autoneg = tp->link_config.autoneg;
2164
-		phydev->advertising = tp->link_config.advertising;
2149
+		ethtool_convert_legacy_u32_to_link_mode(
2150
+			phydev->advertising, tp->link_config.advertising);
21652151 	}
21662152 
21672153 	phy_start(phydev);
....@@ -4061,8 +4047,9 @@
40614047 		do_low_power = false;
40624048 		if ((tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) &&
40634049 		    !(tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)) {
4050
+			__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising) = { 0, };
40644051 			struct phy_device *phydev;
4065
-			u32 phyid, advertising;
4052
+			u32 phyid;
40664053 
40674054 			phydev = mdiobus_get_phy(tp->mdio_bus, tp->phy_addr);
40684055 
....@@ -4071,25 +4058,33 @@
40714058 			tp->link_config.speed = phydev->speed;
40724059 			tp->link_config.duplex = phydev->duplex;
40734060 			tp->link_config.autoneg = phydev->autoneg;
4074
-			tp->link_config.advertising = phydev->advertising;
4061
+			ethtool_convert_link_mode_to_legacy_u32(
4062
+				&tp->link_config.advertising,
4063
+				phydev->advertising);
40754064 
4076
-			advertising = ADVERTISED_TP |
4077
-				      ADVERTISED_Pause |
4078
-				      ADVERTISED_Autoneg |
4079
-				      ADVERTISED_10baseT_Half;
4065
+			linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT, advertising);
4066
+			linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
4067
+					 advertising);
4068
+			linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
4069
+					 advertising);
4070
+			linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT,
4071
+					 advertising);
40804072 
40814073 			if (tg3_flag(tp, ENABLE_ASF) || device_should_wake) {
4082
-				if (tg3_flag(tp, WOL_SPEED_100MB))
4083
-					advertising |=
4084
-						ADVERTISED_100baseT_Half |
4085
-						ADVERTISED_100baseT_Full |
4086
-						ADVERTISED_10baseT_Full;
4087
-				else
4088
-					advertising |= ADVERTISED_10baseT_Full;
4074
+				if (tg3_flag(tp, WOL_SPEED_100MB)) {
4075
+					linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT,
4076
+							 advertising);
4077
+					linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT,
4078
+							 advertising);
4079
+					linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
4080
+							 advertising);
4081
+				} else {
4082
+					linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
4083
+							 advertising);
4084
+				}
40894085 			}
40904086 
4091
-			phydev->advertising = advertising;
4092
-
4087
+			linkmode_copy(phydev->advertising, advertising);
40934088 			phy_start_aneg(phydev);
40944089 
40954090 			phyid = phydev->drv->phy_id & phydev->drv->phy_id_mask;
....@@ -4282,7 +4277,7 @@
42824277 	pci_set_power_state(tp->pdev, PCI_D3hot);
42834278 }
42844279 
4285
-static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u16 *speed, u8 *duplex)
4280
+static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u32 *speed, u8 *duplex)
42864281 {
42874282 	switch (val & MII_TG3_AUX_STAT_SPDMASK) {
42884283 	case MII_TG3_AUX_STAT_10HALF:
....@@ -4396,7 +4391,7 @@
43964391 				      MII_TG3_DSP_TAP26_RMRXSTO |
43974392 				      MII_TG3_DSP_TAP26_OPCSINPT;
43984393 			tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val);
4399
-			/* Fall through */
4394
+			fallthrough;
44004395 		case ASIC_REV_5720:
44014396 		case ASIC_REV_5762:
44024397 			if (!tg3_phydsp_read(tp, MII_TG3_DSP_CH34TP2, &val))
....@@ -4544,7 +4539,7 @@
45444539 				tp->link_config.speed = SPEED_1000;
45454540 				break;
45464541 			}
4547
-			/* Fall through */
4542
+			fallthrough;
45484543 		default:
45494544 			goto done;
45504545 		}
....@@ -4786,7 +4781,7 @@
47864781 	bool current_link_up;
47874782 	u32 bmsr, val;
47884783 	u32 lcl_adv, rmt_adv;
4789
-	u16 current_speed;
4784
+	u32 current_speed;
47904785 	u8 current_duplex;
47914786 	int i, err;
47924787 
....@@ -5215,7 +5210,7 @@
52155210 		if (ap->flags & (MR_AN_ENABLE | MR_RESTART_AN))
52165211 			ap->state = ANEG_STATE_AN_ENABLE;
52175212 
5218
-		/* fallthru */
5213
+		fallthrough;
52195214 	case ANEG_STATE_AN_ENABLE:
52205215 		ap->flags &= ~(MR_AN_COMPLETE | MR_PAGE_RX);
52215216 		if (ap->flags & MR_AN_ENABLE) {
....@@ -5245,7 +5240,7 @@
52455240 		ret = ANEG_TIMER_ENAB;
52465241 		ap->state = ANEG_STATE_RESTART;
52475242 
5248
-		/* fallthru */
5243
+		fallthrough;
52495244 	case ANEG_STATE_RESTART:
52505245 		delta = ap->cur_time - ap->link_time;
52515246 		if (delta > ANEG_STATE_SETTLE_TIME)
....@@ -5288,7 +5283,7 @@
52885283 
52895284 		ap->state = ANEG_STATE_ACK_DETECT;
52905285 
5291
-		/* fallthru */
5286
+		fallthrough;
52925287 	case ANEG_STATE_ACK_DETECT:
52935288 		if (ap->ack_match != 0) {
52945289 			if ((ap->rxconfig & ~ANEG_CFG_ACK) ==
....@@ -5718,7 +5713,7 @@
57185713 static int tg3_setup_fiber_phy(struct tg3 *tp, bool force_reset)
57195714 {
57205715 	u32 orig_pause_cfg;
5721
-	u16 orig_active_speed;
5716
+	u32 orig_active_speed;
57225717 	u8 orig_active_duplex;
57235718 	u32 mac_status;
57245719 	bool current_link_up;
....@@ -5822,7 +5817,7 @@
58225817 {
58235818 	int err = 0;
58245819 	u32 bmsr, bmcr;
5825
-	u16 current_speed = SPEED_UNKNOWN;
5820
+	u32 current_speed = SPEED_UNKNOWN;
58265821 	u8 current_duplex = DUPLEX_UNKNOWN;
58275822 	bool current_link_up = false;
58285823 	u32 local_adv, remote_adv, sgsr;
....@@ -6139,10 +6134,16 @@
61396134 }
61406135 
61416136 /* tp->lock must be held */
6142
-static u64 tg3_refclk_read(struct tg3 *tp)
6137
+static u64 tg3_refclk_read(struct tg3 *tp, struct ptp_system_timestamp *sts)
61436138 {
6144
-	u64 stamp = tr32(TG3_EAV_REF_CLCK_LSB);
6145
-	return stamp | (u64)tr32(TG3_EAV_REF_CLCK_MSB) << 32;
6139
+	u64 stamp;
6140
+
6141
+	ptp_read_system_prets(sts);
6142
+	stamp = tr32(TG3_EAV_REF_CLCK_LSB);
6143
+	ptp_read_system_postts(sts);
6144
+	stamp |= (u64)tr32(TG3_EAV_REF_CLCK_MSB) << 32;
6145
+
6146
+	return stamp;
61466147 }
61476148 
61486149 /* tp->lock must be held */
....@@ -6233,13 +6234,14 @@
62336234 	return 0;
62346235 }
62356236 
6236
-static int tg3_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
6237
+static int tg3_ptp_gettimex(struct ptp_clock_info *ptp, struct timespec64 *ts,
6238
+			    struct ptp_system_timestamp *sts)
62376239 {
62386240 	u64 ns;
62396241 	struct tg3 *tp = container_of(ptp, struct tg3, ptp_info);
62406242 
62416243 	tg3_full_lock(tp, 0);
6242
-	ns = tg3_refclk_read(tp);
6244
+	ns = tg3_refclk_read(tp, sts);
62436245 	ns += tp->ptp_adjust;
62446246 	tg3_full_unlock(tp);
62456247 
....@@ -6273,6 +6275,10 @@
62736275 
62746276 	switch (rq->type) {
62756277 	case PTP_CLK_REQ_PEROUT:
6278
+		/* Reject requests with unsupported flags */
6279
+		if (rq->perout.flags)
6280
+			return -EOPNOTSUPP;
6281
+
62766282 		if (rq->perout.index != 0)
62776283 			return -EINVAL;
62786284 
....@@ -6334,7 +6340,7 @@
63346340 	.pps		= 0,
63356341 	.adjfreq	= tg3_ptp_adjfreq,
63366342 	.adjtime	= tg3_ptp_adjtime,
6337
-	.gettime64	= tg3_ptp_gettime,
6343
+	.gettimex64	= tg3_ptp_gettimex,
63386344 	.settime64	= tg3_ptp_settime,
63396345 	.enable		= tg3_ptp_enable,
63406346 };
....@@ -6703,7 +6709,7 @@
67036709 	skb_size = SKB_DATA_ALIGN(data_size + TG3_RX_OFFSET(tp)) +
67046710 		   SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
67056711 	if (skb_size <= PAGE_SIZE) {
6706
-		data = netdev_alloc_frag(skb_size);
6712
+		data = napi_alloc_frag(skb_size);
67076713 		*frag_size = skb_size;
67086714 	} else {
67096715 		data = kmalloc(skb_size, GFP_ATOMIC);
....@@ -6991,7 +6997,6 @@
69916997 			tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG,
69926998 				     tpr->rx_jmb_prod_idx);
69936999 		}
6994
-		mmiowb();
69957000 	} else if (work_mask) {
69967001 		/* rx_std_buffers[] and rx_jmb_buffers[] entries must be
69977002 		 * updated before the producer indices can be updated.
....@@ -7202,8 +7207,6 @@
72027207 			tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG,
72037208 				     dpr->rx_jmb_prod_idx);
72047209 
7205
-		mmiowb();
7206
-
72077210 		if (err)
72087211 			tw32_f(HOSTCC_MODE, tp->coal_now);
72097212 	}
....@@ -7270,7 +7273,6 @@
72707273 						  HOSTCC_MODE_ENABLE |
72717274 						  tnapi->coal_now);
72727275 			}
7273
-			mmiowb();
72747276 			break;
72757277 		}
72767278 	}
....@@ -7638,7 +7640,7 @@
76387640 }
76397641 #endif
76407642 
7641
-static void tg3_tx_timeout(struct net_device *dev)
7643
+static void tg3_tx_timeout(struct net_device *dev, unsigned int txqueue)
76427644 {
76437645 	struct tg3 *tp = netdev_priv(dev);
76447646 
....@@ -7867,8 +7869,8 @@
78677869 static int tg3_tso_bug(struct tg3 *tp, struct tg3_napi *tnapi,
78687870 		       struct netdev_queue *txq, struct sk_buff *skb)
78697871 {
7870
-	struct sk_buff *segs, *nskb;
78717872 	u32 frag_cnt_est = skb_shinfo(skb)->gso_segs * 3;
7873
+	struct sk_buff *segs, *seg, *next;
78727874 
78737875 	/* Estimate the number of fragments in the worst case */
78747876 	if (unlikely(tg3_tx_avail(tnapi) <= frag_cnt_est)) {
....@@ -7891,12 +7893,10 @@
78917893 	if (IS_ERR(segs) || !segs)
78927894 		goto tg3_tso_bug_end;
78937895 
7894
-	do {
7895
-		nskb = segs;
7896
-		segs = segs->next;
7897
-		nskb->next = NULL;
7898
-		tg3_start_xmit(nskb, tp->dev);
7899
-	} while (segs);
7896
+	skb_list_walk_safe(segs, seg, next) {
7897
+		skb_mark_not_on_list(seg);
7898
+		tg3_start_xmit(seg, tp->dev);
7899
+	}
79007900 
79017901 tg3_tso_bug_end:
79027902 	dev_consume_skb_any(skb);
....@@ -8148,10 +8148,9 @@
81488148 			netif_tx_wake_queue(txq);
81498149 	}
81508150 
8151
-	if (!skb->xmit_more || netif_xmit_stopped(txq)) {
8151
+	if (!netdev_xmit_more() || netif_xmit_stopped(txq)) {
81528152 		/* Packets are ready, update Tx producer idx on card. */
81538153 		tw32_tx_mbox(tnapi->prodmbox, entry);
8154
-		mmiowb();
81558154 	}
81568155 
81578156 	return NETDEV_TX_OK;
....@@ -8704,10 +8703,10 @@
87048703 		if (!i && tg3_flag(tp, ENABLE_RSS))
87058704 			continue;
87068705 
8707
-		tnapi->rx_rcb = dma_zalloc_coherent(&tp->pdev->dev,
8708
-						    TG3_RX_RCB_RING_BYTES(tp),
8709
-						    &tnapi->rx_rcb_mapping,
8710
-						    GFP_KERNEL);
8706
+		tnapi->rx_rcb = dma_alloc_coherent(&tp->pdev->dev,
8707
+						   TG3_RX_RCB_RING_BYTES(tp),
8708
+						   &tnapi->rx_rcb_mapping,
8709
+						   GFP_KERNEL);
87118710 		if (!tnapi->rx_rcb)
87128711 			goto err_out;
87138712 	}
....@@ -8760,9 +8759,9 @@
87608759 {
87618760 	int i;
87628761 
8763
-	tp->hw_stats = dma_zalloc_coherent(&tp->pdev->dev,
8764
-					   sizeof(struct tg3_hw_stats),
8765
-					   &tp->stats_mapping, GFP_KERNEL);
8762
+	tp->hw_stats = dma_alloc_coherent(&tp->pdev->dev,
8763
+					  sizeof(struct tg3_hw_stats),
8764
+					  &tp->stats_mapping, GFP_KERNEL);
87668765 	if (!tp->hw_stats)
87678766 		goto err_out;
87688767 
....@@ -8770,10 +8769,10 @@
87708769 		struct tg3_napi *tnapi = &tp->napi[i];
87718770 		struct tg3_hw_status *sblk;
87728771 
8773
-		tnapi->hw_status = dma_zalloc_coherent(&tp->pdev->dev,
8774
-						       TG3_HW_STATUS_SIZE,
8775
-						       &tnapi->status_mapping,
8776
-						       GFP_KERNEL);
8772
+		tnapi->hw_status = dma_alloc_coherent(&tp->pdev->dev,
8773
+						      TG3_HW_STATUS_SIZE,
8774
+						      &tnapi->status_mapping,
8775
+						      GFP_KERNEL);
87778776 		if (!tnapi->hw_status)
87788777 			goto err_out;
87798778 
....@@ -10722,40 +10721,40 @@
1072210721 	switch (limit) {
1072310722 	case 16:
1072410723 		tw32(MAC_RCV_RULE_15,  0); tw32(MAC_RCV_VALUE_15,  0);
10725
-		/* fall through */
10724
+		fallthrough;
1072610725 	case 15:
1072710726 		tw32(MAC_RCV_RULE_14,  0); tw32(MAC_RCV_VALUE_14,  0);
10728
-		/* fall through */
10727
+		fallthrough;
1072910728 	case 14:
1073010729 		tw32(MAC_RCV_RULE_13,  0); tw32(MAC_RCV_VALUE_13,  0);
10731
-		/* fall through */
10730
+		fallthrough;
1073210731 	case 13:
1073310732 		tw32(MAC_RCV_RULE_12,  0); tw32(MAC_RCV_VALUE_12,  0);
10734
-		/* fall through */
10733
+		fallthrough;
1073510734 	case 12:
1073610735 		tw32(MAC_RCV_RULE_11,  0); tw32(MAC_RCV_VALUE_11,  0);
10737
-		/* fall through */
10736
+		fallthrough;
1073810737 	case 11:
1073910738 		tw32(MAC_RCV_RULE_10,  0); tw32(MAC_RCV_VALUE_10,  0);
10740
-		/* fall through */
10739
+		fallthrough;
1074110740 	case 10:
1074210741 		tw32(MAC_RCV_RULE_9,  0); tw32(MAC_RCV_VALUE_9,  0);
10743
-		/* fall through */
10742
+		fallthrough;
1074410743 	case 9:
1074510744 		tw32(MAC_RCV_RULE_8,  0); tw32(MAC_RCV_VALUE_8,  0);
10746
-		/* fall through */
10745
+		fallthrough;
1074710746 	case 8:
1074810747 		tw32(MAC_RCV_RULE_7,  0); tw32(MAC_RCV_VALUE_7,  0);
10749
-		/* fall through */
10748
+		fallthrough;
1075010749 	case 7:
1075110750 		tw32(MAC_RCV_RULE_6,  0); tw32(MAC_RCV_VALUE_6,  0);
10752
-		/* fall through */
10751
+		fallthrough;
1075310752 	case 6:
1075410753 		tw32(MAC_RCV_RULE_5,  0); tw32(MAC_RCV_VALUE_5,  0);
10755
-		/* fall through */
10754
+		fallthrough;
1075610755 	case 5:
1075710756 		tw32(MAC_RCV_RULE_4,  0); tw32(MAC_RCV_VALUE_4,  0);
10758
-		/* fall through */
10757
+		fallthrough;
1075910758 	case 4:
1076010759 		/* tw32(MAC_RCV_RULE_3,  0); tw32(MAC_RCV_VALUE_3,  0); */
1076110760 	case 3:
....@@ -10799,17 +10798,15 @@
1079910798 #ifdef CONFIG_TIGON3_HWMON
1080010799 static void tg3_sd_scan_scratchpad(struct tg3 *tp, struct tg3_ocir *ocir)
1080110800 {
10801
+	u32 off, len = TG3_OCIR_LEN;
1080210802 	int i;
1080310803 
10804
-	for (i = 0; i < TG3_SD_NUM_RECS; i++, ocir++) {
10805
-		u32 off = i * TG3_OCIR_LEN, len = TG3_OCIR_LEN;
10806
-
10804
+	for (i = 0, off = 0; i < TG3_SD_NUM_RECS; i++, ocir++, off += len) {
1080710805 		tg3_ape_scratchpad_read(tp, (u32 *) ocir, off, len);
10808
-		off += len;
1080910806 
1081010807 		if (ocir->signature != TG3_OCIR_SIG_MAGIC ||
1081110808 		    !(ocir->version_flags & TG3_OCIR_FLAG_ACTIVE))
10812
-			memset(ocir, 0, TG3_OCIR_LEN);
10809
+			memset(ocir, 0, len);
1081310810 	}
1081410811 }
1081510812 
....@@ -11189,7 +11186,7 @@
1118911186 	rtnl_lock();
1119011187 	tg3_full_lock(tp, 0);
1119111188 
11192
-	if (!netif_running(tp->dev)) {
11189
+	if (tp->pcierr_recovery || !netif_running(tp->dev)) {
1119311190 		tg3_flag_clear(tp, RESET_TASK_PENDING);
1119411191 		tg3_full_unlock(tp);
1119511192 		rtnl_unlock();
....@@ -12322,7 +12319,6 @@
1232212319 	struct tg3 *tp = netdev_priv(dev);
1232312320 
1232412321 	strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
12325
-	strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
1232612322 	strlcpy(info->fw_version, tp->fw_ver, sizeof(info->fw_version));
1232712323 	strlcpy(info->bus_info, pci_name(tp->pdev), sizeof(info->bus_info));
1232812324 }
....@@ -12513,31 +12509,24 @@
1251312509 		tg3_warn_mgmt_link_flap(tp);
1251412510 
1251512511 	if (tg3_flag(tp, USE_PHYLIB)) {
12516
-		u32 newadv;
1251712512 		struct phy_device *phydev;
1251812513 
1251912514 		phydev = mdiobus_get_phy(tp->mdio_bus, tp->phy_addr);
1252012515 
12521
-		if (!(phydev->supported & SUPPORTED_Pause) ||
12522
-		    (!(phydev->supported & SUPPORTED_Asym_Pause) &&
12523
-		     (epause->rx_pause != epause->tx_pause)))
12516
+		if (!phy_validate_pause(phydev, epause))
1252412517 			return -EINVAL;
1252512518 
1252612519 		tp->link_config.flowctrl = 0;
12520
+		phy_set_asym_pause(phydev, epause->rx_pause, epause->tx_pause);
1252712521 		if (epause->rx_pause) {
1252812522 			tp->link_config.flowctrl |= FLOW_CTRL_RX;
1252912523 
1253012524 			if (epause->tx_pause) {
1253112525 				tp->link_config.flowctrl |= FLOW_CTRL_TX;
12532
-				newadv = ADVERTISED_Pause;
12533
-			} else
12534
-				newadv = ADVERTISED_Pause |
12535
-					 ADVERTISED_Asym_Pause;
12526
+			}
1253612527 		} else if (epause->tx_pause) {
1253712528 			tp->link_config.flowctrl |= FLOW_CTRL_TX;
12538
-			newadv = ADVERTISED_Asym_Pause;
12539
-		} else
12540
-			newadv = 0;
12529
+		}
1254112530 
1254212531 		if (epause->autoneg)
1254312532 			tg3_flag_set(tp, PAUSE_AUTONEG);
....@@ -12545,33 +12534,19 @@
1254512534 			tg3_flag_clear(tp, PAUSE_AUTONEG);
1254612535 
1254712536 		if (tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) {
12548
-			u32 oldadv = phydev->advertising &
12549
-				     (ADVERTISED_Pause | ADVERTISED_Asym_Pause);
12550
-			if (oldadv != newadv) {
12551
-				phydev->advertising &=
12552
-					~(ADVERTISED_Pause |
12553
-					  ADVERTISED_Asym_Pause);
12554
-				phydev->advertising |= newadv;
12555
-				if (phydev->autoneg) {
12556
-					/*
12557
-					 * Always renegotiate the link to
12558
-					 * inform our link partner of our
12559
-					 * flow control settings, even if the
12560
-					 * flow control is forced.  Let
12561
-					 * tg3_adjust_link() do the final
12562
-					 * flow control setup.
12563
-					 */
12564
-					return phy_start_aneg(phydev);
12565
-				}
12537
+			if (phydev->autoneg) {
12538
+				/* phy_set_asym_pause() will
12539
+				 * renegotiate the link to inform our
12540
+				 * link partner of our flow control
12541
+				 * settings, even if the flow control
12542
+				 * is forced.  Let tg3_adjust_link()
12543
+				 * do the final flow control setup.
12544
+				 */
12545
+				return 0;
1256612546 			}
1256712547 
1256812548 			if (!epause->autoneg)
1256912549 				tg3_setup_flow_control(tp, 0, 0);
12570
-		} else {
12571
-			tp->link_config.advertising &=
12572
-					~(ADVERTISED_Pause |
12573
-					  ADVERTISED_Asym_Pause);
12574
-			tp->link_config.advertising |= newadv;
1257512550 		}
1257612551 	} else {
1257712552 		int irq_sync = 0;
....@@ -12784,9 +12759,6 @@
1278412759 			    enum ethtool_phys_id_state state)
1278512760 {
1278612761 	struct tg3 *tp = netdev_priv(dev);
12787
-
12788
-	if (!netif_running(tp->dev))
12789
-		return -EAGAIN;
1279012762 
1279112763 	switch (state) {
1279212764 	case ETHTOOL_ID_ACTIVE:
....@@ -14036,7 +14008,7 @@
1403614008 	case SIOCGMIIPHY:
1403714009 		data->phy_id = tp->phy_addr;
1403814010 
14039
-		/* fallthru */
14011
+		fallthrough;
1404014012 	case SIOCGMIIREG: {
1404114013 		u32 mii_regval;
1404214014 
....@@ -14189,6 +14161,11 @@
1418914161 }
1419014162 
1419114163 static const struct ethtool_ops tg3_ethtool_ops = {
14164
+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
14165
+				     ETHTOOL_COALESCE_MAX_FRAMES |
14166
+				     ETHTOOL_COALESCE_USECS_IRQ |
14167
+				     ETHTOOL_COALESCE_MAX_FRAMES_IRQ |
14168
+				     ETHTOOL_COALESCE_STATS_BLOCK_USECS,
1419214169 	.get_drvinfo		= tg3_get_drvinfo,
1419314170 	.get_regs_len		= tg3_get_regs_len,
1419414171 	.get_regs		= tg3_get_regs,
....@@ -17007,32 +16984,6 @@
1700716984 	return err;
1700816985 }
1700916986 
17010
-#ifdef CONFIG_SPARC
17011
-static int tg3_get_macaddr_sparc(struct tg3 *tp)
17012
-{
17013
-	struct net_device *dev = tp->dev;
17014
-	struct pci_dev *pdev = tp->pdev;
17015
-	struct device_node *dp = pci_device_to_OF_node(pdev);
17016
-	const unsigned char *addr;
17017
-	int len;
17018
-
17019
-	addr = of_get_property(dp, "local-mac-address", &len);
17020
-	if (addr && len == ETH_ALEN) {
17021
-		memcpy(dev->dev_addr, addr, ETH_ALEN);
17022
-		return 0;
17023
-	}
17024
-	return -ENODEV;
17025
-}
17026
-
17027
-static int tg3_get_default_macaddr_sparc(struct tg3 *tp)
17028
-{
17029
-	struct net_device *dev = tp->dev;
17030
-
17031
-	memcpy(dev->dev_addr, idprom->id_ethaddr, ETH_ALEN);
17032
-	return 0;
17033
-}
17034
-#endif
17035
-
1703616987 static int tg3_get_device_address(struct tg3 *tp)
1703716988 {
1703816989 	struct net_device *dev = tp->dev;
....@@ -17040,10 +16991,8 @@
1704016991 	int addr_ok = 0;
1704116992 	int err;
1704216993 
17043
-#ifdef CONFIG_SPARC
17044
-	if (!tg3_get_macaddr_sparc(tp))
16994
+	if (!eth_platform_get_mac_address(&tp->pdev->dev, dev->dev_addr))
1704516995 		return 0;
17046
-#endif
1704716996 
1704816997 	if (tg3_flag(tp, IS_SSB_CORE)) {
1704916998 		err = ssb_gige_get_macaddr(tp->pdev, &dev->dev_addr[0]);
....@@ -17105,13 +17054,8 @@
1710517054 		}
1710617055 	}
1710717056 
17108
-	if (!is_valid_ether_addr(&dev->dev_addr[0])) {
17109
-#ifdef CONFIG_SPARC
17110
-		if (!tg3_get_default_macaddr_sparc(tp))
17111
-			return 0;
17112
-#endif
17057
+	if (!is_valid_ether_addr(&dev->dev_addr[0]))
1711317058 		return -EINVAL;
17114
-	}
1711517059 	return 0;
1711617060 }
1711717061 
....@@ -17202,7 +17146,7 @@
1720217146 				val |= DMA_RWCTRL_WRITE_BNDRY_64_PCIE;
1720317147 				break;
1720417148 			}
17205
-			/* fallthrough */
17149
+			fallthrough;
1720617150 		case 128:
1720717151 		default:
1720817152 			val &= ~DMA_RWCTRL_WRITE_BNDRY_DISAB_PCIE;
....@@ -17217,28 +17161,28 @@
1721717161 					DMA_RWCTRL_WRITE_BNDRY_16);
1721817162 				break;
1721917163 			}
17220
-			/* fallthrough */
17164
+			fallthrough;
1722117165 		case 32:
1722217166 			if (goal == BOUNDARY_SINGLE_CACHELINE) {
1722317167 				val |= (DMA_RWCTRL_READ_BNDRY_32 |
1722417168 					DMA_RWCTRL_WRITE_BNDRY_32);
1722517169 				break;
1722617170 			}
17227
-			/* fallthrough */
17171
+			fallthrough;
1722817172 		case 64:
1722917173 			if (goal == BOUNDARY_SINGLE_CACHELINE) {
1723017174 				val |= (DMA_RWCTRL_READ_BNDRY_64 |
1723117175 					DMA_RWCTRL_WRITE_BNDRY_64);
1723217176 				break;
1723317177 			}
17234
-			/* fallthrough */
17178
+			fallthrough;
1723517179 		case 128:
1723617180 			if (goal == BOUNDARY_SINGLE_CACHELINE) {
1723717181 				val |= (DMA_RWCTRL_READ_BNDRY_128 |
1723817182 					DMA_RWCTRL_WRITE_BNDRY_128);
1723917183 				break;
1724017184 			}
17241
-			/* fallthrough */
17185
+			fallthrough;
1724217186 		case 256:
1724317187 			val |= (DMA_RWCTRL_READ_BNDRY_256 |
1724417188 				DMA_RWCTRL_WRITE_BNDRY_256);
....@@ -17687,8 +17631,6 @@
1768717631 	u64 dma_mask, persist_dma_mask;
1768817632 	netdev_features_t features = 0;
1768917633 
17690
-	printk_once(KERN_INFO "%s\n", version);
17691
-
1769217634 	err = pci_enable_device(pdev);
1769317635 	if (err) {
1769417636 		dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n");
....@@ -18105,8 +18047,7 @@
1810518047 #ifdef CONFIG_PM_SLEEP
1810618048 static int tg3_suspend(struct device *device)
1810718049 {
18108
-	struct pci_dev *pdev = to_pci_dev(device);
18109
-	struct net_device *dev = pci_get_drvdata(pdev);
18050
+	struct net_device *dev = dev_get_drvdata(device);
1811018051 	struct tg3 *tp = netdev_priv(dev);
1811118052 	int err = 0;
1811218053 
....@@ -18162,8 +18103,7 @@
1816218103 
1816318104 static int tg3_resume(struct device *device)
1816418105 {
18165
-	struct pci_dev *pdev = to_pci_dev(device);
18166
-	struct net_device *dev = pci_get_drvdata(pdev);
18106
+	struct net_device *dev = dev_get_drvdata(device);
1816718107 	struct tg3 *tp = netdev_priv(dev);
1816818108 	int err = 0;
1816918109 
....@@ -18207,16 +18147,20 @@
1820718147 	struct net_device *dev = pci_get_drvdata(pdev);
1820818148 	struct tg3 *tp = netdev_priv(dev);
1820918149 
18150
+	tg3_reset_task_cancel(tp);
18151
+
1821018152 	rtnl_lock();
18153
+
1821118154 	netif_device_detach(dev);
1821218155 
1821318156 	if (netif_running(dev))
1821418157 		dev_close(dev);
1821518158 
18216
-	if (system_state == SYSTEM_POWER_OFF)
18217
-		tg3_power_down(tp);
18159
+	tg3_power_down(tp);
1821818160 
1821918161 	rtnl_unlock();
18162
+
18163
+	pci_disable_device(pdev);
1822018164 }
1822118165 
1822218166 /**
....@@ -18236,6 +18180,9 @@
1823618180 
1823718181 	netdev_info(netdev, "PCI I/O error detected\n");
1823818182 
18183
+	/* Want to make sure that the reset task doesn't run */
18184
+	tg3_reset_task_cancel(tp);
18185
+
1823918186 	rtnl_lock();
1824018187 
1824118188 	/* Could be second call or maybe we don't have netdev yet */
....@@ -18251,9 +18198,6 @@
1825118198 	tg3_netif_stop(tp);
1825218199 
1825318200 	tg3_timer_stop(tp);
18254
-
18255
-	/* Want to make sure that the reset task doesn't run */
18256
-	tg3_reset_task_cancel(tp);
1825718201 
1825818202 	netif_device_detach(netdev);
1825918203