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2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf 
 kernel/drivers/media/platform/rockchip/isp/dev.h
....@@ -45,21 +45,11 @@
4545 #include "isp_stats.h"
4646 #include "isp_mipi_luma.h"
4747 #include "procfs.h"
48
+#include "isp_external.h"
4849 #include "version.h"
4950 
5051 #define DRIVER_NAME "rkisp"
5152 #define ISP_VDEV_NAME DRIVER_NAME  "_ispdev"
52
-#define SP_VDEV_NAME DRIVER_NAME   "_selfpath"
53
-#define MP_VDEV_NAME DRIVER_NAME   "_mainpath"
54
-#define DMA_VDEV_NAME DRIVER_NAME  "_dmapath"
55
-#define RAW_VDEV_NAME DRIVER_NAME  "_rawpath"
56
-#define DMATX0_VDEV_NAME DRIVER_NAME "_rawwr0"
57
-#define DMATX1_VDEV_NAME DRIVER_NAME "_rawwr1"
58
-#define DMATX2_VDEV_NAME DRIVER_NAME "_rawwr2"
59
-#define DMATX3_VDEV_NAME DRIVER_NAME "_rawwr3"
60
-#define DMARX0_VDEV_NAME DRIVER_NAME "_rawrd0_m"
61
-#define DMARX1_VDEV_NAME DRIVER_NAME "_rawrd1_l"
62
-#define DMARX2_VDEV_NAME DRIVER_NAME "_rawrd2_s"
6353 
6454 #define GRP_ID_SENSOR			BIT(0)
6555 #define GRP_ID_MIPIPHY			BIT(1)
....@@ -70,8 +60,8 @@
7060 #define GRP_ID_ISP_BRIDGE		BIT(6)
7161 #define GRP_ID_CSI			BIT(7)
7262 
73
-#define RKISP_MAX_SENSOR		2
74
-#define RKISP_MAX_PIPELINE		4
63
+#define RKISP_MAX_SENSOR		4
64
+#define RKISP_MAX_PIPELINE		8
7565 
7666 #define RKISP_MEDIA_BUS_FMT_MASK	0xF000
7767 #define RKISP_MEDIA_BUS_FMT_BAYER	0x3000
....@@ -85,11 +75,13 @@
8575 	ISP_FRAME_MP = BIT(3),
8676 	ISP_FRAME_SP = BIT(4),
8777 	ISP_FRAME_MPFBC = BIT(5),
78
+	ISP_FRAME_BP = BIT(6),
8879 
8980 	ISP_STOP = BIT(8),
9081 	ISP_START = BIT(9),
9182 	ISP_ERROR = BIT(10),
9283 	ISP_MIPI_ERROR = BIT(11),
84
+	ISP_CIF_RESET = BIT(12),
9385 };
9486 
9587 enum rkisp_isp_inp {
....@@ -110,6 +102,25 @@
110102 	RDBK_F_RD1,
111103 	RDBK_F_RD2,
112104 	RDBK_F_MAX
105
+};
106
+
107
+/* unite mode for isp to process high resolution
108
+ * ISP_UNITE_TWO: image splits left and right to two isp hardware
109
+ * ISP_UNITE_ONE: image splits left and right to single isp hardware
110
+ */
111
+enum {
112
+	ISP_UNITE_NONE = 0,
113
+	ISP_UNITE_TWO = 1,
114
+	ISP_UNITE_ONE = 2,
115
+};
116
+
117
+/* left and right index
118
+ * ISP_UNITE_LEFT: left of image to isp process
119
+ * ISP_UNITE_RIGHT: right of image to isp process
120
+ */
121
+enum {
122
+	ISP_UNITE_LEFT = 0,
123
+	ISP_UNITE_RIGHT = 1,
113124 };
114125 
115126 /*
....@@ -158,6 +169,7 @@
158169 struct rkisp_hdr {
159170 	u8 op_mode;
160171 	u8 esp_mode;
172
+	u8 compr_bit;
161173 	u8 index[HDR_DMA_MAX];
162174 	atomic_t refcnt;
163175 	struct v4l2_subdev *sensor;
....@@ -190,7 +202,6 @@
190202 	struct v4l2_ctrl_handler ctrl_handler;
191203 	struct media_device media_dev;
192204 	struct v4l2_async_notifier notifier;
193
-	struct v4l2_subdev *subdevs[RKISP_SD_MAX];
194205 	struct rkisp_sensor_info *active_sensor;
195206 	struct rkisp_sensor_info sensors[RKISP_MAX_SENSOR];
196207 	int num_sensors;
....@@ -202,7 +213,7 @@
202213 	struct rkisp_csi_device csi_dev;
203214 	struct rkisp_bridge_device br_dev;
204215 	struct rkisp_luma_vdev luma_vdev;
205
-	struct proc_dir_entry *procfs;
216
+	struct rkisp_procfs procfs;
206217 	struct rkisp_pipeline pipe;
207218 	enum rkisp_isp_ver isp_ver;
208219 	struct rkisp_emd_data emd_data_fifo[RKISP_EMDDATA_FIFO_MAX];
....@@ -219,9 +230,19 @@
219230 	struct mutex apilock; /* mutex to serialize the calls of stream */
220231 	struct mutex iqlock; /* mutex to serialize the calls of iq */
221232 	wait_queue_head_t sync_onoff;
233
+
222234 	dma_addr_t resmem_addr;
223235 	phys_addr_t resmem_pa;
224236 	size_t resmem_size;
237
+	struct rkisp_thunderboot_resmem_head tb_head;
238
+	bool is_thunderboot;
239
+	/* first frame for rtt */
240
+	bool is_rtt_first;
241
+	/* suspend/resume with rtt */
242
+	bool is_rtt_suspend;
243
+	struct rkisp_tb_stream_info tb_stream_info;
244
+	unsigned int tb_addr_idx;
245
+
225246 	int dev_id;
226247 	unsigned int skip_frame;
227248 	unsigned int irq_ends;
....@@ -229,8 +250,10 @@
229250 	bool send_fbcgain;
230251 	struct rkisp_ispp_buf *cur_fbcgain;
231252 	struct rkisp_buffer *cur_spbuf;
232
-	bool is_thunderboot;
233253 
254
+	struct completion pm_cmpl;
255
+
256
+	struct work_struct rdbk_work;
234257 	struct kfifo rdbk_kfifo;
235258 	spinlock_t rdbk_lock;
236259 	int rdbk_cnt;
....@@ -238,6 +261,61 @@
238261 	int rdbk_cnt_x2;
239262 	int rdbk_cnt_x3;
240263 	u32 rd_mode;
241
-	u8 filt_state[RDBK_F_MAX];
264
+	int sw_rd_cnt;
265
+
266
+	struct rkisp_rx_buf_pool pv_pool[RKISP_RX_BUF_POOL_MAX];
267
+
268
+	struct mutex buf_lock;
269
+	spinlock_t cmsk_lock;
270
+	struct rkisp_cmsk_cfg cmsk_cfg;
271
+	bool is_cmsk_upd;
272
+	bool is_hw_link;
273
+	bool is_bigmode;
274
+	bool is_rdbk_auto;
275
+	bool is_pre_on;
276
+	bool is_first_double;
277
+	bool is_probe_end;
278
+	bool is_frame_double;
279
+	bool is_suspend;
280
+	bool suspend_sync;
281
+	bool is_suspend_one_frame;
282
+
283
+	struct rkisp_vicap_input vicap_in;
284
+
285
+	u8 multi_mode;
286
+	u8 multi_index;
287
+	u8 rawaf_irq_cnt;
288
+	u8 unite_index;
242289 };
290
+
291
+static inline void
292
+rkisp_unite_write(struct rkisp_device *dev, u32 reg, u32 val, bool is_direct)
293
+{
294
+	rkisp_write(dev, reg, val, is_direct);
295
+	if (dev->hw_dev->unite)
296
+		rkisp_next_write(dev, reg, val, is_direct);
297
+}
298
+
299
+static inline void
300
+rkisp_unite_set_bits(struct rkisp_device *dev, u32 reg, u32 mask,
301
+		     u32 val, bool is_direct)
302
+{
303
+	rkisp_set_bits(dev, reg, mask, val, is_direct);
304
+	if (dev->hw_dev->unite)
305
+		rkisp_next_set_bits(dev, reg, mask, val, is_direct);
306
+}
307
+
308
+static inline void
309
+rkisp_unite_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask,
310
+		       bool is_direct)
311
+{
312
+	rkisp_clear_bits(dev, reg, mask, is_direct);
313
+	if (dev->hw_dev->unite)
314
+		rkisp_next_clear_bits(dev, reg, mask, is_direct);
315
+}
316
+
317
+static inline bool rkisp_link_sensor(u32 isp_inp)
318
+{
319
+	return isp_inp & (INP_CSI | INP_DVP | INP_LVDS);
320
+}
243321 #endif