update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/media/platform/rockchip/isp/dev.c
..
..
@@ -45,13 +45,13 @@
45
45
 #include <linux/pm_runtime.h>
46
46
 #include <linux/pinctrl/consumer.h>
47
47
 #include <linux/regmap.h>
48
-#include <dt-bindings/soc/rockchip-system-status.h>
49
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 #include <soc/rockchip/rockchip-system-status.h>
50
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 #include "common.h"
51
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 #include "isp_ispp.h"
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 #include "regs.h"
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 #include "rkisp.h"
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53
 #include "version.h"
54
+#include "csi.h"
55
55
 
56
56
 #define RKISP_VERNO_LEN		10
57
57
 
..
..
@@ -224,12 +224,14 @@
224
224
 
225
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 	if (i == p->num_subdevs) {
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 		v4l2_warn(&dev->v4l2_dev, "No active sensor\n");
227
+		hw_dev->isp_size[dev->dev_id].is_on = false;
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 		return -EPIPE;
228
229
 	}
229
230
 
230
231
 	ctrl = v4l2_ctrl_find(sd->ctrl_handler, V4L2_CID_PIXEL_RATE);
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232
 	if (!ctrl) {
232
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 		v4l2_warn(&dev->v4l2_dev, "No pixel rate control in subdev\n");
234
+		hw_dev->isp_size[dev->dev_id].is_on = false;
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 		return -EPIPE;
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 	}
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237
 
..
..
@@ -280,16 +282,22 @@
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 	if (prepare) {
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 		ret = __isp_pipeline_prepare(p, me);
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 		if (ret < 0)
283
-			return ret;
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+			goto err;
284
286
 	}
285
287
 
286
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 	ret = __isp_pipeline_s_isp_clk(p);
287
289
 	if (ret < 0)
288
-		return ret;
290
+		goto err;
291
+
292
+	if (!dev->hw_dev->monitor.is_en)
293
+		dev->hw_dev->monitor.is_en = rkisp_monitor;
289
294
 
290
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 	if (dev->isp_inp & (INP_CSI | INP_RAWRD0 | INP_RAWRD1 | INP_RAWRD2 | INP_CIF))
291
296
 		rkisp_csi_config_patch(dev);
292
297
 	return 0;
298
+err:
299
+	atomic_dec(&p->power_cnt);
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+	return ret;
293
301
 }
294
302
 
295
303
 static int rkisp_pipeline_close(struct rkisp_pipeline *p)
..
..
@@ -313,7 +321,7 @@
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 static int rkisp_pipeline_set_stream(struct rkisp_pipeline *p, bool on)
314
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 {
315
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 	struct rkisp_device *dev = container_of(p, struct rkisp_device, pipe);
316
-	int i, ret;
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+	int i, ret, open_num = 0;
317
325
 
318
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 	if ((on && atomic_inc_return(&p->stream_cnt) > 1) ||
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 	    (!on && atomic_dec_return(&p->stream_cnt) > 0))
..
..
@@ -336,7 +344,11 @@
336
344
 				goto err_stream_off;
337
345
 		}
338
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 	} else {
339
-		if (dev->hw_dev->monitor.is_en) {
347
+		for (i = 0; i < dev->hw_dev->dev_num; i++) {
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+			if (dev->hw_dev->isp_size[i].is_on)
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+				open_num++;
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+		}
351
+		if (dev->hw_dev->monitor.is_en && open_num == 1) {
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 			dev->hw_dev->monitor.is_en = 0;
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 			dev->hw_dev->monitor.state = ISP_STOP;
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 			if (!completion_done(&dev->hw_dev->monitor.cmpl))
..
..
@@ -815,6 +827,15 @@
815
827
 					      DMA_BIDIRECTIONAL);
816
828
 	ret = dma_mapping_error(dev, isp_dev->resmem_addr);
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829
 	isp_dev->is_thunderboot = true;
830
+	isp_dev->is_rtt_suspend = false;
831
+	isp_dev->is_rtt_first = true;
832
+	if (device_property_read_bool(dev, "rtt-suspend")) {
833
+		isp_dev->is_rtt_suspend = true;
834
+		if (!isp_dev->hw_dev->is_thunderboot) {
835
+			isp_dev->is_thunderboot = false;
836
+			isp_dev->is_rtt_first = false;
837
+		}
838
+	}
818
839
 	dev_info(dev, "Allocated reserved memory, paddr: 0x%x\n", (u32)isp_dev->resmem_pa);
819
840
 	return ret;
820
841
 }
..
..
@@ -1006,9 +1027,168 @@
1006
1027
 late_initcall_sync(rkisp_clr_unready_dev);
1007
1028
 #endif
1008
1029
 
1030
+static int rkisp_pm_prepare(struct device *dev)
1031
+{
1032
+	struct rkisp_device *isp_dev = dev_get_drvdata(dev);
1033
+	struct rkisp_hw_dev *hw = isp_dev->hw_dev;
1034
+	struct rkisp_pipeline *p = &isp_dev->pipe;
1035
+	unsigned long lock_flags = 0;
1036
+	int i, on = 0, time = 100;
1037
+
1038
+	if (isp_dev->isp_state & ISP_STOP) {
1039
+		if (pm_runtime_active(dev) &&
1040
+		    rkisp_link_sensor(isp_dev->isp_inp)) {
1041
+			struct v4l2_subdev *mipi_sensor = NULL;
1042
+
1043
+			rkisp_get_remote_mipi_sensor(isp_dev, &mipi_sensor, MEDIA_ENT_F_CAM_SENSOR);
1044
+			if (mipi_sensor)
1045
+				v4l2_subdev_call(mipi_sensor, core, s_power, 0);
1046
+		}
1047
+		return 0;
1048
+	}
1049
+
1050
+	isp_dev->suspend_sync = false;
1051
+	isp_dev->is_suspend = true;
1052
+	if (rkisp_link_sensor(isp_dev->isp_inp)) {
1053
+		for (i = p->num_subdevs - 1; i >= 0; i--)
1054
+			v4l2_subdev_call(p->subdevs[i], video, s_stream, on);
1055
+	} else if (isp_dev->isp_inp & INP_CIF && !(IS_HDR_RDBK(isp_dev->rd_mode))) {
1056
+		v4l2_subdev_call(p->subdevs[0], core, ioctl, RKISP_VICAP_CMD_QUICK_STREAM, &on);
1057
+	}
1058
+	if (IS_HDR_RDBK(isp_dev->rd_mode)) {
1059
+		spin_lock_irqsave(&hw->rdbk_lock, lock_flags);
1060
+		if (!hw->is_idle && hw->cur_dev_id == isp_dev->dev_id)
1061
+			isp_dev->suspend_sync = true;
1062
+		spin_unlock_irqrestore(&hw->rdbk_lock, lock_flags);
1063
+	}
1064
+
1065
+	if (isp_dev->suspend_sync) {
1066
+		wait_for_completion_timeout(&isp_dev->pm_cmpl, msecs_to_jiffies(time));
1067
+		isp_dev->suspend_sync = false;
1068
+	}
1069
+
1070
+	if (rkisp_link_sensor(isp_dev->isp_inp)) {
1071
+		for (i = p->num_subdevs - 1; i >= 0; i--)
1072
+			v4l2_subdev_call(p->subdevs[i], core, s_power, 0);
1073
+	}
1074
+	return 0;
1075
+}
1076
+
1077
+static void rkisp_pm_complete(struct device *dev)
1078
+{
1079
+	struct rkisp_device *isp_dev = dev_get_drvdata(dev);
1080
+	struct rkisp_hw_dev *hw = isp_dev->hw_dev;
1081
+	struct rkisp_pipeline *p = &isp_dev->pipe;
1082
+	struct rkisp_stream *stream;
1083
+	int i, on = 1, rd_mode = isp_dev->rd_mode;
1084
+	u32 val;
1085
+
1086
+	if (isp_dev->isp_state & ISP_STOP) {
1087
+		if (pm_runtime_active(dev) &&
1088
+		    rkisp_link_sensor(isp_dev->isp_inp)) {
1089
+			struct v4l2_subdev *mipi_sensor = NULL;
1090
+
1091
+			rkisp_get_remote_mipi_sensor(isp_dev, &mipi_sensor, MEDIA_ENT_F_CAM_SENSOR);
1092
+			if (mipi_sensor)
1093
+				v4l2_subdev_call(mipi_sensor, core, s_power, 1);
1094
+		}
1095
+		return;
1096
+	}
1097
+
1098
+	if (isp_dev->is_rtt_suspend) {
1099
+		rkisp_save_tb_info(isp_dev);
1100
+		v4l2_info(&isp_dev->v4l2_dev,
1101
+			  "tb info en:%d comp:%d cnt:%d w:%d h:%d cam:%d idx:%d mode:%d\n",
1102
+			  isp_dev->tb_head.enable, isp_dev->tb_head.complete,
1103
+			  isp_dev->tb_head.frm_total, isp_dev->tb_head.width,
1104
+			  isp_dev->tb_head.height, isp_dev->tb_head.camera_num,
1105
+			  isp_dev->tb_head.camera_index, isp_dev->tb_head.rtt_mode);
1106
+		isp_dev->is_first_double = false;
1107
+		switch (isp_dev->tb_head.rtt_mode) {
1108
+		case RKISP_RTT_MODE_ONE_FRAME:
1109
+			isp_dev->is_first_double = true;
1110
+			/* switch to readback mode */
1111
+			switch (rd_mode) {
1112
+			case HDR_LINEX3_DDR:
1113
+				isp_dev->rd_mode = HDR_RDBK_FRAME3;
1114
+				break;
1115
+			case HDR_LINEX2_DDR:
1116
+				isp_dev->rd_mode = HDR_RDBK_FRAME2;
1117
+				break;
1118
+			default:
1119
+				isp_dev->rd_mode = HDR_RDBK_FRAME1;
1120
+			}
1121
+			break;
1122
+		case RKISP_RTT_MODE_MULTI_FRAME:
1123
+		default:
1124
+			if (isp_dev->tb_head.rtt_mode != RKISP_RTT_MODE_MULTI_FRAME)
1125
+				v4l2_warn(&isp_dev->v4l2_dev,
1126
+					  "invalid rtt mode:%d, change to mode:%d\n",
1127
+					  isp_dev->tb_head.rtt_mode, RKISP_RTT_MODE_MULTI_FRAME);
1128
+			if (!hw->is_single)
1129
+				break;
1130
+			/* switch to online mode for single sensor */
1131
+			switch (rd_mode) {
1132
+			case HDR_RDBK_FRAME3:
1133
+				isp_dev->rd_mode = HDR_LINEX3_DDR;
1134
+				break;
1135
+			case HDR_RDBK_FRAME2:
1136
+				isp_dev->rd_mode = HDR_LINEX2_DDR;
1137
+				break;
1138
+			default:
1139
+				isp_dev->rd_mode = HDR_NORMAL;
1140
+			}
1141
+		}
1142
+		isp_dev->hdr.op_mode = isp_dev->rd_mode;
1143
+		if (rd_mode != isp_dev->rd_mode && hw->cur_dev_id == isp_dev->dev_id) {
1144
+			rkisp_unite_write(isp_dev, CSI2RX_CTRL0,
1145
+					  SW_IBUF_OP_MODE(isp_dev->rd_mode), true);
1146
+			if (IS_HDR_RDBK(isp_dev->rd_mode))
1147
+				rkisp_unite_set_bits(isp_dev, CTRL_SWS_CFG, 0,
1148
+						     SW_MPIP_DROP_FRM_DIS, true);
1149
+			else
1150
+				rkisp_unite_clear_bits(isp_dev, CTRL_SWS_CFG,
1151
+						       SW_MPIP_DROP_FRM_DIS, true);
1152
+		}
1153
+	}
1154
+
1155
+	isp_dev->is_suspend = false;
1156
+	isp_dev->isp_state = ISP_START | ISP_FRAME_END;
1157
+	if (!hw->is_single && hw->is_multi_overflow)
1158
+		hw->pre_dev_id++;
1159
+	if (isp_dev->is_suspend_one_frame && !hw->is_multi_overflow)
1160
+		isp_dev->is_first_double = true;
1161
+	if (hw->isp_ver > ISP_V20) {
1162
+		val = ISP3X_YNR_FST_FRAME | ISP3X_CNR_FST_FRAME |
1163
+		      ISP3X_DHAZ_FST_FRAME | ISP3X_ADRC_FST_FRAME;
1164
+		if (hw->isp_ver == ISP_V32)
1165
+			val |= ISP32_SHP_FST_FRAME;
1166
+		rkisp_unite_set_bits(isp_dev, ISP3X_ISP_CTRL1, 0, val, false);
1167
+	}
1168
+	for (i = 0; i < RKISP_MAX_STREAM; i++) {
1169
+		stream = &isp_dev->cap_dev.stream[i];
1170
+		if (i == RKISP_STREAM_VIR || !stream->streaming || !stream->curr_buf)
1171
+			continue;
1172
+		/* skip first frame due to hw no reference frame information */
1173
+		if (isp_dev->is_first_double)
1174
+			stream->skip_frame = 1;
1175
+	}
1176
+	if (hw->cur_dev_id == isp_dev->dev_id)
1177
+		rkisp_rdbk_trigger_event(isp_dev, T_CMD_QUEUE, NULL);
1178
+
1179
+	if (rkisp_link_sensor(isp_dev->isp_inp)) {
1180
+		for (i = 0; i < p->num_subdevs; i++)
1181
+			v4l2_subdev_call(p->subdevs[i], core, s_power, 1);
1182
+		for (i = 0; i < p->num_subdevs; i++)
1183
+			v4l2_subdev_call(p->subdevs[i], video, s_stream, on);
1184
+	} else if (isp_dev->isp_inp & INP_CIF && !(IS_HDR_RDBK(isp_dev->rd_mode))) {
1185
+		v4l2_subdev_call(p->subdevs[0], core, ioctl, RKISP_VICAP_CMD_QUICK_STREAM, &on);
1186
+	}
1187
+}
1188
+
1009
1189
 static const struct dev_pm_ops rkisp_plat_pm_ops = {
1010
-	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1011
-				pm_runtime_force_resume)
1190
+	.prepare = rkisp_pm_prepare,
1191
+	.complete = rkisp_pm_complete,
1012
1192
 	SET_RUNTIME_PM_OPS(rkisp_runtime_suspend, rkisp_runtime_resume, NULL)
1013
1193
 };
1014
1194