update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/media/platform/rockchip/isp/capture_v32.c
..
..
@@ -554,7 +554,8 @@
554
554
 
555
555
 	if (dcrop->width == input_win->width &&
556
556
 	    dcrop->height == input_win->height &&
557
-	    dcrop->left == 0 && dcrop->top == 0) {
557
+	    dcrop->left == 0 && dcrop->top == 0 &&
558
+	    !dev->hw_dev->unite) {
558
559
 		rkisp_disable_dcrop(stream, async);
559
560
 		v4l2_dbg(1, rkisp_debug, &dev->v4l2_dev,
560
561
 			 "stream %d crop disabled\n", stream->id);
..
..
@@ -704,29 +705,29 @@
704
705
 	/* in bytes for isp32 */
705
706
 	if (dev->isp_ver == ISP_V32 &&
706
707
 	    stream->out_isp_fmt.write_format != MI_CTRL_MP_WRITE_YUVINT)
707
-		rkisp_write(dev, ISP3X_MI_MP_WR_Y_LLENGTH, val, false);
708
+		rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_LLENGTH, val, false);
708
709
 	val /= DIV_ROUND_UP(fmt->bpp[0], 8);
709
710
 	/* in pixels for isp32 lite */
710
711
 	if (dev->isp_ver == ISP_V32_L)
711
-		rkisp_write(dev, ISP3X_MI_MP_WR_Y_LLENGTH, val, false);
712
+		rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_LLENGTH, val, false);
712
713
 	val *= height;
713
-	rkisp_write(dev, stream->config->mi.y_pic_size, val, false);
714
+	rkisp_unite_write(dev, stream->config->mi.y_pic_size, val, false);
714
715
 	val = out_fmt->plane_fmt[0].bytesperline * height;
715
-	rkisp_write(dev, stream->config->mi.y_size_init, val, false);
716
+	rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false);
716
717
 
717
718
 	val = out_fmt->plane_fmt[1].sizeimage;
718
719
 	if (dev->cap_dev.wrap_line)
719
720
 		val = out_fmt->plane_fmt[0].bytesperline * height / 2;
720
-	rkisp_write(dev, stream->config->mi.cb_size_init, val, false);
721
+	rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false);
721
722
 
722
723
 	val = out_fmt->plane_fmt[2].sizeimage;
723
724
 	if (dev->cap_dev.wrap_line)
724
725
 		val = out_fmt->plane_fmt[0].bytesperline * height / 2;
725
-	rkisp_write(dev, stream->config->mi.cr_size_init, val, false);
726
+	rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false);
726
727
 
727
728
 	val = stream->out_isp_fmt.uv_swap ? ISP3X_MI_XTD_FORMAT_MP_UV_SWAP : 0;
728
729
 	mask = ISP3X_MI_XTD_FORMAT_MP_UV_SWAP;
729
-	rkisp_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false);
730
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false);
730
731
 
731
732
 	mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_MP_YUV_MODE;
732
733
 	val = rkisp_read_reg_cache(dev, ISP3X_MPFBC_CTRL) & ~mask;
..
..
@@ -738,24 +739,24 @@
738
739
 		val |= ISP3X_SEPERATE_YUV_CFG;
739
740
 	else
740
741
 		val |= ISP3X_SEPERATE_YUV_CFG | ISP3X_MP_YUV_MODE;
741
-	rkisp_write(dev, ISP3X_MPFBC_CTRL, val, false);
742
+	rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false);
742
743
 
743
744
 	val = stream->out_isp_fmt.output_format;
744
-	rkisp_write(dev, ISP32_MI_MP_WR_CTRL, val, false);
745
+	rkisp_unite_write(dev, ISP32_MI_MP_WR_CTRL, val, false);
745
746
 
746
747
 	val = calc_burst_len(stream) | CIF_MI_CTRL_INIT_BASE_EN |
747
748
 		CIF_MI_CTRL_INIT_OFFSET_EN | CIF_MI_MP_AUTOUPDATE_ENABLE |
748
749
 		stream->out_isp_fmt.write_format;
749
750
 	mask = GENMASK(19, 16) | MI_CTRL_MP_FMT_MASK;
750
-	rkisp_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false);
751
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false);
751
752
 
752
753
 	mi_frame_end_int_enable(stream);
753
754
 	/* set up first buffer */
754
755
 	mi_frame_end(stream, FRAME_INIT);
755
756
 
756
-	rkisp_write(dev, stream->config->mi.y_offs_cnt_init, 0, false);
757
-	rkisp_write(dev, stream->config->mi.cb_offs_cnt_init, 0, false);
758
-	rkisp_write(dev, stream->config->mi.cr_offs_cnt_init, 0, false);
757
+	rkisp_unite_write(dev, stream->config->mi.y_offs_cnt_init, 0, false);
758
+	rkisp_unite_write(dev, stream->config->mi.cb_offs_cnt_init, 0, false);
759
+	rkisp_unite_write(dev, stream->config->mi.cr_offs_cnt_init, 0, false);
759
760
 	return 0;
760
761
 }
761
762
 
..
..
@@ -805,21 +806,21 @@
805
806
 	* memory plane formats, so calculate the size explicitly.
806
807
 	*/
807
808
 	val = stream->u.sp.y_stride;
808
-	rkisp_write(dev, ISP3X_MI_SP_WR_Y_LLENGTH, val, false);
809
+	rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_LLENGTH, val, false);
809
810
 	val *= out_fmt->height;
810
-	rkisp_write(dev, stream->config->mi.y_pic_size, val, false);
811
+	rkisp_unite_write(dev, stream->config->mi.y_pic_size, val, false);
811
812
 	val = out_fmt->plane_fmt[0].bytesperline * out_fmt->height;
812
-	rkisp_write(dev, stream->config->mi.y_size_init, val, false);
813
+	rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false);
813
814
 
814
815
 	val = out_fmt->plane_fmt[1].sizeimage;
815
-	rkisp_write(dev, stream->config->mi.cb_size_init, val, false);
816
+	rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false);
816
817
 
817
818
 	val = out_fmt->plane_fmt[2].sizeimage;
818
-	rkisp_write(dev, stream->config->mi.cr_size_init, val, false);
819
+	rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false);
819
820
 
820
821
 	val = stream->out_isp_fmt.uv_swap ? ISP3X_MI_XTD_FORMAT_SP_UV_SWAP : 0;
821
822
 	mask = ISP3X_MI_XTD_FORMAT_SP_UV_SWAP;
822
-	rkisp_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false);
823
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false);
823
824
 
824
825
 	mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_SP_YUV_MODE;
825
826
 	val = rkisp_read_reg_cache(dev, ISP3X_MPFBC_CTRL) & ~mask;
..
..
@@ -831,22 +832,22 @@
831
832
 		val |= ISP3X_SEPERATE_YUV_CFG;
832
833
 	else
833
834
 		val |= ISP3X_SEPERATE_YUV_CFG | ISP3X_SP_YUV_MODE;
834
-	rkisp_write(dev, ISP3X_MPFBC_CTRL, val, false);
835
+	rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false);
835
836
 
836
837
 	val = calc_burst_len(stream) | CIF_MI_CTRL_INIT_BASE_EN |
837
838
 		CIF_MI_CTRL_INIT_OFFSET_EN | stream->out_isp_fmt.write_format |
838
839
 		sp_in_fmt | stream->out_isp_fmt.output_format |
839
840
 		CIF_MI_SP_AUTOUPDATE_ENABLE;
840
841
 	mask = GENMASK(19, 16) | MI_CTRL_SP_FMT_MASK;
841
-	rkisp_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false);
842
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false);
842
843
 
843
844
 	mi_frame_end_int_enable(stream);
844
845
 	/* set up first buffer */
845
846
 	mi_frame_end(stream, FRAME_INIT);
846
847
 
847
-	rkisp_write(dev, stream->config->mi.y_offs_cnt_init, 0, false);
848
-	rkisp_write(dev, stream->config->mi.cb_offs_cnt_init, 0, false);
849
-	rkisp_write(dev, stream->config->mi.cr_offs_cnt_init, 0, false);
848
+	rkisp_unite_write(dev, stream->config->mi.y_offs_cnt_init, 0, false);
849
+	rkisp_unite_write(dev, stream->config->mi.cb_offs_cnt_init, 0, false);
850
+	rkisp_unite_write(dev, stream->config->mi.cr_offs_cnt_init, 0, false);
850
851
 	return 0;
851
852
 }
852
853
 
..
..
@@ -864,18 +865,18 @@
864
865
 	val = out_fmt->plane_fmt[0].bytesperline;
865
866
 	/* in bytes */
866
867
 	if (stream->out_isp_fmt.write_format != ISP3X_BP_FORMAT_INT)
867
-		rkisp_write(dev, ISP3X_MI_BP_WR_Y_LLENGTH, val, false);
868
+		rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_LLENGTH, val, false);
868
869
 	val /= DIV_ROUND_UP(fmt->bpp[0], 8);
869
870
 	/* in pixels */
870
871
 	if (stream->out_isp_fmt.write_format == ISP3X_BP_FORMAT_INT)
871
-		rkisp_write(dev, ISP3X_MI_BP_WR_Y_LLENGTH, val, false);
872
+		rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_LLENGTH, val, false);
872
873
 	val *= out_fmt->height;
873
-	rkisp_write(dev, stream->config->mi.y_pic_size, val, false);
874
+	rkisp_unite_write(dev, stream->config->mi.y_pic_size, val, false);
874
875
 	val = out_fmt->plane_fmt[0].bytesperline * out_fmt->height;
875
-	rkisp_write(dev, stream->config->mi.y_size_init, val, false);
876
+	rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false);
876
877
 
877
878
 	val = out_fmt->plane_fmt[1].sizeimage;
878
-	rkisp_write(dev, stream->config->mi.cb_size_init, val, false);
879
+	rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false);
879
880
 
880
881
 	mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_BP_YUV_MODE;
881
882
 	val = rkisp_read_reg_cache(dev, ISP3X_MPFBC_CTRL) & ~mask;
..
..
@@ -885,15 +886,15 @@
885
886
 		val |= ISP3X_SEPERATE_YUV_CFG;
886
887
 	else
887
888
 		val |= ISP3X_SEPERATE_YUV_CFG | ISP3X_BP_YUV_MODE;
888
-	rkisp_write(dev, ISP3X_MPFBC_CTRL, val, false);
889
+	rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false);
889
890
 	val = CIF_MI_CTRL_INIT_BASE_EN | CIF_MI_CTRL_INIT_OFFSET_EN;
890
-	rkisp_set_bits(dev, ISP3X_MI_WR_CTRL, 0, val, false);
891
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, 0, val, false);
891
892
 	mi_frame_end_int_enable(stream);
892
893
 	/* set up first buffer */
893
894
 	mi_frame_end(stream, FRAME_INIT);
894
895
 
895
-	rkisp_write(dev, stream->config->mi.y_offs_cnt_init, 0, false);
896
-	rkisp_write(dev, stream->config->mi.cb_offs_cnt_init, 0, false);
896
+	rkisp_unite_write(dev, stream->config->mi.y_offs_cnt_init, 0, false);
897
+	rkisp_unite_write(dev, stream->config->mi.cb_offs_cnt_init, 0, false);
897
898
 	return 0;
898
899
 }
899
900
 
..
..
@@ -906,27 +907,27 @@
906
907
 
907
908
 	val = out_fmt->plane_fmt[0].bytesperline;
908
909
 	if (stream->out_isp_fmt.write_format != ISP3X_BP_FORMAT_INT)
909
-		rkisp_write(dev, stream->config->mi.length, val, false);
910
+		rkisp_unite_write(dev, stream->config->mi.length, val, false);
910
911
 	val /= DIV_ROUND_UP(fmt->bpp[0], 8);
911
912
 	if (stream->out_isp_fmt.write_format == ISP3X_BP_FORMAT_INT)
912
-		rkisp_write(dev, stream->config->mi.length, val, false);
913
+		rkisp_unite_write(dev, stream->config->mi.length, val, false);
913
914
 	val *= out_fmt->height;
914
-	rkisp_write(dev, stream->config->mi.y_pic_size, val, false);
915
+	rkisp_unite_write(dev, stream->config->mi.y_pic_size, val, false);
915
916
 	val = out_fmt->plane_fmt[0].bytesperline * out_fmt->height;
916
-	rkisp_write(dev, stream->config->mi.y_size_init, val, false);
917
+	rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false);
917
918
 
918
919
 	val = out_fmt->plane_fmt[1].sizeimage;
919
-	rkisp_write(dev, stream->config->mi.cb_size_init, val, false);
920
+	rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false);
920
921
 
921
922
 	val = CIF_MI_CTRL_INIT_BASE_EN | CIF_MI_CTRL_INIT_OFFSET_EN;
922
-	rkisp_set_bits(dev, ISP3X_MI_WR_CTRL, 0, val, false);
923
+	rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, 0, val, false);
923
924
 
924
925
 	mi_frame_end_int_enable(stream);
925
926
 
926
927
 	mi_frame_end(stream, FRAME_INIT);
927
928
 
928
-	rkisp_write(dev, stream->config->mi.y_offs_cnt_init, 0, false);
929
-	rkisp_write(dev, stream->config->mi.cb_offs_cnt_init, 0, false);
929
+	rkisp_unite_write(dev, stream->config->mi.y_offs_cnt_init, 0, false);
930
+	rkisp_unite_write(dev, stream->config->mi.cb_offs_cnt_init, 0, false);
930
931
 	return 0;
931
932
 }
932
933
 
..
..
@@ -940,7 +941,7 @@
940
941
 
941
942
 	if (isp_fmt->fmt_type == FMT_BAYER)
942
943
 		val = CIF_MI_CTRL_RAW_ENABLE;
943
-	rkisp_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, val, false);
944
+	rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, val, false);
944
945
 
945
946
 	/* enable bpds path output */
946
947
 	if (t->streaming && !t->is_pause)
..
..
@@ -957,7 +958,7 @@
957
958
 	if (fmt->fmt_type == FMT_RGB &&
958
959
 	    dev->isp_sdev.quantization == V4L2_QUANTIZATION_FULL_RANGE)
959
960
 		val |= mask;
960
-	rkisp_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, val, false);
961
+	rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, val, false);
961
962
 }
962
963
 
963
964
 static void bp_enable_mi(struct rkisp_stream *stream)
..
..
@@ -969,7 +970,7 @@
969
970
 		  stream->out_isp_fmt.output_format |
970
971
 		  ISP3X_BP_ENABLE | ISP3X_BP_AUTO_UPD;
971
972
 
972
-	rkisp_write(stream->ispdev, ISP3X_MI_BP_WR_CTRL, val, false);
973
+	rkisp_unite_write(stream->ispdev, ISP3X_MI_BP_WR_CTRL, val, false);
973
974
 
974
975
 	/* enable bpds path output */
975
976
 	if (t->streaming && !t->is_pause)
..
..
@@ -982,7 +983,7 @@
982
983
 		  stream->out_isp_fmt.output_format |
983
984
 		  ISP32_DS_ENABLE | ISP32_DS_AUTO_UPD;
984
985
 
985
-	rkisp_write(stream->ispdev, stream->config->mi.ctrl, val, false);
986
+	rkisp_unite_write(stream->ispdev, stream->config->mi.ctrl, val, false);
986
987
 }
987
988
 
988
989
 static void mp_disable_mi(struct rkisp_stream *stream)
..
..
@@ -991,8 +992,7 @@
991
992
 	struct rkisp_stream *t = &dev->cap_dev.stream[stream->conn_id];
992
993
 	u32 mask = CIF_MI_CTRL_MP_ENABLE | CIF_MI_CTRL_RAW_ENABLE;
993
994
 
994
-	rkisp_set_bits(dev, 0x1814, 0, BIT(0), false);
995
-	rkisp_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, false);
995
+	rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, false);
996
996
 
997
997
 	/* disable mpds path output */
998
998
 	if (!stream->is_pause && t->streaming)
..
..
@@ -1001,7 +1001,7 @@
1001
1001
 
1002
1002
 static void sp_disable_mi(struct rkisp_stream *stream)
1003
1003
 {
1004
-	rkisp_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, CIF_MI_CTRL_SP_ENABLE, false);
1004
+	rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, CIF_MI_CTRL_SP_ENABLE, false);
1005
1005
 }
1006
1006
 
1007
1007
 static void bp_disable_mi(struct rkisp_stream *stream)
..
..
@@ -1009,7 +1009,7 @@
1009
1009
 	struct rkisp_device *dev = stream->ispdev;
1010
1010
 	struct rkisp_stream *t = &dev->cap_dev.stream[stream->conn_id];
1011
1011
 
1012
-	rkisp_clear_bits(stream->ispdev, ISP3X_MI_BP_WR_CTRL, ISP3X_BP_ENABLE, false);
1012
+	rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_BP_WR_CTRL, ISP3X_BP_ENABLE, false);
1013
1013
 
1014
1014
 	/* disable bpds path output */
1015
1015
 	if (!stream->is_pause && t->streaming)
..
..
@@ -1018,7 +1018,7 @@
1018
1018
 
1019
1019
 static void ds_disable_mi(struct rkisp_stream *stream)
1020
1020
 {
1021
-	rkisp_clear_bits(stream->ispdev, stream->config->mi.ctrl, ISP32_DS_ENABLE, false);
1021
+	rkisp_unite_clear_bits(stream->ispdev, stream->config->mi.ctrl, ISP32_DS_ENABLE, false);
1022
1022
 }
1023
1023
 
1024
1024
 static void update_mi(struct rkisp_stream *stream)
..
..
@@ -1046,6 +1046,25 @@
1046
1046
 			reg = stream->config->mi.cr_base_ad_init;
1047
1047
 			val = stream->next_buf->buff_addr[RKISP_PLANE_CR];
1048
1048
 			rkisp_write(dev, reg, val, false);
1049
+		}
1050
+
1051
+		if (dev->hw_dev->unite) {
1052
+			reg = stream->config->mi.y_base_ad_init;
1053
+			val = stream->next_buf->buff_addr[RKISP_PLANE_Y];
1054
+			val += ((stream->out_fmt.width / 2) & ~0xf);
1055
+			rkisp_next_write(dev, reg, val, false);
1056
+
1057
+			reg = stream->config->mi.cb_base_ad_init;
1058
+			val = stream->next_buf->buff_addr[RKISP_PLANE_CB];
1059
+			val += ((stream->out_fmt.width / 2) & ~0xf);
1060
+			rkisp_next_write(dev, reg, val, false);
1061
+
1062
+			if (is_cr_cfg) {
1063
+				reg = stream->config->mi.cr_base_ad_init;
1064
+				val = stream->next_buf->buff_addr[RKISP_PLANE_CR];
1065
+				val += ((stream->out_fmt.width / 2) & ~0xf);
1066
+				rkisp_next_write(dev, reg, val, false);
1067
+			}
1049
1068
 		}
1050
1069
 
1051
1070
 		if (stream->is_pause) {
..
..
@@ -1141,9 +1160,9 @@
1141
1160
 
1142
1161
 	stream->is_mf_upd = false;
1143
1162
 	if (dev->cap_dev.is_mirror)
1144
-		rkisp_set_bits(dev, ISP3X_ISP_CTRL0, 0, ISP32_MIR_ENABLE, false);
1163
+		rkisp_unite_set_bits(dev, ISP3X_ISP_CTRL0, 0, ISP32_MIR_ENABLE, false);
1145
1164
 	else
1146
-		rkisp_clear_bits(dev, ISP3X_ISP_CTRL0, ISP32_MIR_ENABLE, false);
1165
+		rkisp_unite_clear_bits(dev, ISP3X_ISP_CTRL0, ISP32_MIR_ENABLE, false);
1147
1166
 
1148
1167
 	switch (stream->id) {
1149
1168
 	case RKISP_STREAM_SP:
..
..
@@ -1169,9 +1188,9 @@
1169
1188
 
1170
1189
 	tmp = rkisp_read_reg_cache(dev, ISP32_MI_WR_VFLIP_CTRL);
1171
1190
 	if (stream->is_flip)
1172
-		rkisp_write(dev, ISP32_MI_WR_VFLIP_CTRL, tmp | val, false);
1191
+		rkisp_unite_write(dev, ISP32_MI_WR_VFLIP_CTRL, tmp | val, false);
1173
1192
 	else
1174
-		rkisp_write(dev, ISP32_MI_WR_VFLIP_CTRL, tmp & ~val, false);
1193
+		rkisp_unite_write(dev, ISP32_MI_WR_VFLIP_CTRL, tmp & ~val, false);
1175
1194
 	return 0;
1176
1195
 }
1177
1196
 
..
..
@@ -1221,7 +1240,7 @@
1221
1240
 		data++;
1222
1241
 	}
1223
1242
 	if (!ns)
1224
-		ns = ktime_get_ns();
1243
+		ns = rkisp_time_get_ns(dev);
1225
1244
 	stream->curr_buf->vb.vb2_buf.timestamp = ns;
1226
1245
 	stream->curr_buf->vb.sequence = seq;
1227
1246
 	vb2_set_plane_payload(&stream->curr_buf->vb.vb2_buf, 0, val * 4);
..
..
@@ -1408,7 +1427,10 @@
1408
1427
 		    (stream->frame_early && state == FRAME_IRQ))
1409
1428
 			goto end;
1410
1429
 	} else {
1430
+		spin_lock_irqsave(&stream->vbq_lock, lock_flags);
1411
1431
 		buf = stream->curr_buf;
1432
+		stream->curr_buf = NULL;
1433
+		spin_unlock_irqrestore(&stream->vbq_lock, lock_flags);
1412
1434
 	}
1413
1435
 
1414
1436
 	if (buf) {
..
..
@@ -1433,10 +1455,10 @@
1433
1455
 
1434
1456
 		rkisp_dmarx_get_frame(dev, &i, NULL, &ns, true);
1435
1457
 		if (!ns)
1436
-			ns = ktime_get_ns();
1458
+			ns = rkisp_time_get_ns(dev);
1437
1459
 		buf->vb.sequence = i;
1438
1460
 		buf->vb.vb2_buf.timestamp = ns;
1439
-		ns = ktime_get_ns();
1461
+		ns = rkisp_time_get_ns(dev);
1440
1462
 		stream->dbg.interval = ns - stream->dbg.timestamp;
1441
1463
 		stream->dbg.delay = ns - dev->isp_sdev.frm_timestamp;
1442
1464
 		stream->dbg.timestamp = ns;
..
..
@@ -1546,6 +1568,7 @@
1546
1568
 	struct rkisp_device *dev = stream->ispdev;
1547
1569
 	int ret;
1548
1570
 
1571
+	stream->is_pause = false;
1549
1572
 	if (stream->ops->set_data_path)
1550
1573
 		stream->ops->set_data_path(stream);
1551
1574
 	if (stream->ops->config_mi) {
..
..
@@ -2264,6 +2287,12 @@
2264
2287
 	v4l2_dbg(3, rkisp_debug, &dev->v4l2_dev,
2265
2288
 		 "mi isr:0x%x\n", mis_val);
2266
2289
 
2290
+	if (dev->hw_dev->unite == ISP_UNITE_ONE &&
2291
+	    dev->unite_index == ISP_UNITE_LEFT) {
2292
+		rkisp_write(dev, ISP3X_MI_ICR, mis_val, true);
2293
+		goto end;
2294
+	}
2295
+
2267
2296
 	for (i = 0; i < RKISP_MAX_STREAM; ++i) {
2268
2297
 		stream = &dev->cap_dev.stream[i];
2269
2298
 
..
..
@@ -2296,7 +2325,7 @@
2296
2325
 				wake_up(&stream->done);
2297
2326
 			}
2298
2327
 		} else if (stream->id == RKISP_STREAM_MP && dev->cap_dev.wrap_line) {
2299
-			ns = ktime_get_ns();
2328
+			ns = rkisp_time_get_ns(dev);
2300
2329
 			rkisp_dmarx_get_frame(dev, &seq, NULL, NULL, true);
2301
2330
 			stream->dbg.interval = ns - stream->dbg.timestamp;
2302
2331
 			stream->dbg.delay = ns - dev->isp_sdev.frm_timestamp;
..
..
@@ -2306,7 +2335,7 @@
2306
2335
 			mi_frame_end(stream, FRAME_IRQ);
2307
2336
 		}
2308
2337
 	}
2309
-
2338
+end:
2310
2339
 	if (mis_val & ISP3X_MI_MP_FRAME) {
2311
2340
 		stream = &dev->cap_dev.stream[RKISP_STREAM_MP];
2312
2341
 		if (!stream->streaming)