update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/media/platform/rockchip/cif/subdev-itf.c
..
..
@@ -283,14 +283,14 @@
283
283
 	struct rkcif_device *cif_dev = priv->cif_dev;
284
284
 
285
285
 	if (priv->hdr_cfg.hdr_mode == HDR_X2) {
286
-		rkcif_free_rx_buf(&cif_dev->stream[0], priv->buf_num);
287
-		rkcif_free_rx_buf(&cif_dev->stream[1], priv->buf_num);
286
+		rkcif_free_rx_buf(&cif_dev->stream[0], cif_dev->stream[0].rx_buf_num);
287
+		rkcif_free_rx_buf(&cif_dev->stream[1], cif_dev->stream[1].rx_buf_num);
288
288
 	} else if (priv->hdr_cfg.hdr_mode == HDR_X3) {
289
-		rkcif_free_rx_buf(&cif_dev->stream[0], priv->buf_num);
290
-		rkcif_free_rx_buf(&cif_dev->stream[1], priv->buf_num);
291
-		rkcif_free_rx_buf(&cif_dev->stream[2], priv->buf_num);
289
+		rkcif_free_rx_buf(&cif_dev->stream[0], cif_dev->stream[0].rx_buf_num);
290
+		rkcif_free_rx_buf(&cif_dev->stream[1], cif_dev->stream[1].rx_buf_num);
291
+		rkcif_free_rx_buf(&cif_dev->stream[2], cif_dev->stream[2].rx_buf_num);
292
292
 	} else {
293
-		rkcif_free_rx_buf(&cif_dev->stream[0], priv->buf_num);
293
+		rkcif_free_rx_buf(&cif_dev->stream[0], cif_dev->stream[0].rx_buf_num);
294
294
 	}
295
295
 	if (cif_dev->is_thunderboot) {
296
296
 		cif_dev->wait_line_cache = 0;
..
..
@@ -327,6 +327,7 @@
327
327
 		 __func__, mode->rdbk_mode, mode->name, priv->toisp_inf.link_mode);
328
328
 }
329
329
 
330
+static void sditf_channel_disable(struct sditf_priv *priv, int user);
330
331
 static long sditf_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
331
332
 {
332
333
 	struct sditf_priv *priv = to_sditf_priv(sd);
..
..
@@ -336,13 +337,19 @@
336
337
 	struct v4l2_subdev *sensor_sd;
337
338
 	int *pbuf_num = NULL;
338
339
 	int ret = 0;
340
+	int *on = NULL;
339
341
 
340
342
 	switch (cmd) {
341
343
 	case RKISP_VICAP_CMD_MODE:
342
344
 		mode = (struct rkisp_vicap_mode *)arg;
345
+		mutex_lock(&cif_dev->stream_lock);
343
346
 		memcpy(&priv->mode, mode, sizeof(*mode));
347
+		mutex_unlock(&cif_dev->stream_lock);
344
348
 		sditf_reinit_mode(priv, &priv->mode);
345
-		mode->input.merge_num = cif_dev->sditf_cnt;
349
+		if (priv->is_combine_mode)
350
+			mode->input.merge_num = cif_dev->sditf_cnt;
351
+		else
352
+			mode->input.merge_num = 1;
346
353
 		mode->input.index = priv->combine_index;
347
354
 		return 0;
348
355
 	case RKISP_VICAP_CMD_INIT_BUF:
..
..
@@ -358,6 +365,28 @@
358
365
 		if (cif_dev->terminal_sensor.sd) {
359
366
 			sensor_sd = cif_dev->terminal_sensor.sd;
360
367
 			return v4l2_subdev_call(sensor_sd, core, ioctl, cmd, arg);
368
+		}
369
+		break;
370
+	case RKISP_VICAP_CMD_QUICK_STREAM:
371
+		on = (int *)arg;
372
+		if (*on) {
373
+			rkcif_stream_resume(cif_dev, RKCIF_RESUME_ISP);
374
+		} else {
375
+			if (priv->toisp_inf.link_mode == TOISP0) {
376
+				sditf_channel_disable(priv, 0);
377
+			} else if (priv->toisp_inf.link_mode == TOISP1) {
378
+				sditf_channel_disable(priv, 1);
379
+			} else if (priv->toisp_inf.link_mode == TOISP_UNITE) {
380
+				sditf_channel_disable(priv, 0);
381
+				sditf_channel_disable(priv, 1);
382
+			}
383
+			rkcif_stream_suspend(cif_dev, RKCIF_RESUME_ISP);
384
+		}
385
+		break;
386
+	case RKISP_VICAP_CMD_SET_RESET:
387
+		if (priv->mode.rdbk_mode == RKISP_VICAP_ONLINE) {
388
+			cif_dev->is_toisp_reset = true;
389
+			return 0;
361
390
 		}
362
391
 		break;
363
392
 	default:
..
..
@@ -379,6 +408,7 @@
379
408
 	struct rkmodule_hdr_cfg	*hdr_cfg;
380
409
 	int buf_num;
381
410
 	int ret = 0;
411
+	int on;
382
412
 
383
413
 	switch (cmd) {
384
414
 	case RKISP_VICAP_CMD_MODE:
..
..
@@ -411,6 +441,14 @@
411
441
 		}
412
442
 		ret = sditf_ioctl(sd, cmd, hdr_cfg);
413
443
 		return ret;
444
+	case RKISP_VICAP_CMD_QUICK_STREAM:
445
+		if (copy_from_user(&on, up, sizeof(int)))
446
+			return -EFAULT;
447
+		ret = sditf_ioctl(sd, cmd, &on);
448
+		return ret;
449
+	case RKISP_VICAP_CMD_SET_RESET:
450
+		ret = sditf_ioctl(sd, cmd, NULL);
451
+		return ret;
414
452
 	default:
415
453
 		break;
416
454
 	}
..
..
@@ -430,6 +468,7 @@
430
468
 static int sditf_channel_enable(struct sditf_priv *priv, int user)
431
469
 {
432
470
 	struct rkcif_device *cif_dev = priv->cif_dev;
471
+	struct rkmodule_capture_info *capture_info = &cif_dev->channels[0].capture_info;
433
472
 	unsigned int ch0 = 0, ch1 = 0, ch2 = 0;
434
473
 	unsigned int ctrl_val = 0;
435
474
 	unsigned int int_en = 0;
..
..
@@ -437,18 +476,32 @@
437
476
 	unsigned int offset_y = 0;
438
477
 	unsigned int width = priv->cap_info.width;
439
478
 	unsigned int height = priv->cap_info.height;
479
+	int csi_idx = cif_dev->csi_host_idx;
480
+
481
+	if (capture_info->mode == RKMODULE_MULTI_DEV_COMBINE_ONE &&
482
+	    priv->toisp_inf.link_mode == TOISP_UNITE) {
483
+		if (capture_info->multi_dev.dev_num != 2 ||
484
+		    capture_info->multi_dev.pixel_offset != RKMOUDLE_UNITE_EXTEND_PIXEL) {
485
+			v4l2_err(&cif_dev->v4l2_dev,
486
+				 "param error of online mode, combine dev num %d, offset %d\n",
487
+				 capture_info->multi_dev.dev_num,
488
+				 capture_info->multi_dev.pixel_offset);
489
+			return -EINVAL;
490
+		}
491
+		csi_idx = capture_info->multi_dev.dev_idx[user];
492
+	}
440
493
 
441
494
 	if (priv->hdr_cfg.hdr_mode == NO_HDR ||
442
495
 	    priv->hdr_cfg.hdr_mode == HDR_COMPR) {
443
496
 		if (cif_dev->inf_id == RKCIF_MIPI_LVDS)
444
-			ch0 = cif_dev->csi_host_idx * 4;
497
+			ch0 = csi_idx * 4;
445
498
 		else
446
499
 			ch0 = 24;//dvp
447
500
 		ctrl_val = (ch0 << 3) | 0x1;
448
501
 		if (user == 0)
449
-			int_en = CIF_TOISP0_FS(0);
502
+			int_en = CIF_TOISP0_FS(0) | CIF_TOISP0_FE(0);
450
503
 		else
451
-			int_en = CIF_TOISP1_FS(0);
504
+			int_en = CIF_TOISP1_FS(0) | CIF_TOISP1_FE(0);
452
505
 		priv->toisp_inf.ch_info[0].is_valid = true;
453
506
 		priv->toisp_inf.ch_info[0].id = ch0;
454
507
 	} else if (priv->hdr_cfg.hdr_mode == HDR_X2) {
..
..
@@ -457,9 +510,11 @@
457
510
 		ctrl_val = (ch0 << 3) | 0x1;
458
511
 		ctrl_val |= (ch1 << 11) | 0x100;
459
512
 		if (user == 0)
460
-			int_en = CIF_TOISP0_FS(0) | CIF_TOISP0_FS(1);
513
+			int_en = CIF_TOISP0_FS(0) | CIF_TOISP0_FS(1) |
514
+				 CIF_TOISP0_FE(0) | CIF_TOISP0_FE(1);
461
515
 		else
462
-			int_en = CIF_TOISP1_FS(0) | CIF_TOISP1_FS(1);
516
+			int_en = CIF_TOISP1_FS(0) | CIF_TOISP1_FS(1) |
517
+				 CIF_TOISP1_FE(0) | CIF_TOISP1_FE(1);
463
518
 		priv->toisp_inf.ch_info[0].is_valid = true;
464
519
 		priv->toisp_inf.ch_info[0].id = ch0;
465
520
 		priv->toisp_inf.ch_info[1].is_valid = true;
..
..
@@ -472,9 +527,11 @@
472
527
 		ctrl_val |= (ch1 << 11) | 0x100;
473
528
 		ctrl_val |= (ch2 << 19) | 0x10000;
474
529
 		if (user == 0)
475
-			int_en = CIF_TOISP0_FS(0) | CIF_TOISP0_FS(1) | CIF_TOISP0_FS(2);
530
+			int_en = CIF_TOISP0_FS(0) | CIF_TOISP0_FS(1) | CIF_TOISP0_FS(2) |
531
+				 CIF_TOISP0_FE(0) | CIF_TOISP0_FE(1) | CIF_TOISP0_FE(2);
476
532
 		else
477
-			int_en = CIF_TOISP1_FS(0) | CIF_TOISP1_FS(1) | CIF_TOISP1_FS(2);
533
+			int_en = CIF_TOISP1_FS(0) | CIF_TOISP1_FS(1) | CIF_TOISP1_FS(2) |
534
+				 CIF_TOISP1_FE(0) | CIF_TOISP1_FE(1) | CIF_TOISP1_FE(2);
478
535
 		priv->toisp_inf.ch_info[0].is_valid = true;
479
536
 		priv->toisp_inf.ch_info[0].id = ch0;
480
537
 		priv->toisp_inf.ch_info[1].is_valid = true;
..
..
@@ -496,7 +553,10 @@
496
553
 		}
497
554
 	} else {
498
555
 		if (priv->toisp_inf.link_mode == TOISP_UNITE) {
499
-			offset_x = priv->cap_info.width / 2 - RKMOUDLE_UNITE_EXTEND_PIXEL;
556
+			if (capture_info->mode == RKMODULE_MULTI_DEV_COMBINE_ONE)
557
+				offset_x = 0;
558
+			else
559
+				offset_x = priv->cap_info.width / 2 - RKMOUDLE_UNITE_EXTEND_PIXEL;
500
560
 			width = priv->cap_info.width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
501
561
 		}
502
562
 		rkcif_write_register(cif_dev, CIF_REG_TOISP1_CTRL, ctrl_val);
..
..
@@ -566,22 +626,41 @@
566
626
 		sditf_channel_enable(priv, 0);
567
627
 		sditf_channel_enable(priv, 1);
568
628
 	}
569
-	if (priv->hdr_cfg.hdr_mode == NO_HDR) {
570
-		rkcif_free_rx_buf(&cif_dev->stream[0], priv->buf_num);
571
-		cif_dev->stream[0].is_line_wake_up = false;
572
-	} else if (priv->hdr_cfg.hdr_mode == HDR_X2) {
573
-		rkcif_free_rx_buf(&cif_dev->stream[1], priv->buf_num);
574
-		cif_dev->stream[0].is_line_wake_up = false;
575
-		cif_dev->stream[1].is_line_wake_up = false;
576
-	} else if (priv->hdr_cfg.hdr_mode == HDR_X3) {
577
-		rkcif_free_rx_buf(&cif_dev->stream[2], priv->buf_num);
578
-		cif_dev->stream[0].is_line_wake_up = false;
579
-		cif_dev->stream[1].is_line_wake_up = false;
580
-		cif_dev->stream[2].is_line_wake_up = false;
629
+
630
+	if (cif_dev->is_thunderboot) {
631
+		if (priv->hdr_cfg.hdr_mode == NO_HDR) {
632
+			rkcif_free_rx_buf(&cif_dev->stream[0], cif_dev->stream[0].rx_buf_num);
633
+			cif_dev->stream[0].is_line_wake_up = false;
634
+		} else if (priv->hdr_cfg.hdr_mode == HDR_X2) {
635
+			rkcif_free_rx_buf(&cif_dev->stream[1], cif_dev->stream[1].rx_buf_num);
636
+			cif_dev->stream[0].is_line_wake_up = false;
637
+			cif_dev->stream[1].is_line_wake_up = false;
638
+		} else if (priv->hdr_cfg.hdr_mode == HDR_X3) {
639
+			rkcif_free_rx_buf(&cif_dev->stream[2], cif_dev->stream[2].rx_buf_num);
640
+			cif_dev->stream[0].is_line_wake_up = false;
641
+			cif_dev->stream[1].is_line_wake_up = false;
642
+			cif_dev->stream[2].is_line_wake_up = false;
643
+		}
644
+		cif_dev->wait_line_cache = 0;
645
+		cif_dev->wait_line = 0;
646
+		cif_dev->wait_line_bak = 0;
647
+		cif_dev->is_thunderboot = false;
581
648
 	}
582
-	cif_dev->wait_line_cache = 0;
583
-	cif_dev->wait_line = 0;
584
-	cif_dev->wait_line_bak = 0;
649
+}
650
+
651
+void sditf_disable_immediately(struct sditf_priv *priv)
652
+{
653
+	struct rkcif_device *cif_dev = priv->cif_dev;
654
+	u32 ctrl_val = 0x10101;
655
+
656
+	if (priv->toisp_inf.link_mode == TOISP0) {
657
+		rkcif_write_register_and(cif_dev, CIF_REG_TOISP0_CTRL, ~ctrl_val);
658
+	} else if (priv->toisp_inf.link_mode == TOISP1) {
659
+		rkcif_write_register_and(cif_dev, CIF_REG_TOISP1_CTRL, ~ctrl_val);
660
+	} else if (priv->toisp_inf.link_mode == TOISP_UNITE) {
661
+		rkcif_write_register_and(cif_dev, CIF_REG_TOISP0_CTRL, ~ctrl_val);
662
+		rkcif_write_register_and(cif_dev, CIF_REG_TOISP1_CTRL, ~ctrl_val);
663
+	}
585
664
 }
586
665
 
587
666
 static void sditf_check_capture_mode(struct rkcif_device *cif_dev)
..
..
@@ -694,9 +773,12 @@
694
773
 		} else {
695
774
 			ret = sditf_stop_stream(priv);
696
775
 			sditf_free_buf(priv);
776
+			priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AIQ;
697
777
 		}
698
778
 
699
779
 	}
780
+	if (on && ret)
781
+		atomic_dec(&priv->stream_cnt);
700
782
 	return ret;
701
783
 }
702
784
 
..
..
@@ -724,6 +806,7 @@
724
806
 		} else {
725
807
 			v4l2_pipeline_pm_put(&node->vdev.entity);
726
808
 			pm_runtime_put_sync(cif_dev->dev);
809
+			priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AIQ;
727
810
 		}
728
811
 		v4l2_info(&node->vdev, "s_power %d, entity use_count %d\n",
729
812
 			  on, node->vdev.entity.use_count);
..
..
@@ -779,25 +862,37 @@
779
862
 		return -EINVAL;
780
863
 
781
864
 	rx_buf = to_cif_rx_buf(dbufs);
782
-
865
+	v4l2_dbg(3, rkcif_debug, &cif_dev->v4l2_dev, "buf back to vicap 0x%x\n",
866
+		 (u32)rx_buf->dummy.dma_addr);
783
867
 	spin_lock_irqsave(&stream->vbq_lock, flags);
784
-	stream->buf_num_toisp++;
785
868
 	stream->last_rx_buf_idx = dbufs->sequence + 1;
869
+	atomic_inc(&stream->buf_cnt);
786
870
 
787
871
 	if (!list_empty(&stream->rx_buf_head) &&
788
872
 	    cif_dev->is_thunderboot &&
873
+	    (!cif_dev->is_rtt_suspend) &&
789
874
 	    (dbufs->type == BUF_SHORT ||
790
875
 	     (dbufs->type != BUF_SHORT && (!dbufs->is_switch)))) {
791
876
 		spin_lock_irqsave(&cif_dev->buffree_lock, buffree_flags);
792
877
 		list_add_tail(&rx_buf->list_free, &priv->buf_free_list);
793
878
 		spin_unlock_irqrestore(&cif_dev->buffree_lock, buffree_flags);
879
+		atomic_dec(&stream->buf_cnt);
880
+		stream->total_buf_num--;
794
881
 		schedule_work(&priv->buffree_work.work);
795
882
 		is_free = true;
796
883
 	}
797
884
 
798
885
 	if (!is_free && (!dbufs->is_switch)) {
799
886
 		list_add_tail(&rx_buf->list, &stream->rx_buf_head);
800
-		rkcif_assign_check_buffer_update_toisp(stream);
887
+		if (cif_dev->resume_mode != RKISP_RTT_MODE_ONE_FRAME) {
888
+			rkcif_assign_check_buffer_update_toisp(stream);
889
+			if (!stream->dma_en) {
890
+				stream->to_en_dma = RKCIF_DMAEN_BY_ISP;
891
+				rkcif_enable_dma_capture(stream, true);
892
+				cif_dev->sensor_work.on = 1;
893
+				schedule_work(&cif_dev->sensor_work.work);
894
+			}
895
+		}
801
896
 		if (cif_dev->rdbk_debug) {
802
897
 			u32 offset = 0;
803
898
 
..
..
@@ -825,6 +920,10 @@
825
920
 	}
826
921
 	spin_unlock_irqrestore(&stream->vbq_lock, flags);
827
922
 
923
+	if (!cif_dev->is_thunderboot ||
924
+	    cif_dev->is_rdbk_to_online == false)
925
+		return 0;
926
+
828
927
 	if (dbufs->runtime_us && cif_dev->early_line == 0) {
829
928
 		if (!cif_dev->sensor_linetime)
830
929
 			cif_dev->sensor_linetime = rkcif_get_linetime(stream);