hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/media/platform/rockchip/cif/subdev-itf.c
....@@ -283,14 +283,14 @@
283283 struct rkcif_device *cif_dev = priv->cif_dev;
284284
285285 if (priv->hdr_cfg.hdr_mode == HDR_X2) {
286
- rkcif_free_rx_buf(&cif_dev->stream[0], priv->buf_num);
287
- rkcif_free_rx_buf(&cif_dev->stream[1], priv->buf_num);
286
+ rkcif_free_rx_buf(&cif_dev->stream[0], cif_dev->stream[0].rx_buf_num);
287
+ rkcif_free_rx_buf(&cif_dev->stream[1], cif_dev->stream[1].rx_buf_num);
288288 } else if (priv->hdr_cfg.hdr_mode == HDR_X3) {
289
- rkcif_free_rx_buf(&cif_dev->stream[0], priv->buf_num);
290
- rkcif_free_rx_buf(&cif_dev->stream[1], priv->buf_num);
291
- rkcif_free_rx_buf(&cif_dev->stream[2], priv->buf_num);
289
+ rkcif_free_rx_buf(&cif_dev->stream[0], cif_dev->stream[0].rx_buf_num);
290
+ rkcif_free_rx_buf(&cif_dev->stream[1], cif_dev->stream[1].rx_buf_num);
291
+ rkcif_free_rx_buf(&cif_dev->stream[2], cif_dev->stream[2].rx_buf_num);
292292 } else {
293
- rkcif_free_rx_buf(&cif_dev->stream[0], priv->buf_num);
293
+ rkcif_free_rx_buf(&cif_dev->stream[0], cif_dev->stream[0].rx_buf_num);
294294 }
295295 if (cif_dev->is_thunderboot) {
296296 cif_dev->wait_line_cache = 0;
....@@ -327,6 +327,7 @@
327327 __func__, mode->rdbk_mode, mode->name, priv->toisp_inf.link_mode);
328328 }
329329
330
+static void sditf_channel_disable(struct sditf_priv *priv, int user);
330331 static long sditf_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
331332 {
332333 struct sditf_priv *priv = to_sditf_priv(sd);
....@@ -336,11 +337,14 @@
336337 struct v4l2_subdev *sensor_sd;
337338 int *pbuf_num = NULL;
338339 int ret = 0;
340
+ int *on = NULL;
339341
340342 switch (cmd) {
341343 case RKISP_VICAP_CMD_MODE:
342344 mode = (struct rkisp_vicap_mode *)arg;
345
+ mutex_lock(&cif_dev->stream_lock);
343346 memcpy(&priv->mode, mode, sizeof(*mode));
347
+ mutex_unlock(&cif_dev->stream_lock);
344348 sditf_reinit_mode(priv, &priv->mode);
345349 if (priv->is_combine_mode)
346350 mode->input.merge_num = cif_dev->sditf_cnt;
....@@ -363,6 +367,28 @@
363367 return v4l2_subdev_call(sensor_sd, core, ioctl, cmd, arg);
364368 }
365369 break;
370
+ case RKISP_VICAP_CMD_QUICK_STREAM:
371
+ on = (int *)arg;
372
+ if (*on) {
373
+ rkcif_stream_resume(cif_dev, RKCIF_RESUME_ISP);
374
+ } else {
375
+ if (priv->toisp_inf.link_mode == TOISP0) {
376
+ sditf_channel_disable(priv, 0);
377
+ } else if (priv->toisp_inf.link_mode == TOISP1) {
378
+ sditf_channel_disable(priv, 1);
379
+ } else if (priv->toisp_inf.link_mode == TOISP_UNITE) {
380
+ sditf_channel_disable(priv, 0);
381
+ sditf_channel_disable(priv, 1);
382
+ }
383
+ rkcif_stream_suspend(cif_dev, RKCIF_RESUME_ISP);
384
+ }
385
+ break;
386
+ case RKISP_VICAP_CMD_SET_RESET:
387
+ if (priv->mode.rdbk_mode == RKISP_VICAP_ONLINE) {
388
+ cif_dev->is_toisp_reset = true;
389
+ return 0;
390
+ }
391
+ break;
366392 default:
367393 break;
368394 }
....@@ -382,6 +408,7 @@
382408 struct rkmodule_hdr_cfg *hdr_cfg;
383409 int buf_num;
384410 int ret = 0;
411
+ int on;
385412
386413 switch (cmd) {
387414 case RKISP_VICAP_CMD_MODE:
....@@ -413,6 +440,14 @@
413440 return -EFAULT;
414441 }
415442 ret = sditf_ioctl(sd, cmd, hdr_cfg);
443
+ return ret;
444
+ case RKISP_VICAP_CMD_QUICK_STREAM:
445
+ if (copy_from_user(&on, up, sizeof(int)))
446
+ return -EFAULT;
447
+ ret = sditf_ioctl(sd, cmd, &on);
448
+ return ret;
449
+ case RKISP_VICAP_CMD_SET_RESET:
450
+ ret = sditf_ioctl(sd, cmd, NULL);
416451 return ret;
417452 default:
418453 break;
....@@ -464,9 +499,9 @@
464499 ch0 = 24;//dvp
465500 ctrl_val = (ch0 << 3) | 0x1;
466501 if (user == 0)
467
- int_en = CIF_TOISP0_FS(0);
502
+ int_en = CIF_TOISP0_FS(0) | CIF_TOISP0_FE(0);
468503 else
469
- int_en = CIF_TOISP1_FS(0);
504
+ int_en = CIF_TOISP1_FS(0) | CIF_TOISP1_FE(0);
470505 priv->toisp_inf.ch_info[0].is_valid = true;
471506 priv->toisp_inf.ch_info[0].id = ch0;
472507 } else if (priv->hdr_cfg.hdr_mode == HDR_X2) {
....@@ -475,9 +510,11 @@
475510 ctrl_val = (ch0 << 3) | 0x1;
476511 ctrl_val |= (ch1 << 11) | 0x100;
477512 if (user == 0)
478
- int_en = CIF_TOISP0_FS(0) | CIF_TOISP0_FS(1);
513
+ int_en = CIF_TOISP0_FS(0) | CIF_TOISP0_FS(1) |
514
+ CIF_TOISP0_FE(0) | CIF_TOISP0_FE(1);
479515 else
480
- int_en = CIF_TOISP1_FS(0) | CIF_TOISP1_FS(1);
516
+ int_en = CIF_TOISP1_FS(0) | CIF_TOISP1_FS(1) |
517
+ CIF_TOISP1_FE(0) | CIF_TOISP1_FE(1);
481518 priv->toisp_inf.ch_info[0].is_valid = true;
482519 priv->toisp_inf.ch_info[0].id = ch0;
483520 priv->toisp_inf.ch_info[1].is_valid = true;
....@@ -490,9 +527,11 @@
490527 ctrl_val |= (ch1 << 11) | 0x100;
491528 ctrl_val |= (ch2 << 19) | 0x10000;
492529 if (user == 0)
493
- int_en = CIF_TOISP0_FS(0) | CIF_TOISP0_FS(1) | CIF_TOISP0_FS(2);
530
+ int_en = CIF_TOISP0_FS(0) | CIF_TOISP0_FS(1) | CIF_TOISP0_FS(2) |
531
+ CIF_TOISP0_FE(0) | CIF_TOISP0_FE(1) | CIF_TOISP0_FE(2);
494532 else
495
- int_en = CIF_TOISP1_FS(0) | CIF_TOISP1_FS(1) | CIF_TOISP1_FS(2);
533
+ int_en = CIF_TOISP1_FS(0) | CIF_TOISP1_FS(1) | CIF_TOISP1_FS(2) |
534
+ CIF_TOISP1_FE(0) | CIF_TOISP1_FE(1) | CIF_TOISP1_FE(2);
496535 priv->toisp_inf.ch_info[0].is_valid = true;
497536 priv->toisp_inf.ch_info[0].id = ch0;
498537 priv->toisp_inf.ch_info[1].is_valid = true;
....@@ -587,22 +626,41 @@
587626 sditf_channel_enable(priv, 0);
588627 sditf_channel_enable(priv, 1);
589628 }
590
- if (priv->hdr_cfg.hdr_mode == NO_HDR) {
591
- rkcif_free_rx_buf(&cif_dev->stream[0], priv->buf_num);
592
- cif_dev->stream[0].is_line_wake_up = false;
593
- } else if (priv->hdr_cfg.hdr_mode == HDR_X2) {
594
- rkcif_free_rx_buf(&cif_dev->stream[1], priv->buf_num);
595
- cif_dev->stream[0].is_line_wake_up = false;
596
- cif_dev->stream[1].is_line_wake_up = false;
597
- } else if (priv->hdr_cfg.hdr_mode == HDR_X3) {
598
- rkcif_free_rx_buf(&cif_dev->stream[2], priv->buf_num);
599
- cif_dev->stream[0].is_line_wake_up = false;
600
- cif_dev->stream[1].is_line_wake_up = false;
601
- cif_dev->stream[2].is_line_wake_up = false;
629
+
630
+ if (cif_dev->is_thunderboot) {
631
+ if (priv->hdr_cfg.hdr_mode == NO_HDR) {
632
+ rkcif_free_rx_buf(&cif_dev->stream[0], cif_dev->stream[0].rx_buf_num);
633
+ cif_dev->stream[0].is_line_wake_up = false;
634
+ } else if (priv->hdr_cfg.hdr_mode == HDR_X2) {
635
+ rkcif_free_rx_buf(&cif_dev->stream[1], cif_dev->stream[1].rx_buf_num);
636
+ cif_dev->stream[0].is_line_wake_up = false;
637
+ cif_dev->stream[1].is_line_wake_up = false;
638
+ } else if (priv->hdr_cfg.hdr_mode == HDR_X3) {
639
+ rkcif_free_rx_buf(&cif_dev->stream[2], cif_dev->stream[2].rx_buf_num);
640
+ cif_dev->stream[0].is_line_wake_up = false;
641
+ cif_dev->stream[1].is_line_wake_up = false;
642
+ cif_dev->stream[2].is_line_wake_up = false;
643
+ }
644
+ cif_dev->wait_line_cache = 0;
645
+ cif_dev->wait_line = 0;
646
+ cif_dev->wait_line_bak = 0;
647
+ cif_dev->is_thunderboot = false;
602648 }
603
- cif_dev->wait_line_cache = 0;
604
- cif_dev->wait_line = 0;
605
- cif_dev->wait_line_bak = 0;
649
+}
650
+
651
+void sditf_disable_immediately(struct sditf_priv *priv)
652
+{
653
+ struct rkcif_device *cif_dev = priv->cif_dev;
654
+ u32 ctrl_val = 0x10101;
655
+
656
+ if (priv->toisp_inf.link_mode == TOISP0) {
657
+ rkcif_write_register_and(cif_dev, CIF_REG_TOISP0_CTRL, ~ctrl_val);
658
+ } else if (priv->toisp_inf.link_mode == TOISP1) {
659
+ rkcif_write_register_and(cif_dev, CIF_REG_TOISP1_CTRL, ~ctrl_val);
660
+ } else if (priv->toisp_inf.link_mode == TOISP_UNITE) {
661
+ rkcif_write_register_and(cif_dev, CIF_REG_TOISP0_CTRL, ~ctrl_val);
662
+ rkcif_write_register_and(cif_dev, CIF_REG_TOISP1_CTRL, ~ctrl_val);
663
+ }
606664 }
607665
608666 static void sditf_check_capture_mode(struct rkcif_device *cif_dev)
....@@ -627,39 +685,36 @@
627685 struct rkcif_device *cif_dev = priv->cif_dev;
628686 struct v4l2_subdev_format fmt;
629687 unsigned int mode = RKCIF_STREAM_MODE_TOISP;
630
- int ret = 0;
631688
632689 sditf_check_capture_mode(cif_dev);
633690 sditf_get_set_fmt(&priv->sd, NULL, &fmt);
634691 if (priv->mode.rdbk_mode == RKISP_VICAP_ONLINE) {
635692 if (priv->toisp_inf.link_mode == TOISP0) {
636
- ret = sditf_channel_enable(priv, 0);
693
+ sditf_channel_enable(priv, 0);
637694 } else if (priv->toisp_inf.link_mode == TOISP1) {
638
- ret = sditf_channel_enable(priv, 1);
695
+ sditf_channel_enable(priv, 1);
639696 } else if (priv->toisp_inf.link_mode == TOISP_UNITE) {
640
- ret = sditf_channel_enable(priv, 0);
641
- ret |= sditf_channel_enable(priv, 1);
697
+ sditf_channel_enable(priv, 0);
698
+ sditf_channel_enable(priv, 1);
642699 }
643700 mode = RKCIF_STREAM_MODE_TOISP;
644701 } else if (priv->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO) {
645702 mode = RKCIF_STREAM_MODE_TOISP_RDBK;
646703 }
647
- if (ret)
648
- return ret;
649704
650705 if (priv->hdr_cfg.hdr_mode == NO_HDR ||
651706 priv->hdr_cfg.hdr_mode == HDR_COMPR) {
652
- ret = rkcif_do_start_stream(&cif_dev->stream[0], mode);
707
+ rkcif_do_start_stream(&cif_dev->stream[0], mode);
653708 } else if (priv->hdr_cfg.hdr_mode == HDR_X2) {
654
- ret = rkcif_do_start_stream(&cif_dev->stream[0], mode);
655
- ret |= rkcif_do_start_stream(&cif_dev->stream[1], mode);
709
+ rkcif_do_start_stream(&cif_dev->stream[0], mode);
710
+ rkcif_do_start_stream(&cif_dev->stream[1], mode);
656711 } else if (priv->hdr_cfg.hdr_mode == HDR_X3) {
657
- ret = rkcif_do_start_stream(&cif_dev->stream[0], mode);
658
- ret |= rkcif_do_start_stream(&cif_dev->stream[1], mode);
659
- ret |= rkcif_do_start_stream(&cif_dev->stream[2], mode);
712
+ rkcif_do_start_stream(&cif_dev->stream[0], mode);
713
+ rkcif_do_start_stream(&cif_dev->stream[1], mode);
714
+ rkcif_do_start_stream(&cif_dev->stream[2], mode);
660715 }
661716 INIT_LIST_HEAD(&priv->buf_free_list);
662
- return ret;
717
+ return 0;
663718 }
664719
665720 static int sditf_stop_stream(struct sditf_priv *priv)
....@@ -718,6 +773,7 @@
718773 } else {
719774 ret = sditf_stop_stream(priv);
720775 sditf_free_buf(priv);
776
+ priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AIQ;
721777 }
722778
723779 }
....@@ -806,7 +862,7 @@
806862 return -EINVAL;
807863
808864 rx_buf = to_cif_rx_buf(dbufs);
809
- v4l2_dbg(rkcif_debug, 3, &cif_dev->v4l2_dev, "buf back to vicap 0x%x\n",
865
+ v4l2_dbg(3, rkcif_debug, &cif_dev->v4l2_dev, "buf back to vicap 0x%x\n",
810866 (u32)rx_buf->dummy.dma_addr);
811867 spin_lock_irqsave(&stream->vbq_lock, flags);
812868 stream->last_rx_buf_idx = dbufs->sequence + 1;
....@@ -814,6 +870,7 @@
814870
815871 if (!list_empty(&stream->rx_buf_head) &&
816872 cif_dev->is_thunderboot &&
873
+ (!cif_dev->is_rtt_suspend) &&
817874 (dbufs->type == BUF_SHORT ||
818875 (dbufs->type != BUF_SHORT && (!dbufs->is_switch)))) {
819876 spin_lock_irqsave(&cif_dev->buffree_lock, buffree_flags);
....@@ -827,7 +884,15 @@
827884
828885 if (!is_free && (!dbufs->is_switch)) {
829886 list_add_tail(&rx_buf->list, &stream->rx_buf_head);
830
- rkcif_assign_check_buffer_update_toisp(stream);
887
+ if (cif_dev->resume_mode != RKISP_RTT_MODE_ONE_FRAME) {
888
+ rkcif_assign_check_buffer_update_toisp(stream);
889
+ if (!stream->dma_en) {
890
+ stream->to_en_dma = RKCIF_DMAEN_BY_ISP;
891
+ rkcif_enable_dma_capture(stream, true);
892
+ cif_dev->sensor_work.on = 1;
893
+ schedule_work(&cif_dev->sensor_work.work);
894
+ }
895
+ }
831896 if (cif_dev->rdbk_debug) {
832897 u32 offset = 0;
833898
....@@ -855,6 +920,10 @@
855920 }
856921 spin_unlock_irqrestore(&stream->vbq_lock, flags);
857922
923
+ if (!cif_dev->is_thunderboot ||
924
+ cif_dev->is_rdbk_to_online == false)
925
+ return 0;
926
+
858927 if (dbufs->runtime_us && cif_dev->early_line == 0) {
859928 if (!cif_dev->sensor_linetime)
860929 cif_dev->sensor_linetime = rkcif_get_linetime(stream);