.. | .. |
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17 | 17 | #include <media/v4l2-mc.h> |
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18 | 18 | #include <linux/workqueue.h> |
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19 | 19 | #include <linux/rk-camera-module.h> |
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| 20 | +#include <linux/rkcif-config.h> |
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| 21 | +#include <linux/soc/rockchip/rockchip_thunderboot_service.h> |
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20 | 22 | |
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21 | 23 | #include "regs.h" |
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22 | 24 | #include "version.h" |
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.. | .. |
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24 | 26 | #include "mipi-csi2.h" |
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25 | 27 | #include "hw.h" |
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26 | 28 | #include "subdev-itf.h" |
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| 29 | + |
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| 30 | +#if IS_ENABLED(CONFIG_CPU_RV1106) |
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| 31 | +#include <linux/soc/rockchip/rk_sdmmc.h> |
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| 32 | +#endif |
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27 | 33 | |
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28 | 34 | #define CIF_DRIVER_NAME "rkcif" |
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29 | 35 | #define CIF_VIDEODEVICE_NAME "stream_cif" |
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.. | .. |
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46 | 52 | #define CIF_DVP_ID2_VDEV_NAME CIF_VIDEODEVICE_NAME "_dvp_id2" |
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47 | 53 | #define CIF_DVP_ID3_VDEV_NAME CIF_VIDEODEVICE_NAME "_dvp_id3" |
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48 | 54 | |
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| 55 | +#define RKCIF_PLANE_Y 0 |
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| 56 | +#define RKCIF_PLANE_CBCR 1 |
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| 57 | + |
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49 | 58 | /* |
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50 | 59 | * RK1808 support 5 channel inputs simultaneously: |
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51 | 60 | * dvp + 4 mipi virtual channels; |
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.. | .. |
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61 | 70 | #define RKCIF_MAX_STREAM_DVP 4 |
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62 | 71 | #define RKCIF_STREAM_DVP 4 |
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63 | 72 | |
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64 | | -#define RKCIF_MAX_DEV 8 |
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65 | | - |
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66 | 73 | #define RKCIF_MAX_SENSOR 2 |
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67 | 74 | #define RKCIF_MAX_CSI_CHANNEL 4 |
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68 | 75 | #define RKCIF_MAX_PIPELINE 4 |
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.. | .. |
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71 | 78 | #define RKCIF_DEFAULT_HEIGHT 480 |
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72 | 79 | #define RKCIF_FS_DETECTED_NUM 2 |
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73 | 80 | |
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| 81 | +#define RKCIF_MAX_INTERVAL_NS 5000000 |
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74 | 82 | /* |
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75 | 83 | * for HDR mode sync buf |
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76 | 84 | */ |
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77 | 85 | #define RDBK_MAX 3 |
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| 86 | +#define RDBK_TOISP_MAX 2 |
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78 | 87 | #define RDBK_L 0 |
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79 | 88 | #define RDBK_M 1 |
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80 | 89 | #define RDBK_S 2 |
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.. | .. |
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85 | 94 | #define CROP_SRC_SENSOR_MASK (0x1 << 0) |
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86 | 95 | #define CROP_SRC_USR_MASK (0x1 << 1) |
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87 | 96 | |
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| 97 | +/* |
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| 98 | + * max wait time for stream stop |
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| 99 | + */ |
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| 100 | +#define RKCIF_STOP_MAX_WAIT_TIME_MS (500) |
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| 101 | + |
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| 102 | +#define RKCIF_SKIP_FRAME_MAX (16) |
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| 103 | + |
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88 | 104 | enum rkcif_workmode { |
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89 | 105 | RKCIF_WORKMODE_ONEFRAME = 0x00, |
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90 | 106 | RKCIF_WORKMODE_PINGPONG = 0x01, |
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91 | 107 | RKCIF_WORKMODE_LINELOOP = 0x02 |
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| 108 | +}; |
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| 109 | + |
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| 110 | +enum rkcif_stream_mode { |
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| 111 | + RKCIF_STREAM_MODE_NONE = 0x0, |
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| 112 | + RKCIF_STREAM_MODE_CAPTURE = 0x01, |
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| 113 | + RKCIF_STREAM_MODE_TOISP = 0x02, |
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| 114 | + RKCIF_STREAM_MODE_TOSCALE = 0x04, |
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| 115 | + RKCIF_STREAM_MODE_TOISP_RDBK = 0x08, |
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| 116 | + RKCIF_STREAM_MODE_ROCKIT = 0x10 |
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92 | 117 | }; |
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93 | 118 | |
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94 | 119 | enum rkcif_yuvaddr_state { |
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.. | .. |
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103 | 128 | RKCIF_STATE_RESET_IN_STREAMING, |
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104 | 129 | }; |
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105 | 130 | |
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106 | | -enum host_type_t { |
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107 | | - RK_CSI_RXHOST, |
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108 | | - RK_DSI_RXHOST |
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109 | | -}; |
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110 | | - |
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111 | 131 | enum rkcif_lvds_pad { |
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112 | 132 | RKCIF_LVDS_PAD_SINK = 0x0, |
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113 | 133 | RKCIF_LVDS_PAD_SRC_ID0, |
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114 | 134 | RKCIF_LVDS_PAD_SRC_ID1, |
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115 | 135 | RKCIF_LVDS_PAD_SRC_ID2, |
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116 | 136 | RKCIF_LVDS_PAD_SRC_ID3, |
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117 | | - RKCIF_LVDS_PAD_MAX |
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| 137 | + RKCIF_LVDS_PAD_SCL_ID0, |
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| 138 | + RKCIF_LVDS_PAD_SCL_ID1, |
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| 139 | + RKCIF_LVDS_PAD_SCL_ID2, |
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| 140 | + RKCIF_LVDS_PAD_SCL_ID3, |
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| 141 | + RKCIF_LVDS_PAD_MAX, |
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118 | 142 | }; |
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119 | 143 | |
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120 | 144 | enum rkcif_lvds_state { |
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.. | .. |
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170 | 194 | u32 buff_addr[VIDEO_MAX_PLANES]; |
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171 | 195 | void *vaddr[VIDEO_MAX_PLANES]; |
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172 | 196 | }; |
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| 197 | + struct dma_buf *dbuf; |
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| 198 | + u64 fe_timestamp; |
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173 | 199 | }; |
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174 | 200 | |
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175 | | -struct rkcif_dummy_buffer { |
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176 | | - void *vaddr; |
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177 | | - dma_addr_t dma_addr; |
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178 | | - u32 size; |
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| 201 | +struct rkcif_tools_buffer { |
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| 202 | + struct vb2_v4l2_buffer *vb; |
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| 203 | + struct rkisp_rx_buf *dbufs; |
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| 204 | + struct list_head list; |
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| 205 | + u32 frame_idx; |
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| 206 | + u64 timestamp; |
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| 207 | + int use_cnt; |
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179 | 208 | }; |
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180 | 209 | |
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181 | 210 | extern int rkcif_debug; |
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.. | .. |
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250 | 279 | unsigned char enable; /* capture enable */ |
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251 | 280 | unsigned char vc; |
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252 | 281 | unsigned char data_type; |
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| 282 | + unsigned char data_bit; |
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253 | 283 | unsigned char crop_en; |
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254 | 284 | unsigned char cmd_mode_en; |
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255 | 285 | unsigned char fmt_val; |
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| 286 | + unsigned char csi_fmt_val; |
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256 | 287 | unsigned int width; |
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257 | 288 | unsigned int height; |
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258 | 289 | unsigned int virtual_width; |
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| 290 | + unsigned int left_virtual_width; |
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259 | 291 | unsigned int crop_st_x; |
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260 | 292 | unsigned int crop_st_y; |
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261 | 293 | unsigned int dsi_input; |
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262 | 294 | struct rkmodule_lvds_cfg lvds_cfg; |
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| 295 | + struct rkmodule_capture_info capture_info; |
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263 | 296 | }; |
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264 | 297 | |
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265 | 298 | struct rkcif_vdev_node { |
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.. | .. |
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326 | 359 | struct rkcif_irq_stats { |
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327 | 360 | u64 csi_overflow_cnt; |
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328 | 361 | u64 csi_bwidth_lack_cnt; |
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| 362 | + u64 csi_size_err_cnt; |
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329 | 363 | u64 dvp_bus_err_cnt; |
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330 | 364 | u64 dvp_overflow_cnt; |
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331 | 365 | u64 dvp_line_err_cnt; |
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332 | 366 | u64 dvp_pix_err_cnt; |
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333 | | - u64 all_frm_end_cnt; |
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| 367 | + u64 dvp_size_err_cnt; |
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| 368 | + u64 dvp_bwidth_lack_cnt; |
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| 369 | + u64 frm_end_cnt[RKCIF_MAX_STREAM_MIPI]; |
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| 370 | + u64 not_active_buf_cnt[RKCIF_MAX_STREAM_MIPI]; |
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| 371 | + u64 trig_simult_cnt[RKCIF_MAX_STREAM_MIPI]; |
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334 | 372 | u64 all_err_cnt; |
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| 373 | +}; |
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| 374 | + |
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| 375 | +/* |
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| 376 | + * the detecting mode of cif reset timer |
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| 377 | + * related with dts property:rockchip,cif-monitor |
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| 378 | + */ |
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| 379 | +enum rkcif_monitor_mode { |
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| 380 | + RKCIF_MONITOR_MODE_IDLE = 0x0, |
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| 381 | + RKCIF_MONITOR_MODE_CONTINUE, |
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| 382 | + RKCIF_MONITOR_MODE_TRIGGER, |
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| 383 | + RKCIF_MONITOR_MODE_HOTPLUG, |
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335 | 384 | }; |
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336 | 385 | |
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337 | 386 | /* |
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.. | .. |
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348 | 397 | }; |
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349 | 398 | |
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350 | 399 | struct rkcif_timer { |
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| 400 | + struct timer_list timer; |
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| 401 | + spinlock_t timer_lock; |
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351 | 402 | spinlock_t csi2_err_lock; |
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352 | | - unsigned int last_buf_wakeup_cnt[RKCIF_MAX_CSI_CHANNEL]; |
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| 403 | + unsigned long cycle; |
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| 404 | + /* unit: us */ |
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| 405 | + unsigned long line_end_cycle; |
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| 406 | + unsigned int run_cnt; |
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| 407 | + unsigned int max_run_cnt; |
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| 408 | + unsigned int stop_index_of_run_cnt; |
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| 409 | + unsigned int last_buf_wakeup_cnt[RKCIF_MAX_STREAM_MIPI]; |
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353 | 410 | unsigned long csi2_err_cnt_even; |
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354 | 411 | unsigned long csi2_err_cnt_odd; |
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| 412 | + unsigned int csi2_err_ref_cnt; |
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355 | 413 | unsigned int csi2_err_fs_fe_cnt; |
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356 | 414 | unsigned int csi2_err_fs_fe_detect_cnt; |
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| 415 | + unsigned int frm_num_of_monitor_cycle; |
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| 416 | + unsigned int triggered_frame_num; |
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| 417 | + unsigned int vts; |
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| 418 | + unsigned int raw_height; |
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| 419 | + /* unit: ms */ |
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| 420 | + unsigned int err_time_interval; |
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357 | 421 | unsigned int csi2_err_triggered_cnt; |
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358 | 422 | unsigned int notifer_called_cnt; |
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| 423 | + unsigned long frame_end_cycle_us; |
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359 | 424 | u64 csi2_first_err_timestamp; |
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360 | 425 | bool is_triggered; |
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361 | 426 | bool is_buf_stop_update; |
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| 427 | + bool is_running; |
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362 | 428 | bool is_csi2_err_occurred; |
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| 429 | + bool has_been_init; |
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| 430 | + bool is_ctrl_by_user; |
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| 431 | + enum rkcif_monitor_mode monitor_mode; |
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| 432 | + enum rkmodule_reset_src reset_src; |
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363 | 433 | }; |
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364 | 434 | |
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365 | 435 | struct rkcif_extend_info { |
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366 | 436 | struct v4l2_pix_format_mplane pixm; |
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367 | 437 | bool is_extended; |
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| 438 | +}; |
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| 439 | + |
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| 440 | +enum rkcif_capture_mode { |
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| 441 | + RKCIF_TO_DDR = 0, |
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| 442 | + RKCIF_TO_ISP_DDR, |
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| 443 | + RKCIF_TO_ISP_DMA, |
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| 444 | +}; |
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| 445 | + |
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| 446 | +/* |
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| 447 | + * list: used for buf rotation |
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| 448 | + * list_free: only used to release buf asynchronously |
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| 449 | + */ |
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| 450 | +struct rkcif_rx_buffer { |
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| 451 | + int buf_idx; |
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| 452 | + struct list_head list; |
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| 453 | + struct list_head list_free; |
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| 454 | + struct rkisp_rx_buf dbufs; |
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| 455 | + struct rkcif_dummy_buffer dummy; |
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| 456 | + struct rkisp_thunderboot_shmem shmem; |
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| 457 | + u64 fe_timestamp; |
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| 458 | +}; |
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| 459 | + |
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| 460 | +enum rkcif_dma_en_mode { |
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| 461 | + RKCIF_DMAEN_BY_VICAP = 0x1, |
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| 462 | + RKCIF_DMAEN_BY_ISP = 0x2, |
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| 463 | + RKCIF_DMAEN_BY_VICAP_TO_ISP = 0x4, |
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| 464 | + RKCIF_DMAEN_BY_ISP_TO_VICAP = 0x8, |
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| 465 | + RKCIF_DMAEN_BY_ROCKIT = 0x10, |
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| 466 | +}; |
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| 467 | + |
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| 468 | +struct rkcif_skip_info { |
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| 469 | + u8 cap_m; |
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| 470 | + u8 skip_n; |
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| 471 | + bool skip_en; |
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| 472 | + bool skip_to_en; |
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| 473 | + bool skip_to_dis; |
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| 474 | +}; |
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| 475 | + |
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| 476 | +struct rkcif_sync_cfg { |
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| 477 | + u32 type; |
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| 478 | + u32 group; |
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| 479 | +}; |
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| 480 | + |
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| 481 | +enum rkcif_toisp_buf_update_state { |
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| 482 | + RKCIF_TOISP_BUF_ROTATE, |
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| 483 | + RKCIF_TOISP_BUF_THESAME, |
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| 484 | + RKCIF_TOISP_BUF_LOSS, |
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| 485 | +}; |
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| 486 | + |
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| 487 | +struct rkcif_toisp_buf_state { |
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| 488 | + enum rkcif_toisp_buf_update_state state; |
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| 489 | + int check_cnt; |
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| 490 | + bool is_early_update; |
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368 | 491 | }; |
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369 | 492 | |
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370 | 493 | /* |
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.. | .. |
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394 | 517 | struct list_head buf_head; |
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395 | 518 | struct rkcif_buffer *curr_buf; |
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396 | 519 | struct rkcif_buffer *next_buf; |
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| 520 | + struct rkcif_rx_buffer *curr_buf_toisp; |
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| 521 | + struct rkcif_rx_buffer *next_buf_toisp; |
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| 522 | + struct list_head rockit_buf_head; |
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| 523 | + struct rkcif_buffer *curr_buf_rockit; |
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| 524 | + struct rkcif_buffer *next_buf_rockit; |
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397 | 525 | |
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398 | 526 | spinlock_t vbq_lock; /* vfd lock */ |
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399 | 527 | spinlock_t fps_lock; |
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.. | .. |
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408 | 536 | struct rkcif_extend_info extend_line; |
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409 | 537 | struct rkcif_readout_stats readout; |
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410 | 538 | unsigned int fs_cnt_in_single_frame; |
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| 539 | + unsigned int capture_mode; |
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| 540 | + struct rkcif_scale_vdev *scale_vdev; |
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| 541 | + struct rkcif_tools_vdev *tools_vdev; |
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| 542 | + int dma_en; |
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| 543 | + int to_en_dma; |
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| 544 | + int to_stop_dma; |
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| 545 | + int buf_owner; |
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| 546 | + int buf_replace_cnt; |
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| 547 | + struct list_head rx_buf_head_vicap; |
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| 548 | + unsigned int cur_stream_mode; |
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| 549 | + struct rkcif_rx_buffer rx_buf[RKISP_VICAP_BUF_CNT_MAX]; |
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| 550 | + struct list_head rx_buf_head; |
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| 551 | + int total_buf_num; |
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| 552 | + int rx_buf_num; |
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411 | 553 | u64 line_int_cnt; |
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412 | | - int vc; |
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413 | | - u64 streamon_timestamp; |
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| 554 | + int lack_buf_cnt; |
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| 555 | + unsigned int buf_wake_up_cnt; |
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| 556 | + struct rkcif_skip_info skip_info; |
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| 557 | + struct tasklet_struct vb_done_tasklet; |
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| 558 | + struct list_head vb_done_list; |
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| 559 | + int last_rx_buf_idx; |
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| 560 | + int last_frame_idx; |
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| 561 | + int new_fource_idx; |
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| 562 | + atomic_t buf_cnt; |
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| 563 | + struct completion stop_complete; |
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| 564 | + struct rkcif_toisp_buf_state toisp_buf_state; |
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| 565 | + u32 skip_frame; |
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| 566 | + u32 cur_skip_frame; |
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414 | 567 | bool stopping; |
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415 | 568 | bool crop_enable; |
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416 | 569 | bool crop_dyn_en; |
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.. | .. |
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422 | 575 | bool is_can_stop; |
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423 | 576 | bool is_buf_active; |
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424 | 577 | bool is_high_align; |
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| 578 | + bool to_en_scale; |
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| 579 | + bool is_finish_stop_dma; |
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| 580 | + bool is_in_vblank; |
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| 581 | + bool is_change_toisp; |
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| 582 | + bool is_stop_capture; |
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| 583 | + bool is_wait_dma_stop; |
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| 584 | + bool is_single_cap; |
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| 585 | + bool is_wait_stop_complete; |
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425 | 586 | }; |
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426 | 587 | |
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427 | 588 | struct rkcif_lvds_subdev { |
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.. | .. |
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473 | 634 | return &vnode->buf_queue; |
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474 | 635 | } |
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475 | 636 | |
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| 637 | +#define SCALE_DRIVER_NAME "rkcif_scale" |
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| 638 | + |
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| 639 | +#define RKCIF_SCALE_CH0 0 |
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| 640 | +#define RKCIF_SCALE_CH1 1 |
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| 641 | +#define RKCIF_SCALE_CH2 2 |
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| 642 | +#define RKCIF_SCALE_CH3 3 |
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| 643 | +#define RKCIF_MAX_SCALE_CH 4 |
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| 644 | + |
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| 645 | +#define CIF_SCALE_CH0_VDEV_NAME CIF_DRIVER_NAME "_scale_ch0" |
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| 646 | +#define CIF_SCALE_CH1_VDEV_NAME CIF_DRIVER_NAME "_scale_ch1" |
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| 647 | +#define CIF_SCALE_CH2_VDEV_NAME CIF_DRIVER_NAME "_scale_ch2" |
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| 648 | +#define CIF_SCALE_CH3_VDEV_NAME CIF_DRIVER_NAME "_scale_ch3" |
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| 649 | + |
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| 650 | +#define RKCIF_SCALE_ENUM_SIZE_MAX 3 |
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| 651 | +#define RKCIF_MAX_SDITF 4 |
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| 652 | + |
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| 653 | +enum scale_ch_sw { |
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| 654 | + SCALE_MIPI0_ID0, |
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| 655 | + SCALE_MIPI0_ID1, |
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| 656 | + SCALE_MIPI0_ID2, |
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| 657 | + SCALE_MIPI0_ID3, |
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| 658 | + SCALE_MIPI1_ID0, |
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| 659 | + SCALE_MIPI1_ID1, |
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| 660 | + SCALE_MIPI1_ID2, |
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| 661 | + SCALE_MIPI1_ID3, |
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| 662 | + SCALE_MIPI2_ID0, |
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| 663 | + SCALE_MIPI2_ID1, |
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| 664 | + SCALE_MIPI2_ID2, |
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| 665 | + SCALE_MIPI2_ID3, |
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| 666 | + SCALE_MIPI3_ID0, |
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| 667 | + SCALE_MIPI3_ID1, |
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| 668 | + SCALE_MIPI3_ID2, |
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| 669 | + SCALE_MIPI3_ID3, |
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| 670 | + SCALE_MIPI4_ID0, |
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| 671 | + SCALE_MIPI4_ID1, |
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| 672 | + SCALE_MIPI4_ID2, |
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| 673 | + SCALE_MIPI4_ID3, |
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| 674 | + SCALE_MIPI5_ID0, |
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| 675 | + SCALE_MIPI5_ID1, |
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| 676 | + SCALE_MIPI5_ID2, |
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| 677 | + SCALE_MIPI5_ID3, |
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| 678 | + SCALE_DVP, |
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| 679 | + SCALE_CH_MAX, |
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| 680 | +}; |
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| 681 | + |
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| 682 | +enum scale_mode { |
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| 683 | + SCALE_8TIMES, |
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| 684 | + SCALE_16TIMES, |
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| 685 | + SCALE_32TIMES, |
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| 686 | +}; |
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| 687 | + |
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| 688 | +struct rkcif_scale_ch_info { |
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| 689 | + u32 width; |
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| 690 | + u32 height; |
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| 691 | + u32 vir_width; |
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| 692 | +}; |
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| 693 | + |
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| 694 | +struct rkcif_scale_src_res { |
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| 695 | + u32 width; |
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| 696 | + u32 height; |
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| 697 | +}; |
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| 698 | + |
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| 699 | +/* |
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| 700 | + * struct rkcif_scale_vdev - CIF Capture device |
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| 701 | + * |
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| 702 | + * @irq_lock: buffer queue lock |
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| 703 | + * @stat: stats buffer list |
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| 704 | + * @readout_wq: workqueue for statistics information read |
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| 705 | + */ |
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| 706 | +struct rkcif_scale_vdev { |
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| 707 | + unsigned int ch:3; |
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| 708 | + struct rkcif_device *cifdev; |
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| 709 | + struct rkcif_vdev_node vnode; |
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| 710 | + struct rkcif_stream *stream; |
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| 711 | + struct list_head buf_head; |
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| 712 | + spinlock_t vbq_lock; /* vfd lock */ |
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| 713 | + wait_queue_head_t wq_stopped; |
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| 714 | + struct v4l2_pix_format_mplane pixm; |
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| 715 | + const struct cif_output_fmt *scale_out_fmt; |
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| 716 | + struct rkcif_scale_ch_info ch_info; |
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| 717 | + struct rkcif_scale_src_res src_res; |
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| 718 | + struct rkcif_buffer *curr_buf; |
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| 719 | + struct rkcif_buffer *next_buf; |
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| 720 | + struct bayer_blc blc; |
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| 721 | + enum rkcif_state state; |
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| 722 | + unsigned int ch_src; |
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| 723 | + unsigned int scale_mode; |
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| 724 | + int frame_phase; |
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| 725 | + unsigned int frame_idx; |
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| 726 | + bool stopping; |
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| 727 | +}; |
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| 728 | + |
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| 729 | +static inline |
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| 730 | +struct rkcif_scale_vdev *to_rkcif_scale_vdev(struct rkcif_vdev_node *vnode) |
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| 731 | +{ |
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| 732 | + return container_of(vnode, struct rkcif_scale_vdev, vnode); |
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| 733 | +} |
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| 734 | + |
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| 735 | +void rkcif_init_scale_vdev(struct rkcif_device *cif_dev, u32 ch); |
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| 736 | +int rkcif_register_scale_vdevs(struct rkcif_device *cif_dev, |
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| 737 | + int stream_num, |
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| 738 | + bool is_multi_input); |
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| 739 | +void rkcif_unregister_scale_vdevs(struct rkcif_device *cif_dev, |
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| 740 | + int stream_num); |
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| 741 | + |
---|
| 742 | +#define TOOLS_DRIVER_NAME "rkcif_tools" |
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| 743 | + |
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| 744 | +#define RKCIF_TOOLS_CH0 0 |
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| 745 | +#define RKCIF_TOOLS_CH1 1 |
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| 746 | +#define RKCIF_TOOLS_CH2 2 |
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| 747 | +#define RKCIF_MAX_TOOLS_CH 3 |
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| 748 | + |
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| 749 | +#define CIF_TOOLS_CH0_VDEV_NAME CIF_DRIVER_NAME "_tools_id0" |
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| 750 | +#define CIF_TOOLS_CH1_VDEV_NAME CIF_DRIVER_NAME "_tools_id1" |
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| 751 | +#define CIF_TOOLS_CH2_VDEV_NAME CIF_DRIVER_NAME "_tools_id2" |
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| 752 | + |
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| 753 | +/* |
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| 754 | + * struct rkcif_tools_vdev - CIF Capture device |
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| 755 | + * |
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| 756 | + * @irq_lock: buffer queue lock |
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| 757 | + * @stat: stats buffer list |
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| 758 | + * @readout_wq: workqueue for statistics information read |
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| 759 | + */ |
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| 760 | +struct rkcif_tools_vdev { |
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| 761 | + unsigned int ch:3; |
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| 762 | + struct rkcif_device *cifdev; |
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| 763 | + struct rkcif_vdev_node vnode; |
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| 764 | + struct rkcif_stream *stream; |
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| 765 | + struct list_head buf_head; |
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| 766 | + struct list_head buf_done_head; |
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| 767 | + struct list_head src_buf_head; |
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| 768 | + spinlock_t vbq_lock; /* vfd lock */ |
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| 769 | + wait_queue_head_t wq_stopped; |
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| 770 | + struct v4l2_pix_format_mplane pixm; |
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| 771 | + const struct cif_output_fmt *tools_out_fmt; |
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| 772 | + struct rkcif_buffer *curr_buf; |
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| 773 | + struct work_struct work; |
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| 774 | + enum rkcif_state state; |
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| 775 | + int frame_phase; |
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| 776 | + unsigned int frame_idx; |
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| 777 | + bool stopping; |
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| 778 | +}; |
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| 779 | + |
---|
| 780 | +static inline |
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| 781 | +struct rkcif_tools_vdev *to_rkcif_tools_vdev(struct rkcif_vdev_node *vnode) |
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| 782 | +{ |
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| 783 | + return container_of(vnode, struct rkcif_tools_vdev, vnode); |
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| 784 | +} |
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| 785 | + |
---|
| 786 | +void rkcif_init_tools_vdev(struct rkcif_device *cif_dev, u32 ch); |
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| 787 | +int rkcif_register_tools_vdevs(struct rkcif_device *cif_dev, |
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| 788 | + int stream_num, |
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| 789 | + bool is_multi_input); |
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| 790 | +void rkcif_unregister_tools_vdevs(struct rkcif_device *cif_dev, |
---|
| 791 | + int stream_num); |
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| 792 | + |
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| 793 | +enum rkcif_err_state { |
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| 794 | + RKCIF_ERR_ID0_NOT_BUF = 0x1, |
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| 795 | + RKCIF_ERR_ID1_NOT_BUF = 0x2, |
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| 796 | + RKCIF_ERR_ID2_NOT_BUF = 0x4, |
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| 797 | + RKCIF_ERR_ID3_NOT_BUF = 0x8, |
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| 798 | + RKCIF_ERR_ID0_TRIG_SIMULT = 0x10, |
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| 799 | + RKCIF_ERR_ID1_TRIG_SIMULT = 0x20, |
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| 800 | + RKCIF_ERR_ID2_TRIG_SIMULT = 0x40, |
---|
| 801 | + RKCIF_ERR_ID3_TRIG_SIMULT = 0x80, |
---|
| 802 | + RKCIF_ERR_SIZE = 0x100, |
---|
| 803 | + RKCIF_ERR_OVERFLOW = 0x200, |
---|
| 804 | + RKCIF_ERR_BANDWIDTH_LACK = 0x400, |
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| 805 | + RKCIF_ERR_BUS = 0X800, |
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| 806 | + RKCIF_ERR_ID0_MULTI_FS = 0x1000, |
---|
| 807 | + RKCIF_ERR_ID1_MULTI_FS = 0x2000, |
---|
| 808 | + RKCIF_ERR_ID2_MULTI_FS = 0x4000, |
---|
| 809 | + RKCIF_ERR_ID3_MULTI_FS = 0x8000, |
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| 810 | + RKCIF_ERR_PIXEL = 0x10000, |
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| 811 | + RKCIF_ERR_LINE = 0x20000, |
---|
| 812 | +}; |
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| 813 | + |
---|
| 814 | +struct rkcif_err_state_work { |
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| 815 | + struct work_struct work; |
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| 816 | + u64 last_timestamp; |
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| 817 | + u32 err_state; |
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| 818 | + u32 intstat; |
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| 819 | + u32 lastline; |
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| 820 | + u32 lastpixel; |
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| 821 | + u32 size_id0; |
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| 822 | + u32 size_id1; |
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| 823 | + u32 size_id2; |
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| 824 | + u32 size_id3; |
---|
| 825 | +}; |
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| 826 | + |
---|
| 827 | +enum rkcif_resume_user { |
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| 828 | + RKCIF_RESUME_CIF, |
---|
| 829 | + RKCIF_RESUME_ISP, |
---|
| 830 | +}; |
---|
| 831 | + |
---|
| 832 | +struct rkcif_sensor_work { |
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| 833 | + struct work_struct work; |
---|
| 834 | + int on; |
---|
| 835 | +}; |
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| 836 | + |
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476 | 837 | /* |
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477 | 838 | * struct rkcif_device - ISP platform device |
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478 | 839 | * @base_addr: base register address |
---|
.. | .. |
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492 | 853 | struct rkcif_sensor_info terminal_sensor; |
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493 | 854 | |
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494 | 855 | struct rkcif_stream stream[RKCIF_MULTI_STREAMS_NUM]; |
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| 856 | + struct rkcif_scale_vdev scale_vdev[RKCIF_MULTI_STREAMS_NUM]; |
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| 857 | + struct rkcif_tools_vdev tools_vdev[RKCIF_MAX_TOOLS_CH]; |
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495 | 858 | struct rkcif_pipeline pipe; |
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496 | 859 | |
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497 | 860 | struct csi_channel_info channels[RKCIF_MAX_CSI_CHANNEL]; |
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498 | 861 | int num_channels; |
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499 | 862 | int chip_id; |
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500 | 863 | atomic_t stream_cnt; |
---|
501 | | - atomic_t fh_cnt; |
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| 864 | + atomic_t power_cnt; |
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| 865 | + atomic_t streamoff_cnt; |
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502 | 866 | struct mutex stream_lock; /* lock between streams */ |
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| 867 | + struct mutex scale_lock; /* lock between scale dev */ |
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| 868 | + struct mutex tools_lock; /* lock between tools dev */ |
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503 | 869 | enum rkcif_workmode workmode; |
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504 | 870 | bool can_be_reset; |
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505 | | - struct rkcif_hdr hdr; |
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| 871 | + struct rkmodule_hdr_cfg hdr; |
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506 | 872 | struct rkcif_buffer *rdbk_buf[RDBK_MAX]; |
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| 873 | + struct rkcif_rx_buffer *rdbk_rx_buf[RDBK_MAX]; |
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507 | 874 | struct rkcif_luma_vdev luma_vdev; |
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508 | 875 | struct rkcif_lvds_subdev lvds_subdev; |
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509 | 876 | struct rkcif_dvp_sof_subdev dvp_sof_subdev; |
---|
.. | .. |
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511 | 878 | irqreturn_t (*isr_hdl)(int irq, struct rkcif_device *cif_dev); |
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512 | 879 | int inf_id; |
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513 | 880 | |
---|
514 | | - struct sditf_priv *sditf; |
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| 881 | + struct sditf_priv *sditf[RKCIF_MAX_SDITF]; |
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515 | 882 | struct proc_dir_entry *proc_dir; |
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516 | 883 | struct rkcif_irq_stats irq_stats; |
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517 | 884 | spinlock_t hdr_lock; /* lock for hdr buf sync */ |
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| 885 | + spinlock_t buffree_lock; |
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518 | 886 | struct rkcif_timer reset_watchdog_timer; |
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519 | | - struct notifier_block reset_notifier; /* reset for mipi csi crc err */ |
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520 | 887 | struct rkcif_work_struct reset_work; |
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| 888 | + int id_use_cnt; |
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| 889 | + unsigned int csi_host_idx; |
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| 890 | + unsigned int csi_host_idx_def; |
---|
521 | 891 | unsigned int dvp_sof_in_oneframe; |
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522 | 892 | unsigned int wait_line; |
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523 | 893 | unsigned int wait_line_bak; |
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524 | 894 | unsigned int wait_line_cache; |
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525 | | - struct rkcif_dummy_buffer dummy_buf; |
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| 895 | + struct completion cmpl_ntf; |
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| 896 | + struct csi2_dphy_hw *dphy_hw; |
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| 897 | + phys_addr_t resmem_pa; |
---|
| 898 | + dma_addr_t resmem_addr; |
---|
| 899 | + size_t resmem_size; |
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| 900 | + struct rk_tb_client tb_client; |
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526 | 901 | bool is_start_hdr; |
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527 | 902 | bool reset_work_cancel; |
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528 | 903 | bool iommu_en; |
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529 | 904 | bool is_use_dummybuf; |
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| 905 | + bool is_notifier_isp; |
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| 906 | + bool is_thunderboot; |
---|
| 907 | + bool is_rdbk_to_online; |
---|
| 908 | + bool is_support_tools; |
---|
| 909 | + bool is_rtt_suspend; |
---|
| 910 | + bool sensor_state_change; |
---|
| 911 | + bool is_toisp_reset; |
---|
| 912 | + int rdbk_debug; |
---|
| 913 | + struct rkcif_sync_cfg sync_cfg; |
---|
| 914 | + int sditf_cnt; |
---|
| 915 | + u32 early_line; |
---|
| 916 | + int isp_runtime_max; |
---|
| 917 | + int sensor_linetime; |
---|
| 918 | + u32 err_state; |
---|
| 919 | + struct rkcif_err_state_work err_state_work; |
---|
| 920 | + struct rkcif_sensor_work sensor_work; |
---|
| 921 | + int resume_mode; |
---|
| 922 | + u32 nr_buf_size; |
---|
| 923 | + u32 share_mem_size; |
---|
| 924 | + u32 thunderboot_sensor_num; |
---|
| 925 | + int sensor_state; |
---|
| 926 | + u32 intr_mask; |
---|
| 927 | + struct delayed_work work_deal_err; |
---|
530 | 928 | }; |
---|
531 | 929 | |
---|
532 | 930 | extern struct platform_driver rkcif_plat_drv; |
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| 931 | +void rkcif_set_fps(struct rkcif_stream *stream, struct rkcif_fps *fps); |
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| 932 | +int rkcif_do_start_stream(struct rkcif_stream *stream, |
---|
| 933 | + enum rkcif_stream_mode mode); |
---|
| 934 | +void rkcif_do_stop_stream(struct rkcif_stream *stream, |
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| 935 | + enum rkcif_stream_mode mode); |
---|
| 936 | +void rkcif_irq_handle_scale(struct rkcif_device *cif_dev, |
---|
| 937 | + unsigned int intstat_glb); |
---|
| 938 | +void rkcif_buf_queue(struct vb2_buffer *vb); |
---|
| 939 | + |
---|
| 940 | +void rkcif_vb_done_tasklet(struct rkcif_stream *stream, struct rkcif_buffer *buf); |
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| 941 | + |
---|
| 942 | +int rkcif_scale_start(struct rkcif_scale_vdev *scale_vdev); |
---|
| 943 | + |
---|
| 944 | +const struct |
---|
| 945 | +cif_input_fmt *rkcif_get_input_fmt(struct rkcif_device *dev, |
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| 946 | + struct v4l2_rect *rect, |
---|
| 947 | + u32 pad_id, struct csi_channel_info *csi_info); |
---|
533 | 948 | |
---|
534 | 949 | void rkcif_write_register(struct rkcif_device *dev, |
---|
535 | 950 | enum cif_reg_index index, u32 val); |
---|
.. | .. |
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552 | 967 | void rkcif_set_default_fmt(struct rkcif_device *cif_dev); |
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553 | 968 | void rkcif_irq_oneframe(struct rkcif_device *cif_dev); |
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554 | 969 | void rkcif_irq_pingpong(struct rkcif_device *cif_dev); |
---|
555 | | -void rkcif_soft_reset(struct rkcif_device *cif_dev, |
---|
556 | | - bool is_rst_iommu); |
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| 970 | +void rkcif_irq_pingpong_v1(struct rkcif_device *cif_dev); |
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| 971 | +unsigned int rkcif_irq_global(struct rkcif_device *cif_dev); |
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| 972 | +void rkcif_irq_handle_toisp(struct rkcif_device *cif_dev, unsigned int intstat_glb); |
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557 | 973 | int rkcif_register_lvds_subdev(struct rkcif_device *dev); |
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558 | 974 | void rkcif_unregister_lvds_subdev(struct rkcif_device *dev); |
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559 | 975 | int rkcif_register_dvp_sof_subdev(struct rkcif_device *dev); |
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560 | 976 | void rkcif_unregister_dvp_sof_subdev(struct rkcif_device *dev); |
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561 | 977 | void rkcif_irq_lite_lvds(struct rkcif_device *cif_dev); |
---|
562 | | -u32 rkcif_get_sof(struct rkcif_device *cif_dev); |
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563 | 978 | int rkcif_plat_init(struct rkcif_device *cif_dev, struct device_node *node, int inf_id); |
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564 | 979 | int rkcif_plat_uninit(struct rkcif_device *cif_dev); |
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565 | 980 | int rkcif_attach_hw(struct rkcif_device *cif_dev); |
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.. | .. |
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570 | 985 | enum rkcif_clk_edge edge); |
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571 | 986 | void rkcif_enable_dvp_clk_dual_edge(struct rkcif_device *dev, bool on); |
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572 | 987 | void rkcif_reset_work(struct work_struct *work); |
---|
573 | | -void rkcif_monitor_reset_event(struct rkcif_hw *hw); |
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| 988 | + |
---|
| 989 | +void rkcif_vb_done_oneframe(struct rkcif_stream *stream, |
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| 990 | + struct vb2_v4l2_buffer *vb_done); |
---|
| 991 | + |
---|
| 992 | +int rkcif_init_rx_buf(struct rkcif_stream *stream, int buf_num); |
---|
| 993 | +void rkcif_free_rx_buf(struct rkcif_stream *stream, int buf_num); |
---|
| 994 | + |
---|
| 995 | +int rkcif_set_fmt(struct rkcif_stream *stream, |
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| 996 | + struct v4l2_pix_format_mplane *pixm, |
---|
| 997 | + bool try); |
---|
| 998 | +void rkcif_enable_dma_capture(struct rkcif_stream *stream, bool is_only_enable); |
---|
| 999 | + |
---|
| 1000 | +void rkcif_do_soft_reset(struct rkcif_device *dev); |
---|
| 1001 | + |
---|
| 1002 | +u32 rkcif_mbus_pixelcode_to_v4l2(u32 pixelcode); |
---|
| 1003 | + |
---|
| 1004 | +void rkcif_config_dvp_pin(struct rkcif_device *dev, bool on); |
---|
| 1005 | + |
---|
| 1006 | +s32 rkcif_get_sensor_vblank_def(struct rkcif_device *dev); |
---|
| 1007 | +s32 rkcif_get_sensor_vblank(struct rkcif_device *dev); |
---|
| 1008 | +int rkcif_get_linetime(struct rkcif_stream *stream); |
---|
| 1009 | + |
---|
| 1010 | +void rkcif_assign_check_buffer_update_toisp(struct rkcif_stream *stream); |
---|
| 1011 | + |
---|
| 1012 | +struct rkcif_rx_buffer *to_cif_rx_buf(struct rkisp_rx_buf *dbufs); |
---|
| 1013 | + |
---|
| 1014 | +int rkcif_clr_unready_dev(void); |
---|
| 1015 | + |
---|
| 1016 | +const struct |
---|
| 1017 | +cif_output_fmt *rkcif_find_output_fmt(struct rkcif_stream *stream, u32 pixelfmt); |
---|
| 1018 | +/* Rockit */ |
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| 1019 | +int rkcif_rockit_buf_done(struct rkcif_stream *stream, struct rkcif_buffer *buf); |
---|
| 1020 | +void rkcif_rockit_dev_init(struct rkcif_device *dev); |
---|
| 1021 | +void rkcif_rockit_dev_deinit(void); |
---|
| 1022 | + |
---|
| 1023 | +void rkcif_err_print_work(struct work_struct *work); |
---|
| 1024 | +int rkcif_stream_suspend(struct rkcif_device *cif_dev, int mode); |
---|
| 1025 | +int rkcif_stream_resume(struct rkcif_device *cif_dev, int mode); |
---|
| 1026 | + |
---|
| 1027 | +static inline u64 rkcif_time_get_ns(struct rkcif_device *dev) |
---|
| 1028 | +{ |
---|
| 1029 | + if (dev->chip_id == CHIP_RV1106_CIF) |
---|
| 1030 | + return ktime_get_boottime_ns(); |
---|
| 1031 | + else |
---|
| 1032 | + return ktime_get_ns(); |
---|
| 1033 | +} |
---|
574 | 1034 | |
---|
575 | 1035 | #endif |
---|