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20 | 20 | #include <media/videobuf2-dma-contig.h> |
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21 | 21 | #include <media/v4l2-fwnode.h> |
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22 | 22 | #include <linux/iommu.h> |
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23 | | -#include <dt-bindings/soc/rockchip-system-status.h> |
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24 | 23 | #include <soc/rockchip/rockchip-system-status.h> |
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25 | 24 | #include <linux/io.h> |
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26 | 25 | #include <linux/mfd/syscon.h> |
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.. | .. |
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1134 | 1133 | cif_dev->reset_watchdog_timer.is_triggered = false; |
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1135 | 1134 | cif_dev->reset_watchdog_timer.is_running = false; |
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1136 | 1135 | cif_dev->err_state_work.last_timestamp = 0; |
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| 1136 | + cif_dev->is_toisp_reset = false; |
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1137 | 1137 | for (i = 0; i < cif_dev->num_channels; i++) |
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1138 | 1138 | cif_dev->reset_watchdog_timer.last_buf_wakeup_cnt[i] = 0; |
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1139 | 1139 | cif_dev->reset_watchdog_timer.run_cnt = 0; |
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.. | .. |
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1218 | 1218 | cif_dev->is_start_hdr = true; |
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1219 | 1219 | cif_dev->reset_watchdog_timer.is_triggered = false; |
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1220 | 1220 | cif_dev->reset_watchdog_timer.is_running = false; |
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| 1221 | + cif_dev->is_toisp_reset = false; |
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1221 | 1222 | for (i = 0; i < cif_dev->num_channels; i++) |
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1222 | 1223 | cif_dev->reset_watchdog_timer.last_buf_wakeup_cnt[i] = 0; |
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1223 | 1224 | cif_dev->reset_watchdog_timer.run_cnt = 0; |
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.. | .. |
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1908 | 1909 | INIT_WORK(&dev->reset_work.work, rkcif_reset_work); |
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1909 | 1910 | } |
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1910 | 1911 | |
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| 1912 | +void rkcif_set_sensor_stream(struct work_struct *work) |
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| 1913 | +{ |
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| 1914 | + struct rkcif_sensor_work *sensor_work = container_of(work, |
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| 1915 | + struct rkcif_sensor_work, |
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| 1916 | + work); |
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| 1917 | + struct rkcif_device *cif_dev = container_of(sensor_work, |
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| 1918 | + struct rkcif_device, |
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| 1919 | + sensor_work); |
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| 1920 | + |
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| 1921 | + v4l2_subdev_call(cif_dev->terminal_sensor.sd, |
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| 1922 | + core, ioctl, |
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| 1923 | + RKMODULE_SET_QUICK_STREAM, |
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| 1924 | + &sensor_work->on); |
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| 1925 | +} |
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| 1926 | + |
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| 1927 | +static void rkcif_deal_err_intr(struct work_struct *work) |
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| 1928 | +{ |
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| 1929 | + struct delayed_work *dwork = to_delayed_work(work); |
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| 1930 | + struct rkcif_device *cif_dev = container_of(dwork, |
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| 1931 | + struct rkcif_device, |
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| 1932 | + work_deal_err); |
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| 1933 | + |
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| 1934 | + cif_dev->intr_mask |= CSI_BANDWIDTH_LACK_V1; |
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| 1935 | + rkcif_write_register_or(cif_dev, CIF_REG_MIPI_LVDS_INTEN, CSI_BANDWIDTH_LACK_V1); |
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| 1936 | +} |
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| 1937 | + |
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1911 | 1938 | int rkcif_plat_init(struct rkcif_device *cif_dev, struct device_node *node, int inf_id) |
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1912 | 1939 | { |
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1913 | 1940 | struct device *dev = cif_dev->dev; |
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.. | .. |
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1927 | 1954 | atomic_set(&cif_dev->pipe.power_cnt, 0); |
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1928 | 1955 | atomic_set(&cif_dev->pipe.stream_cnt, 0); |
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1929 | 1956 | atomic_set(&cif_dev->power_cnt, 0); |
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| 1957 | + atomic_set(&cif_dev->streamoff_cnt, 0); |
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1930 | 1958 | cif_dev->is_start_hdr = false; |
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1931 | 1959 | cif_dev->pipe.open = rkcif_pipeline_open; |
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1932 | 1960 | cif_dev->pipe.close = rkcif_pipeline_close; |
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.. | .. |
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1940 | 1968 | cif_dev->early_line = 0; |
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1941 | 1969 | cif_dev->is_thunderboot = false; |
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1942 | 1970 | cif_dev->rdbk_debug = 0; |
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| 1971 | + |
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| 1972 | + cif_dev->resume_mode = 0; |
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1943 | 1973 | memset(&cif_dev->channels[0].capture_info, 0, sizeof(cif_dev->channels[0].capture_info)); |
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1944 | 1974 | if (cif_dev->chip_id == CHIP_RV1126_CIF_LITE) |
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1945 | 1975 | cif_dev->isr_hdl = rkcif_irq_lite_handler; |
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1946 | 1976 | |
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1947 | 1977 | INIT_WORK(&cif_dev->err_state_work.work, rkcif_err_print_work); |
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| 1978 | + INIT_WORK(&cif_dev->sensor_work.work, rkcif_set_sensor_stream); |
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| 1979 | + INIT_DELAYED_WORK(&cif_dev->work_deal_err, rkcif_deal_err_intr); |
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1948 | 1980 | |
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1949 | 1981 | if (cif_dev->chip_id < CHIP_RV1126_CIF) { |
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1950 | 1982 | if (cif_dev->inf_id == RKCIF_MIPI_LVDS) { |
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.. | .. |
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2118 | 2150 | struct resource r; |
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2119 | 2151 | int ret; |
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2120 | 2152 | |
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| 2153 | + cif_dev->is_thunderboot = false; |
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| 2154 | + cif_dev->is_rtt_suspend = false; |
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2121 | 2155 | /* Get reserved memory region from Device-tree */ |
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2122 | 2156 | np = of_parse_phandle(dev->of_node, "memory-region-thunderboot", 0); |
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2123 | 2157 | if (!np) { |
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.. | .. |
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2133 | 2167 | |
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2134 | 2168 | cif_dev->resmem_pa = r.start; |
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2135 | 2169 | cif_dev->resmem_size = resource_size(&r); |
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2136 | | - cif_dev->is_thunderboot = true; |
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| 2170 | + cif_dev->resmem_addr = dma_map_single(dev, phys_to_virt(r.start), |
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| 2171 | + sizeof(struct rkisp_thunderboot_resmem_head), |
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| 2172 | + DMA_BIDIRECTIONAL); |
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| 2173 | + |
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| 2174 | + if (device_property_read_bool(dev, "rtt-suspend")) |
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| 2175 | + cif_dev->is_rtt_suspend = true; |
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| 2176 | + if (IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP)) |
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| 2177 | + cif_dev->is_thunderboot = true; |
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2137 | 2178 | dev_info(dev, "Allocated reserved memory, paddr: 0x%x, size 0x%x\n", |
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2138 | 2179 | (u32)cif_dev->resmem_pa, |
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2139 | 2180 | (u32)cif_dev->resmem_size); |
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.. | .. |
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2211 | 2252 | return 0; |
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2212 | 2253 | } |
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2213 | 2254 | |
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| 2255 | +static int __maybe_unused rkcif_sleep_suspend(struct device *dev) |
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| 2256 | +{ |
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| 2257 | + struct rkcif_device *cif_dev = dev_get_drvdata(dev); |
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| 2258 | + |
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| 2259 | + rkcif_stream_suspend(cif_dev, RKCIF_RESUME_CIF); |
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| 2260 | + return 0; |
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| 2261 | +} |
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| 2262 | + |
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| 2263 | +static int __maybe_unused rkcif_sleep_resume(struct device *dev) |
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| 2264 | +{ |
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| 2265 | + struct rkcif_device *cif_dev = dev_get_drvdata(dev); |
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| 2266 | + |
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| 2267 | + rkcif_stream_resume(cif_dev, RKCIF_RESUME_CIF); |
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| 2268 | + return 0; |
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| 2269 | +} |
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| 2270 | + |
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2214 | 2271 | static int __maybe_unused rkcif_runtime_suspend(struct device *dev) |
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2215 | 2272 | { |
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2216 | 2273 | struct rkcif_device *cif_dev = dev_get_drvdata(dev); |
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.. | .. |
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2281 | 2338 | #endif |
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2282 | 2339 | |
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2283 | 2340 | static const struct dev_pm_ops rkcif_plat_pm_ops = { |
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2284 | | - SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, |
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2285 | | - pm_runtime_force_resume) |
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| 2341 | + SET_SYSTEM_SLEEP_PM_OPS(rkcif_sleep_suspend, rkcif_sleep_resume) |
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2286 | 2342 | SET_RUNTIME_PM_OPS(rkcif_runtime_suspend, rkcif_runtime_resume, NULL) |
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2287 | 2343 | }; |
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2288 | 2344 | |
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