.. | .. |
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18 | 18 | #include <media/videobuf2-dma-contig.h> |
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19 | 19 | #include <media/videobuf2-dma-sg.h> |
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20 | 20 | #include <soc/rockchip/rockchip-system-status.h> |
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21 | | -#include <dt-bindings/soc/rockchip-system-status.h> |
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22 | 21 | #include <soc/rockchip/rockchip_iommu.h> |
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| 22 | +#include <linux/rk-isp32-config.h> |
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23 | 23 | |
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24 | 24 | #include "dev.h" |
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25 | 25 | #include "mipi-csi2.h" |
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.. | .. |
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515 | 515 | .csi_fmt_val = CSI_WRDDR_TYPE_RGB888, |
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516 | 516 | .field = V4L2_FIELD_NONE, |
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517 | 517 | }, { |
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| 518 | + .mbus_code = MEDIA_BUS_FMT_GBR888_1X24, |
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| 519 | + .csi_fmt_val = CSI_WRDDR_TYPE_RGB888, |
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| 520 | + .field = V4L2_FIELD_NONE, |
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| 521 | + }, { |
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518 | 522 | .mbus_code = MEDIA_BUS_FMT_RGB565_1X16, |
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519 | 523 | .csi_fmt_val = CSI_WRDDR_TYPE_RGB565, |
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520 | 524 | .field = V4L2_FIELD_NONE, |
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.. | .. |
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611 | 615 | break; |
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612 | 616 | case MEDIA_BUS_FMT_RGB888_1X24: |
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613 | 617 | case MEDIA_BUS_FMT_BGR888_1X24: |
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| 618 | + case MEDIA_BUS_FMT_GBR888_1X24: |
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614 | 619 | if (output_fmt->fourcc == V4L2_PIX_FMT_RGB24 || |
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615 | 620 | output_fmt->fourcc == V4L2_PIX_FMT_BGR24) |
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616 | 621 | ret = 0; |
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.. | .. |
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671 | 676 | break; |
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672 | 677 | } |
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673 | 678 | if (ret) |
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674 | | - v4l2_err(&stream->cifdev->v4l2_dev, |
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| 679 | + v4l2_dbg(4, rkcif_debug, &stream->cifdev->v4l2_dev, |
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675 | 680 | "input mbus_code 0x%x, can't transform to %c%c%c%c\n", |
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676 | 681 | input_fmt->mbus_code, |
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677 | 682 | output_fmt->fourcc & 0xff, |
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.. | .. |
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801 | 806 | return 0x1e; |
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802 | 807 | case MEDIA_BUS_FMT_RGB888_1X24: |
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803 | 808 | case MEDIA_BUS_FMT_BGR888_1X24: |
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| 809 | + case MEDIA_BUS_FMT_GBR888_1X24: |
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804 | 810 | if (dsi_input) { |
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805 | 811 | if (cmd_mode_en) /* dsi command mode*/ |
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806 | 812 | return 0x39; |
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.. | .. |
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1608 | 1614 | return ret; |
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1609 | 1615 | } |
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1610 | 1616 | |
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1611 | | -static void rkcif_rx_buffer_free(struct rkcif_stream *stream) |
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| 1617 | +static struct v4l2_subdev *get_rkisp_sd(struct sditf_priv *priv) |
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1612 | 1618 | { |
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1613 | 1619 | struct media_pad *pad = NULL; |
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| 1620 | + |
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| 1621 | + if (priv && priv->pads[0].entity->num_links) { |
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| 1622 | + if (priv->is_combine_mode) |
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| 1623 | + pad = media_entity_remote_pad(&priv->pads[1]); |
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| 1624 | + else |
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| 1625 | + pad = media_entity_remote_pad(&priv->pads[0]); |
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| 1626 | + if (pad) |
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| 1627 | + return media_entity_to_v4l2_subdev(pad->entity); |
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| 1628 | + } |
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| 1629 | + return NULL; |
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| 1630 | +} |
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| 1631 | + |
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| 1632 | +static void rkcif_rx_buffer_free(struct rkcif_stream *stream) |
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| 1633 | +{ |
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1614 | 1634 | struct v4l2_subdev *sd; |
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1615 | 1635 | struct rkisp_rx_buf *dbufs; |
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1616 | 1636 | struct rkcif_device *dev = stream->cifdev; |
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1617 | 1637 | |
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1618 | | - if (dev->sditf[0] && dev->sditf[0]->sd.entity.num_links) { |
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1619 | | - if (dev->sditf[0]->is_combine_mode) |
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1620 | | - pad = media_entity_remote_pad(&dev->sditf[0]->pads[1]); |
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1621 | | - else |
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1622 | | - pad = media_entity_remote_pad(&dev->sditf[0]->pads[0]); |
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1623 | | - } else { |
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1624 | | - return; |
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1625 | | - } |
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1626 | | - |
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1627 | | - if (pad) |
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1628 | | - sd = media_entity_to_v4l2_subdev(pad->entity); |
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1629 | | - else |
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| 1638 | + sd = get_rkisp_sd(dev->sditf[0]); |
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| 1639 | + if (!sd) |
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1630 | 1640 | return; |
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1631 | 1641 | |
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1632 | 1642 | while (!list_empty(&stream->rx_buf_head_vicap)) { |
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.. | .. |
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1640 | 1650 | } |
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1641 | 1651 | } |
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1642 | 1652 | |
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1643 | | -static void rkcif_s_rx_buffer(struct rkcif_device *dev, struct rkisp_rx_buf *dbufs) |
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| 1653 | +static void rkcif_s_rx_buffer(struct rkcif_stream *stream, struct rkisp_rx_buf *dbufs) |
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1644 | 1654 | { |
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1645 | | - struct media_pad *pad = NULL; |
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| 1655 | + struct rkcif_device *dev = stream->cifdev; |
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1646 | 1656 | struct v4l2_subdev *sd; |
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1647 | 1657 | struct rkcif_rx_buffer *rx_buf = NULL; |
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1648 | 1658 | |
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1649 | | - if (dev->sditf[0]) { |
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1650 | | - if (dev->sditf[0]->is_combine_mode) |
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1651 | | - pad = media_entity_remote_pad(&dev->sditf[0]->pads[1]); |
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1652 | | - else |
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1653 | | - pad = media_entity_remote_pad(&dev->sditf[0]->pads[0]); |
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1654 | | - } else { |
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| 1659 | + sd = get_rkisp_sd(dev->sditf[0]); |
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| 1660 | + if (!sd) |
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1655 | 1661 | return; |
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1656 | | - } |
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1657 | | - if (pad) |
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1658 | | - sd = media_entity_to_v4l2_subdev(pad->entity); |
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1659 | | - else |
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1660 | | - return; |
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1661 | | - if (dev->rdbk_debug && |
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1662 | | - dbufs->sequence < 15) { |
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| 1662 | + if ((dev->rdbk_debug && |
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| 1663 | + dbufs->sequence < 15) || |
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| 1664 | + rkcif_debug == 3) { |
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1663 | 1665 | rx_buf = to_cif_rx_buf(dbufs); |
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1664 | 1666 | v4l2_info(&dev->v4l2_dev, |
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1665 | 1667 | "s_buf seq %d type %d, dma addr %x, %lld\n", |
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1666 | 1668 | dbufs->sequence, dbufs->type, (u32)rx_buf->dummy.dma_addr, |
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1667 | | - ktime_get_ns()); |
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| 1669 | + rkcif_time_get_ns(dev)); |
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1668 | 1670 | } |
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1669 | 1671 | v4l2_subdev_call(sd, video, s_rx_buffer, dbufs, NULL); |
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1670 | 1672 | } |
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.. | .. |
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1766 | 1768 | } |
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1767 | 1769 | dev->rdbk_rx_buf[RDBK_M]->dbufs.sequence = dev->rdbk_rx_buf[RDBK_L]->dbufs.sequence; |
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1768 | 1770 | dev->rdbk_rx_buf[RDBK_S]->dbufs.sequence = dev->rdbk_rx_buf[RDBK_L]->dbufs.sequence; |
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1769 | | - rkcif_s_rx_buffer(dev, &dev->rdbk_rx_buf[RDBK_L]->dbufs); |
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1770 | | - rkcif_s_rx_buffer(dev, &dev->rdbk_rx_buf[RDBK_M]->dbufs); |
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1771 | | - rkcif_s_rx_buffer(dev, &dev->rdbk_rx_buf[RDBK_S]->dbufs); |
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| 1771 | + rkcif_s_rx_buffer(&dev->stream[RDBK_L], &dev->rdbk_rx_buf[RDBK_L]->dbufs); |
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| 1772 | + rkcif_s_rx_buffer(&dev->stream[RDBK_M], &dev->rdbk_rx_buf[RDBK_M]->dbufs); |
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| 1773 | + rkcif_s_rx_buffer(&dev->stream[RDBK_S], &dev->rdbk_rx_buf[RDBK_S]->dbufs); |
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1772 | 1774 | rkcif_rdbk_with_tools(&dev->stream[RDBK_L], dev->rdbk_rx_buf[RDBK_L]); |
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1773 | 1775 | rkcif_rdbk_with_tools(&dev->stream[RDBK_M], dev->rdbk_rx_buf[RDBK_M]); |
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1774 | 1776 | rkcif_rdbk_with_tools(&dev->stream[RDBK_S], dev->rdbk_rx_buf[RDBK_S]); |
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.. | .. |
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1811 | 1813 | } |
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1812 | 1814 | } |
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1813 | 1815 | dev->rdbk_rx_buf[RDBK_M]->dbufs.sequence = dev->rdbk_rx_buf[RDBK_L]->dbufs.sequence; |
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1814 | | - rkcif_s_rx_buffer(dev, &dev->rdbk_rx_buf[RDBK_L]->dbufs); |
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1815 | | - rkcif_s_rx_buffer(dev, &dev->rdbk_rx_buf[RDBK_M]->dbufs); |
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| 1816 | + rkcif_s_rx_buffer(&dev->stream[RDBK_L], &dev->rdbk_rx_buf[RDBK_L]->dbufs); |
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| 1817 | + rkcif_s_rx_buffer(&dev->stream[RDBK_M], &dev->rdbk_rx_buf[RDBK_M]->dbufs); |
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1816 | 1818 | rkcif_rdbk_with_tools(&dev->stream[RDBK_L], dev->rdbk_rx_buf[RDBK_L]); |
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1817 | 1819 | rkcif_rdbk_with_tools(&dev->stream[RDBK_M], dev->rdbk_rx_buf[RDBK_M]); |
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1818 | 1820 | atomic_dec(&dev->stream[RDBK_L].buf_cnt); |
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.. | .. |
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1907 | 1909 | } else { |
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1908 | 1910 | rkcif_write_register(dev, frm0_addr_y, buff_addr_y); |
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1909 | 1911 | } |
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| 1912 | + } else { |
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| 1913 | + if (stream->lack_buf_cnt < 2) |
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| 1914 | + stream->lack_buf_cnt++; |
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1910 | 1915 | } |
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1911 | 1916 | |
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1912 | 1917 | if (!stream->next_buf_toisp) { |
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.. | .. |
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1932 | 1937 | } else { |
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1933 | 1938 | rkcif_write_register(dev, frm1_addr_y, buff_addr_y); |
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1934 | 1939 | } |
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| 1940 | + } else { |
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| 1941 | + if (stream->lack_buf_cnt < 2) |
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| 1942 | + stream->lack_buf_cnt++; |
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1935 | 1943 | } |
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1936 | 1944 | |
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1937 | 1945 | spin_unlock_irqrestore(&stream->vbq_lock, flags); |
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1938 | 1946 | stream->buf_owner = RKCIF_DMAEN_BY_ISP; |
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| 1947 | +} |
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| 1948 | + |
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| 1949 | +static void rkcif_dphy_quick_stream(struct rkcif_device *dev, int on) |
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| 1950 | +{ |
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| 1951 | + struct rkcif_pipeline *p = NULL; |
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| 1952 | + int j = 0; |
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| 1953 | + |
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| 1954 | + if (dev->active_sensor->mbus.type == V4L2_MBUS_CSI2_DPHY || |
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| 1955 | + dev->active_sensor->mbus.type == V4L2_MBUS_CSI2_CPHY || |
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| 1956 | + dev->active_sensor->mbus.type == V4L2_MBUS_CCP2) { |
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| 1957 | + p = &dev->pipe; |
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| 1958 | + for (j = 0; j < p->num_subdevs; j++) { |
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| 1959 | + if (p->subdevs[j] != dev->terminal_sensor.sd && |
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| 1960 | + p->subdevs[j] != dev->active_sensor->sd) { |
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| 1961 | + v4l2_subdev_call(p->subdevs[j], core, ioctl, |
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| 1962 | + RKMODULE_SET_QUICK_STREAM, &on); |
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| 1963 | + break; |
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| 1964 | + } |
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| 1965 | + } |
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| 1966 | + } |
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1939 | 1967 | } |
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1940 | 1968 | |
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1941 | 1969 | static int rkcif_assign_new_buffer_update_toisp(struct rkcif_stream *stream, |
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.. | .. |
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1950 | 1978 | u32 frm_addr_y, buff_addr_y; |
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1951 | 1979 | unsigned long flags; |
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1952 | 1980 | |
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| 1981 | + |
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1953 | 1982 | if (mbus_cfg->type == V4L2_MBUS_CSI2_DPHY || |
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1954 | 1983 | mbus_cfg->type == V4L2_MBUS_CSI2_CPHY || |
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1955 | 1984 | mbus_cfg->type == V4L2_MBUS_CCP2) { |
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.. | .. |
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1961 | 1990 | get_dvp_reg_index_of_frm0_y_addr(channel_id) : |
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1962 | 1991 | get_dvp_reg_index_of_frm1_y_addr(channel_id); |
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1963 | 1992 | } |
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| 1993 | + |
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1964 | 1994 | spin_lock_irqsave(&stream->vbq_lock, flags); |
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| 1995 | + if (stream->cur_skip_frame) |
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| 1996 | + goto out_get_buf; |
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| 1997 | + memset(&stream->toisp_buf_state, 0, sizeof(stream->toisp_buf_state)); |
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1965 | 1998 | if (!list_empty(&stream->rx_buf_head)) { |
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| 1999 | + if (stream->curr_buf_toisp && stream->next_buf_toisp && |
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| 2000 | + stream->curr_buf_toisp != stream->next_buf_toisp) |
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| 2001 | + stream->toisp_buf_state.state = RKCIF_TOISP_BUF_ROTATE; |
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| 2002 | + else |
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| 2003 | + stream->toisp_buf_state.state = RKCIF_TOISP_BUF_LOSS; |
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1966 | 2004 | if (stream->frame_phase == CIF_CSI_FRAME0_READY) { |
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1967 | | - if (stream->curr_buf_toisp == stream->next_buf_toisp) |
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1968 | | - active_buf = NULL; |
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1969 | | - else |
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1970 | | - active_buf = stream->curr_buf_toisp; |
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| 2005 | + active_buf = stream->curr_buf_toisp; |
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1971 | 2006 | |
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1972 | 2007 | buffer = list_first_entry(&stream->rx_buf_head, |
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1973 | 2008 | struct rkcif_rx_buffer, list); |
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.. | .. |
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1982 | 2017 | active_buf->dbufs.is_first = true; |
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1983 | 2018 | active_buf->dbufs.sequence = stream->frame_idx - 1; |
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1984 | 2019 | active_buf->dbufs.timestamp = stream->readout.fs_timestamp; |
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1985 | | - active_buf->fe_timestamp = ktime_get_ns(); |
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| 2020 | + active_buf->fe_timestamp = rkcif_time_get_ns(dev); |
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1986 | 2021 | stream->last_frame_idx = stream->frame_idx; |
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1987 | 2022 | if (dev->hdr.hdr_mode == NO_HDR) { |
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1988 | | - rkcif_s_rx_buffer(dev, &active_buf->dbufs); |
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| 2023 | + rkcif_s_rx_buffer(stream, &active_buf->dbufs); |
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1989 | 2024 | if (dev->is_support_tools && stream->tools_vdev) |
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1990 | 2025 | rkcif_rdbk_with_tools(stream, active_buf); |
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1991 | 2026 | atomic_dec(&stream->buf_cnt); |
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.. | .. |
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1993 | 2028 | rkcif_rdbk_frame_end_toisp(stream, active_buf); |
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1994 | 2029 | } |
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1995 | 2030 | } else { |
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1996 | | - rkcif_s_rx_buffer(dev, &active_buf->dbufs); |
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| 2031 | + if (active_buf) |
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| 2032 | + rkcif_s_rx_buffer(stream, &active_buf->dbufs); |
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1997 | 2033 | if (dev->is_support_tools && stream->tools_vdev) |
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1998 | 2034 | rkcif_rdbk_with_tools(stream, active_buf); |
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1999 | 2035 | } |
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2000 | 2036 | } else if (stream->frame_phase == CIF_CSI_FRAME1_READY) { |
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2001 | | - if (stream->curr_buf_toisp == stream->next_buf_toisp) |
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2002 | | - active_buf = NULL; |
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2003 | | - else |
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2004 | | - active_buf = stream->next_buf_toisp; |
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| 2037 | + active_buf = stream->next_buf_toisp; |
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2005 | 2038 | buffer = list_first_entry(&stream->rx_buf_head, |
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2006 | 2039 | struct rkcif_rx_buffer, list); |
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2007 | 2040 | if (buffer) { |
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.. | .. |
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2015 | 2048 | active_buf->dbufs.is_first = true; |
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2016 | 2049 | active_buf->dbufs.sequence = stream->frame_idx - 1; |
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2017 | 2050 | active_buf->dbufs.timestamp = stream->readout.fs_timestamp; |
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2018 | | - active_buf->fe_timestamp = ktime_get_ns(); |
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| 2051 | + active_buf->fe_timestamp = rkcif_time_get_ns(dev); |
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2019 | 2052 | stream->last_frame_idx = stream->frame_idx; |
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2020 | 2053 | if (dev->hdr.hdr_mode == NO_HDR) { |
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2021 | | - rkcif_s_rx_buffer(dev, &active_buf->dbufs); |
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| 2054 | + rkcif_s_rx_buffer(stream, &active_buf->dbufs); |
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2022 | 2055 | if (dev->is_support_tools && stream->tools_vdev) |
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2023 | 2056 | rkcif_rdbk_with_tools(stream, active_buf); |
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2024 | 2057 | atomic_dec(&stream->buf_cnt); |
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.. | .. |
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2026 | 2059 | rkcif_rdbk_frame_end_toisp(stream, active_buf); |
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2027 | 2060 | } |
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2028 | 2061 | } else { |
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2029 | | - rkcif_s_rx_buffer(dev, &active_buf->dbufs); |
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| 2062 | + if (active_buf) |
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| 2063 | + rkcif_s_rx_buffer(stream, &active_buf->dbufs); |
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2030 | 2064 | if (dev->is_support_tools && stream->tools_vdev) |
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2031 | 2065 | rkcif_rdbk_with_tools(stream, active_buf); |
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2032 | 2066 | } |
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.. | .. |
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2041 | 2075 | if (dev->hw_dev->dummy_buf.vaddr) { |
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2042 | 2076 | if (stream->frame_phase == CIF_CSI_FRAME0_READY) { |
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2043 | 2077 | active_buf = stream->curr_buf_toisp; |
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2044 | | - stream->curr_buf_toisp = NULL; |
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2045 | 2078 | } else { |
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2046 | 2079 | active_buf = stream->next_buf_toisp; |
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2047 | | - stream->next_buf_toisp = NULL; |
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2048 | 2080 | } |
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2049 | 2081 | } else if (stream->curr_buf_toisp && stream->next_buf_toisp && |
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2050 | 2082 | stream->curr_buf_toisp != stream->next_buf_toisp) { |
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.. | .. |
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2057 | 2089 | stream->next_buf_toisp = stream->curr_buf_toisp; |
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2058 | 2090 | buffer = stream->curr_buf_toisp; |
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2059 | 2091 | } |
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| 2092 | + stream->toisp_buf_state.state = RKCIF_TOISP_BUF_THESAME; |
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2060 | 2093 | if (stream->cifdev->rdbk_debug) |
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2061 | 2094 | v4l2_info(&stream->cifdev->v4l2_dev, |
---|
2062 | 2095 | "stream[%d] hold buf %x\n", |
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2063 | 2096 | stream->id, |
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2064 | 2097 | (u32)stream->next_buf_toisp->dummy.dma_addr); |
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| 2098 | + } else { |
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| 2099 | + stream->toisp_buf_state.state = RKCIF_TOISP_BUF_LOSS; |
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| 2100 | + if (stream->is_single_cap) { |
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| 2101 | + active_buf = stream->curr_buf_toisp; |
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| 2102 | + stream->curr_buf_toisp = NULL; |
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| 2103 | + stream->next_buf_toisp = NULL; |
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| 2104 | + } |
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2065 | 2105 | } |
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| 2106 | + |
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2066 | 2107 | if (active_buf) { |
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2067 | 2108 | if (stream->frame_idx == 1) |
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2068 | 2109 | active_buf->dbufs.is_first = true; |
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2069 | 2110 | active_buf->dbufs.sequence = stream->frame_idx - 1; |
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2070 | 2111 | active_buf->dbufs.timestamp = stream->readout.fs_timestamp; |
---|
2071 | | - active_buf->fe_timestamp = ktime_get_ns(); |
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| 2112 | + active_buf->fe_timestamp = rkcif_time_get_ns(dev); |
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2072 | 2113 | stream->last_frame_idx = stream->frame_idx; |
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2073 | 2114 | if (dev->hdr.hdr_mode == NO_HDR) { |
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2074 | | - rkcif_s_rx_buffer(dev, &active_buf->dbufs); |
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2075 | | - if (dev->is_support_tools && stream->tools_vdev) |
---|
2076 | | - rkcif_rdbk_with_tools(stream, active_buf); |
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| 2115 | + rkcif_s_rx_buffer(stream, &active_buf->dbufs); |
---|
2077 | 2116 | atomic_dec(&stream->buf_cnt); |
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2078 | 2117 | } else { |
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2079 | 2118 | rkcif_rdbk_frame_end_toisp(stream, active_buf); |
---|
.. | .. |
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2085 | 2124 | stream->id, |
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2086 | 2125 | stream->frame_idx - 1); |
---|
2087 | 2126 | } |
---|
2088 | | - if (dev->is_support_tools && stream->tools_vdev && stream->curr_buf_toisp) |
---|
2089 | | - rkcif_rdbk_with_tools(stream, stream->curr_buf_toisp); |
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| 2127 | + if (dev->is_support_tools && stream->tools_vdev && active_buf) |
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| 2128 | + rkcif_rdbk_with_tools(stream, active_buf); |
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2090 | 2129 | } |
---|
2091 | | - |
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2092 | 2130 | out_get_buf: |
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2093 | 2131 | stream->frame_phase_cache = stream->frame_phase; |
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2094 | 2132 | if (buffer) { |
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.. | .. |
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2145 | 2183 | u64 cur_time = 0; |
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2146 | 2184 | int frame_phase = 0; |
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2147 | 2185 | int frame_phase_next = 0; |
---|
2148 | | - bool is_early_update = false; |
---|
2149 | 2186 | |
---|
2150 | | - if (stream->curr_buf_toisp != stream->next_buf_toisp) { |
---|
| 2187 | + if (stream->toisp_buf_state.state == RKCIF_TOISP_BUF_ROTATE || |
---|
| 2188 | + (stream->toisp_buf_state.state == RKCIF_TOISP_BUF_THESAME && |
---|
| 2189 | + stream->toisp_buf_state.check_cnt >= 1) || |
---|
| 2190 | + (stream->toisp_buf_state.state == RKCIF_TOISP_BUF_LOSS && |
---|
| 2191 | + stream->toisp_buf_state.check_cnt >= 2)) { |
---|
2151 | 2192 | if (dev->rdbk_debug > 2 && |
---|
2152 | 2193 | stream->frame_idx < 15) |
---|
2153 | 2194 | v4l2_info(&dev->v4l2_dev, |
---|
.. | .. |
---|
2161 | 2202 | dev->sensor_linetime = rkcif_get_linetime(stream); |
---|
2162 | 2203 | vblank = rkcif_get_sensor_vblank(dev); |
---|
2163 | 2204 | vblank_ns = vblank * dev->sensor_linetime; |
---|
2164 | | - cur_time = ktime_get_ns(); |
---|
| 2205 | + cur_time = rkcif_time_get_ns(dev); |
---|
2165 | 2206 | |
---|
2166 | | - if (dev->chip_id > CHIP_RK3568_CIF && |
---|
2167 | | - dev->hdr.hdr_mode == NO_HDR && |
---|
2168 | | - cur_time - stream->readout.fe_timestamp < (vblank_ns - 500000) && |
---|
2169 | | - stream->lack_buf_cnt == 2 && |
---|
2170 | | - stream->frame_idx > stream->last_frame_idx) { |
---|
2171 | | - is_early_update = true; |
---|
2172 | | - frame_phase = stream->frame_phase & CIF_CSI_FRAME0_READY ? |
---|
2173 | | - CIF_CSI_FRAME1_READY : CIF_CSI_FRAME0_READY; |
---|
2174 | | - frame_phase_next = stream->frame_phase & CIF_CSI_FRAME0_READY ? |
---|
2175 | | - CIF_CSI_FRAME0_READY : CIF_CSI_FRAME1_READY; |
---|
2176 | | - } else { |
---|
| 2207 | + if (stream->toisp_buf_state.state == RKCIF_TOISP_BUF_THESAME) { |
---|
2177 | 2208 | frame_phase = stream->frame_phase; |
---|
| 2209 | + } else { |
---|
| 2210 | + if (stream->toisp_buf_state.state == RKCIF_TOISP_BUF_LOSS && |
---|
| 2211 | + stream->toisp_buf_state.check_cnt == 0 && |
---|
| 2212 | + cur_time - stream->readout.fe_timestamp < (vblank_ns - 500000)) { |
---|
| 2213 | + stream->toisp_buf_state.is_early_update = true; |
---|
| 2214 | + frame_phase = stream->frame_phase & CIF_CSI_FRAME0_READY ? |
---|
| 2215 | + CIF_CSI_FRAME1_READY : CIF_CSI_FRAME0_READY; |
---|
| 2216 | + frame_phase_next = stream->frame_phase & CIF_CSI_FRAME0_READY ? |
---|
| 2217 | + CIF_CSI_FRAME0_READY : CIF_CSI_FRAME1_READY; |
---|
| 2218 | + } else { |
---|
| 2219 | + if (stream->toisp_buf_state.check_cnt == 1 && |
---|
| 2220 | + (!stream->toisp_buf_state.is_early_update)) |
---|
| 2221 | + return; |
---|
| 2222 | + frame_phase = stream->frame_phase; |
---|
| 2223 | + stream->toisp_buf_state.is_early_update = false; |
---|
| 2224 | + } |
---|
2178 | 2225 | } |
---|
2179 | 2226 | if (dev->rdbk_debug > 2 && |
---|
2180 | 2227 | stream->frame_idx < 15) |
---|
.. | .. |
---|
2247 | 2294 | if (stream->lack_buf_cnt) |
---|
2248 | 2295 | stream->lack_buf_cnt--; |
---|
2249 | 2296 | } |
---|
2250 | | - if (is_early_update) { |
---|
| 2297 | + if (stream->toisp_buf_state.is_early_update) { |
---|
2251 | 2298 | if (dev->rdbk_debug > 1 && |
---|
2252 | 2299 | stream->frame_idx < 15) |
---|
2253 | 2300 | v4l2_info(&dev->v4l2_dev, |
---|
.. | .. |
---|
2263 | 2310 | active_buf->dbufs.sequence = stream->frame_idx - 1; |
---|
2264 | 2311 | active_buf->dbufs.timestamp = stream->readout.fs_timestamp; |
---|
2265 | 2312 | stream->last_frame_idx = stream->frame_idx; |
---|
2266 | | - rkcif_s_rx_buffer(dev, &active_buf->dbufs); |
---|
| 2313 | + rkcif_s_rx_buffer(stream, &active_buf->dbufs); |
---|
2267 | 2314 | } |
---|
2268 | 2315 | if (dev->hw_dev->dummy_buf.vaddr) |
---|
2269 | 2316 | return; |
---|
.. | .. |
---|
2290 | 2337 | rkcif_write_register(dev, frm_addr_y, buff_addr_y); |
---|
2291 | 2338 | } |
---|
2292 | 2339 | } |
---|
| 2340 | + stream->toisp_buf_state.check_cnt++; |
---|
2293 | 2341 | } |
---|
2294 | 2342 | |
---|
2295 | 2343 | static void rkcif_assign_new_buffer_init(struct rkcif_stream *stream, |
---|
.. | .. |
---|
2304 | 2352 | struct rkcif_dummy_buffer *dummy_buf = &dev->hw_dev->dummy_buf; |
---|
2305 | 2353 | struct csi_channel_info *channel = &dev->channels[channel_id]; |
---|
2306 | 2354 | |
---|
| 2355 | + stream->lack_buf_cnt = 0; |
---|
2307 | 2356 | if (mbus_cfg->type == V4L2_MBUS_CSI2_DPHY || |
---|
2308 | 2357 | mbus_cfg->type == V4L2_MBUS_CSI2_CPHY || |
---|
2309 | 2358 | mbus_cfg->type == V4L2_MBUS_CCP2) { |
---|
.. | .. |
---|
2398 | 2447 | v4l2_dbg(4, rkcif_debug, &dev->v4l2_dev, "%s %d, stream[%d] buf idx %d\n", |
---|
2399 | 2448 | __func__, __LINE__, stream->id, stream->next_buf->vb.vb2_buf.index); |
---|
2400 | 2449 | list_del(&stream->next_buf->queue); |
---|
| 2450 | + } else if (stream->curr_buf) { |
---|
| 2451 | + stream->next_buf = stream->curr_buf; |
---|
2401 | 2452 | } |
---|
2402 | 2453 | } |
---|
2403 | 2454 | |
---|
.. | .. |
---|
2504 | 2555 | get_dvp_reg_index_of_frm1_uv_addr(channel_id); |
---|
2505 | 2556 | } |
---|
2506 | 2557 | |
---|
2507 | | - if (stream->to_stop_dma) { |
---|
2508 | | - if (stream->dma_en & RKCIF_DMAEN_BY_ISP) { |
---|
2509 | | - v4l2_dbg(3, rkcif_debug, &dev->v4l2_dev, "%s %d\n", __func__, __LINE__); |
---|
2510 | | - goto stop_dma; |
---|
2511 | | - } else { |
---|
2512 | | - if (stream->frame_phase == CIF_CSI_FRAME0_READY) |
---|
2513 | | - stream->curr_buf = NULL; |
---|
2514 | | - else |
---|
2515 | | - stream->next_buf = NULL; |
---|
2516 | | - v4l2_dbg(3, rkcif_debug, &dev->v4l2_dev, "%s %d\n", __func__, __LINE__); |
---|
2517 | | - return -EINVAL; |
---|
2518 | | - } |
---|
| 2558 | + if (stream->to_stop_dma && (stream->dma_en & RKCIF_DMAEN_BY_ISP)) { |
---|
| 2559 | + v4l2_dbg(3, rkcif_debug, &dev->v4l2_dev, "%s %d\n", __func__, __LINE__); |
---|
| 2560 | + goto stop_dma; |
---|
2519 | 2561 | } |
---|
2520 | 2562 | |
---|
2521 | 2563 | spin_lock_irqsave(&stream->vbq_lock, flags); |
---|
.. | .. |
---|
2561 | 2603 | } |
---|
2562 | 2604 | } |
---|
2563 | 2605 | } |
---|
2564 | | - } else if (!(stream->dma_en & RKCIF_DMAEN_BY_ISP)) { |
---|
| 2606 | + } else { |
---|
2565 | 2607 | buffer = NULL; |
---|
2566 | | - if (dummy_buf->vaddr) { |
---|
| 2608 | + if (!(stream->cur_stream_mode & RKCIF_STREAM_MODE_TOISP) && dummy_buf->vaddr) { |
---|
2567 | 2609 | if (stream->frame_phase == CIF_CSI_FRAME0_READY) { |
---|
2568 | 2610 | stream->curr_buf = NULL; |
---|
2569 | 2611 | } else if (stream->frame_phase == CIF_CSI_FRAME1_READY) { |
---|
.. | .. |
---|
2574 | 2616 | stream->next_buf = NULL; |
---|
2575 | 2617 | } |
---|
2576 | 2618 | } |
---|
2577 | | - } else if (stream->curr_buf && stream->next_buf && |
---|
2578 | | - stream->curr_buf != stream->next_buf) { |
---|
2579 | | - if (stream->frame_phase == CIF_CSI_FRAME0_READY) { |
---|
| 2619 | + } else if (stream->curr_buf != stream->next_buf) { |
---|
| 2620 | + if (stream->frame_phase == CIF_CSI_FRAME0_READY && stream->next_buf) { |
---|
2580 | 2621 | stream->curr_buf = stream->next_buf; |
---|
2581 | 2622 | buffer = stream->next_buf; |
---|
2582 | | - } else if (stream->frame_phase == CIF_CSI_FRAME1_READY) { |
---|
| 2623 | + } else if (stream->frame_phase == CIF_CSI_FRAME1_READY && stream->curr_buf) { |
---|
2583 | 2624 | stream->next_buf = stream->curr_buf; |
---|
2584 | 2625 | buffer = stream->curr_buf; |
---|
2585 | 2626 | } |
---|
.. | .. |
---|
2644 | 2685 | } |
---|
2645 | 2686 | } |
---|
2646 | 2687 | if (dbufs) |
---|
2647 | | - rkcif_s_rx_buffer(dev, dbufs); |
---|
2648 | | - } |
---|
2649 | | - } else { |
---|
2650 | | - if (stream->dma_en & RKCIF_DMAEN_BY_ISP) { |
---|
2651 | | - buff_addr_y = stream->curr_buf_toisp->dummy.dma_addr; |
---|
2652 | | - if (channel->capture_info.mode == RKMODULE_MULTI_DEV_COMBINE_ONE) |
---|
2653 | | - rkcif_write_buff_addr_multi_dev_combine(stream, |
---|
2654 | | - frm_addr_y, 0, |
---|
2655 | | - buff_addr_y, 0, false); |
---|
2656 | | - else |
---|
2657 | | - rkcif_write_register(dev, frm_addr_y, buff_addr_y); |
---|
2658 | | - if (stream->frame_phase == CIF_CSI_FRAME0_READY && |
---|
2659 | | - stream->next_buf) |
---|
2660 | | - dbuf = stream->next_buf->dbuf; |
---|
2661 | | - else if (stream->frame_phase == CIF_CSI_FRAME1_READY && |
---|
2662 | | - stream->curr_buf) |
---|
2663 | | - dbuf = stream->curr_buf->dbuf; |
---|
2664 | | - |
---|
2665 | | - if (dbuf) { |
---|
2666 | | - list_for_each_entry(dbufs, &stream->rx_buf_head_vicap, list) |
---|
2667 | | - if (dbufs->dbuf == dbuf) |
---|
2668 | | - break; |
---|
2669 | | - } else { |
---|
2670 | | - dbufs = &stream->curr_buf_toisp->dbufs; |
---|
2671 | | - } |
---|
2672 | | - rkcif_s_rx_buffer(dev, dbufs); |
---|
2673 | | - if (stream->curr_buf && stream->frame_phase == CIF_CSI_FRAME0_READY) { |
---|
2674 | | - stream->curr_buf = NULL; |
---|
2675 | | - if (stream->buf_replace_cnt) |
---|
2676 | | - stream->buf_replace_cnt--; |
---|
2677 | | - } else if (stream->next_buf && stream->frame_phase == CIF_CSI_FRAME1_READY) { |
---|
2678 | | - stream->next_buf = NULL; |
---|
2679 | | - if (stream->buf_replace_cnt) |
---|
2680 | | - stream->buf_replace_cnt--; |
---|
2681 | | - } |
---|
2682 | | - } else if (dummy_buf->vaddr) { |
---|
2683 | | - |
---|
2684 | | - if (channel->capture_info.mode == RKMODULE_MULTI_DEV_COMBINE_ONE) { |
---|
2685 | | - buff_addr_y = dummy_buf->dma_addr; |
---|
2686 | | - buff_addr_cbcr = dummy_buf->dma_addr; |
---|
2687 | | - rkcif_write_buff_addr_multi_dev_combine(stream, |
---|
2688 | | - frm_addr_y, |
---|
2689 | | - frm_addr_uv, |
---|
2690 | | - buff_addr_y, |
---|
2691 | | - buff_addr_cbcr, |
---|
2692 | | - true); |
---|
2693 | | - } else { |
---|
2694 | | - rkcif_write_register(dev, frm_addr_y, dummy_buf->dma_addr); |
---|
2695 | | - if (stream->cif_fmt_out->fmt_type != CIF_FMT_TYPE_RAW) |
---|
2696 | | - rkcif_write_register(dev, frm_addr_uv, dummy_buf->dma_addr); |
---|
2697 | | - } |
---|
2698 | | - dev->err_state |= (RKCIF_ERR_ID0_NOT_BUF << stream->id); |
---|
2699 | | - dev->irq_stats.not_active_buf_cnt[stream->id]++; |
---|
2700 | | - |
---|
2701 | | - } else { |
---|
2702 | | - ret = -EINVAL; |
---|
2703 | | - stream->curr_buf = NULL; |
---|
2704 | | - stream->next_buf = NULL; |
---|
2705 | | - dev->err_state |= (RKCIF_ERR_ID0_NOT_BUF << stream->id); |
---|
2706 | | - dev->irq_stats.not_active_buf_cnt[stream->id]++; |
---|
| 2688 | + rkcif_s_rx_buffer(stream, dbufs); |
---|
2707 | 2689 | } |
---|
2708 | 2690 | } |
---|
2709 | 2691 | spin_unlock_irqrestore(&stream->vbq_lock, flags); |
---|
.. | .. |
---|
2733 | 2715 | dbufs = &stream->curr_buf_toisp->dbufs; |
---|
2734 | 2716 | } |
---|
2735 | 2717 | if (dbufs) |
---|
2736 | | - rkcif_s_rx_buffer(dev, dbufs); |
---|
| 2718 | + rkcif_s_rx_buffer(stream, dbufs); |
---|
2737 | 2719 | |
---|
2738 | 2720 | if (stream->frame_phase == CIF_CSI_FRAME0_READY && |
---|
2739 | 2721 | stream->curr_buf) { |
---|
.. | .. |
---|
2898 | 2880 | int frame_phase = 0; |
---|
2899 | 2881 | |
---|
2900 | 2882 | spin_lock_irqsave(&stream->vbq_lock, flags); |
---|
| 2883 | + memset(&stream->toisp_buf_state, 0, sizeof(stream->toisp_buf_state)); |
---|
2901 | 2884 | if (!list_empty(&stream->rx_buf_head)) { |
---|
| 2885 | + if (stream->curr_buf_toisp && stream->next_buf_toisp && |
---|
| 2886 | + stream->curr_buf_toisp != stream->next_buf_toisp) |
---|
| 2887 | + stream->toisp_buf_state.state = RKCIF_TOISP_BUF_ROTATE; |
---|
| 2888 | + else |
---|
| 2889 | + stream->toisp_buf_state.state = RKCIF_TOISP_BUF_LOSS; |
---|
2902 | 2890 | if (stream->line_int_cnt % 2) { |
---|
2903 | 2891 | buffer = list_first_entry(&stream->rx_buf_head, |
---|
2904 | 2892 | struct rkcif_rx_buffer, list); |
---|
.. | .. |
---|
2934 | 2922 | "stream[%d] hold buf %x\n", |
---|
2935 | 2923 | stream->id, |
---|
2936 | 2924 | (u32)stream->next_buf_toisp->dummy.dma_addr); |
---|
| 2925 | + stream->toisp_buf_state.state = RKCIF_TOISP_BUF_THESAME; |
---|
2937 | 2926 | } else { |
---|
2938 | 2927 | ret = -EINVAL; |
---|
| 2928 | + stream->toisp_buf_state.state = RKCIF_TOISP_BUF_LOSS; |
---|
2939 | 2929 | } |
---|
2940 | 2930 | } |
---|
2941 | 2931 | if (buffer) { |
---|
.. | .. |
---|
3647 | 3637 | val &= ~CSI_HIGH_ALIGN; |
---|
3648 | 3638 | rkcif_write_register(dev, get_reg_index_of_id_ctrl0(channel->id), val); |
---|
3649 | 3639 | |
---|
| 3640 | + dev->intr_mask = rkcif_read_register(dev, CIF_REG_MIPI_LVDS_INTEN); |
---|
3650 | 3641 | return 0; |
---|
3651 | 3642 | } |
---|
3652 | 3643 | |
---|
.. | .. |
---|
4035 | 4026 | RKCIF_YUV_ADDR_STATE_INIT, |
---|
4036 | 4027 | channel->id); |
---|
4037 | 4028 | } |
---|
| 4029 | + dev->intr_mask = rkcif_read_register(dev, CIF_REG_MIPI_LVDS_INTEN); |
---|
4038 | 4030 | return 0; |
---|
4039 | 4031 | } |
---|
4040 | 4032 | |
---|
.. | .. |
---|
4557 | 4549 | list_add_tail(&dbufs->list, &stream->rx_buf_head_vicap); |
---|
4558 | 4550 | } |
---|
4559 | 4551 | if (stream->cifdev->workmode == RKCIF_WORKMODE_PINGPONG && |
---|
4560 | | - stream->lack_buf_cnt) |
---|
| 4552 | + stream->lack_buf_cnt && |
---|
| 4553 | + stream->cur_stream_mode & RKCIF_STREAM_MODE_CAPTURE) |
---|
4561 | 4554 | rkcif_check_buffer_update_pingpong(stream, stream->id); |
---|
4562 | 4555 | v4l2_dbg(3, rkcif_debug, &stream->cifdev->v4l2_dev, |
---|
4563 | 4556 | "stream[%d] buf queue, index: %d, dma_addr 0x%x\n", |
---|
.. | .. |
---|
4570 | 4563 | struct rkcif_rx_buffer *buf; |
---|
4571 | 4564 | struct rkcif_device *dev = stream->cifdev; |
---|
4572 | 4565 | struct sditf_priv *priv = dev->sditf[0]; |
---|
| 4566 | + struct v4l2_subdev *sd; |
---|
4573 | 4567 | int i = 0; |
---|
4574 | 4568 | unsigned long flags; |
---|
| 4569 | + phys_addr_t resmem_free_start; |
---|
| 4570 | + phys_addr_t resmem_free_end; |
---|
| 4571 | + u32 share_head_size = 0; |
---|
4575 | 4572 | |
---|
4576 | 4573 | if (!priv) |
---|
4577 | 4574 | return; |
---|
| 4575 | + |
---|
| 4576 | + sd = get_rkisp_sd(dev->sditf[0]); |
---|
| 4577 | + if (!sd) |
---|
| 4578 | + return; |
---|
| 4579 | + |
---|
| 4580 | + if (dev->is_rtt_suspend && dev->is_thunderboot) { |
---|
| 4581 | + stream->curr_buf_toisp = NULL; |
---|
| 4582 | + stream->next_buf_toisp = NULL; |
---|
| 4583 | + INIT_LIST_HEAD(&stream->rx_buf_head); |
---|
| 4584 | + |
---|
| 4585 | + for (i = 0; i < buf_num; i++) { |
---|
| 4586 | + buf = &stream->rx_buf[i]; |
---|
| 4587 | + if (buf->dbufs.is_init) |
---|
| 4588 | + v4l2_subdev_call(sd, core, ioctl, |
---|
| 4589 | + RKISP_VICAP_CMD_RX_BUFFER_FREE, &buf->dbufs); |
---|
| 4590 | + buf->dummy.is_free = true; |
---|
| 4591 | + } |
---|
| 4592 | + |
---|
| 4593 | + if (IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP)) { |
---|
| 4594 | + share_head_size = dev->thunderboot_sensor_num * sizeof(struct rkisp32_thunderboot_resmem_head); |
---|
| 4595 | + if (share_head_size != dev->share_mem_size) |
---|
| 4596 | + v4l2_info(&stream->cifdev->v4l2_dev, |
---|
| 4597 | + "share mem head error, rtt head size %d, arm head size %d\n", |
---|
| 4598 | + dev->share_mem_size, share_head_size); |
---|
| 4599 | + resmem_free_start = dev->resmem_pa + share_head_size + dev->nr_buf_size; |
---|
| 4600 | + resmem_free_end = dev->resmem_pa + dev->resmem_size; |
---|
| 4601 | + v4l2_info(&stream->cifdev->v4l2_dev, |
---|
| 4602 | + "free reserved mem start 0x%x, end 0x%x, share_head_size 0x%x, nr_buf_size 0x%x\n", |
---|
| 4603 | + (u32)resmem_free_start, (u32)resmem_free_end, share_head_size, dev->nr_buf_size); |
---|
| 4604 | + free_reserved_area(phys_to_virt(resmem_free_start), |
---|
| 4605 | + phys_to_virt(resmem_free_end), |
---|
| 4606 | + -1, "rkisp_thunderboot"); |
---|
| 4607 | + } |
---|
| 4608 | + atomic_set(&stream->buf_cnt, 0); |
---|
| 4609 | + stream->total_buf_num = 0; |
---|
| 4610 | + stream->rx_buf_num = 0; |
---|
| 4611 | + |
---|
| 4612 | + return; |
---|
| 4613 | + } |
---|
4578 | 4614 | |
---|
4579 | 4615 | spin_lock_irqsave(&stream->vbq_lock, flags); |
---|
4580 | 4616 | stream->curr_buf_toisp = NULL; |
---|
.. | .. |
---|
4588 | 4624 | buf = &stream->rx_buf[i]; |
---|
4589 | 4625 | if (buf->dummy.is_free) |
---|
4590 | 4626 | continue; |
---|
| 4627 | + if (buf->dbufs.is_init) |
---|
| 4628 | + v4l2_subdev_call(sd, core, ioctl, |
---|
| 4629 | + RKISP_VICAP_CMD_RX_BUFFER_FREE, &buf->dbufs); |
---|
4591 | 4630 | if (!dev->is_thunderboot) |
---|
4592 | 4631 | rkcif_free_buffer(dev, &buf->dummy); |
---|
4593 | 4632 | else |
---|
.. | .. |
---|
4595 | 4634 | atomic_dec(&stream->buf_cnt); |
---|
4596 | 4635 | stream->total_buf_num--; |
---|
4597 | 4636 | } |
---|
| 4637 | + stream->rx_buf_num = 0; |
---|
4598 | 4638 | |
---|
4599 | 4639 | if (dev->is_thunderboot) { |
---|
4600 | 4640 | spin_unlock_irqrestore(&dev->buffree_lock, flags); |
---|
.. | .. |
---|
4605 | 4645 | "free rx_buf, buf_num %d\n", buf_num); |
---|
4606 | 4646 | } |
---|
4607 | 4647 | |
---|
| 4648 | +static void rkcif_get_resmem_head(struct rkcif_device *cif_dev); |
---|
4608 | 4649 | int rkcif_init_rx_buf(struct rkcif_stream *stream, int buf_num) |
---|
4609 | 4650 | { |
---|
4610 | 4651 | struct rkcif_device *dev = stream->cifdev; |
---|
.. | .. |
---|
4652 | 4693 | dummy->is_need_vaddr = true; |
---|
4653 | 4694 | dummy->is_need_dbuf = true; |
---|
4654 | 4695 | if (dev->is_thunderboot) { |
---|
| 4696 | + if (i == 0) |
---|
| 4697 | + rkcif_get_resmem_head(dev); |
---|
4655 | 4698 | buf->buf_idx = i; |
---|
4656 | 4699 | ret = rkcif_alloc_reserved_mem_buf(dev, buf); |
---|
4657 | 4700 | if (ret) { |
---|
4658 | | - priv->buf_num = i; |
---|
| 4701 | + stream->rx_buf_num = i; |
---|
4659 | 4702 | v4l2_info(&dev->v4l2_dev, |
---|
4660 | 4703 | "reserved mem support alloc buf num %d, require buf num %d\n", |
---|
4661 | 4704 | i, buf_num); |
---|
.. | .. |
---|
4668 | 4711 | } else { |
---|
4669 | 4712 | ret = rkcif_alloc_buffer(dev, dummy); |
---|
4670 | 4713 | if (ret) { |
---|
4671 | | - priv->buf_num = i; |
---|
| 4714 | + stream->rx_buf_num = i; |
---|
4672 | 4715 | v4l2_info(&dev->v4l2_dev, |
---|
4673 | 4716 | "alloc buf num %d, require buf num %d\n", |
---|
4674 | 4717 | i, buf_num); |
---|
.. | .. |
---|
4684 | 4727 | buf->dbufs.is_uncompact = false; |
---|
4685 | 4728 | else |
---|
4686 | 4729 | buf->dbufs.is_uncompact = true; |
---|
4687 | | - if (priv && priv->mode.rdbk_mode == RKISP_VICAP_ONLINE && i == 0) { |
---|
| 4730 | + if (priv && i == 0) { |
---|
4688 | 4731 | buf->dbufs.is_first = true; |
---|
4689 | | - rkcif_s_rx_buffer(dev, &buf->dbufs); |
---|
| 4732 | + if (priv->mode.rdbk_mode == RKISP_VICAP_ONLINE) |
---|
| 4733 | + rkcif_s_rx_buffer(stream, &buf->dbufs); |
---|
4690 | 4734 | } |
---|
4691 | 4735 | i++; |
---|
4692 | 4736 | if (!dev->is_thunderboot && i >= buf_num) { |
---|
| 4737 | + stream->rx_buf_num = buf_num; |
---|
4693 | 4738 | break; |
---|
4694 | 4739 | } else if (i >= RKISP_VICAP_BUF_CNT_MAX) { |
---|
4695 | | - priv->buf_num = i; |
---|
| 4740 | + stream->rx_buf_num = i; |
---|
4696 | 4741 | v4l2_info(&dev->v4l2_dev, |
---|
4697 | 4742 | "reserved mem alloc buf num %d\n", i); |
---|
4698 | 4743 | break; |
---|
.. | .. |
---|
4701 | 4746 | "init rx_buf,dma_addr 0x%llx size: 0x%x\n", |
---|
4702 | 4747 | (u64)dummy->dma_addr, pixm->plane_fmt[0].sizeimage); |
---|
4703 | 4748 | } |
---|
4704 | | - if (priv->buf_num) { |
---|
4705 | | - stream->total_buf_num = priv->buf_num; |
---|
4706 | | - atomic_set(&stream->buf_cnt, priv->buf_num); |
---|
| 4749 | + if (stream->rx_buf_num) { |
---|
| 4750 | + stream->total_buf_num = stream->rx_buf_num; |
---|
| 4751 | + atomic_set(&stream->buf_cnt, stream->rx_buf_num); |
---|
4707 | 4752 | return 0; |
---|
4708 | 4753 | } else { |
---|
4709 | 4754 | return -EINVAL; |
---|
.. | .. |
---|
4735 | 4780 | pad, enum_frame_interval, |
---|
4736 | 4781 | NULL, &fie); |
---|
4737 | 4782 | if (!ret) { |
---|
4738 | | - if (fie.code == MEDIA_BUS_FMT_RGB888_1X24) |
---|
| 4783 | + if (fie.code == MEDIA_BUS_FMT_RGB888_1X24 || |
---|
| 4784 | + fie.code == MEDIA_BUS_FMT_BGR888_1X24 || |
---|
| 4785 | + fie.code == MEDIA_BUS_FMT_GBR888_1X24) |
---|
4739 | 4786 | size = fie.width * fie.height * 3; |
---|
4740 | 4787 | else |
---|
4741 | 4788 | size = fie.width * fie.height * 2; |
---|
.. | .. |
---|
4758 | 4805 | ret = v4l2_subdev_call(dev->terminal_sensor.sd, |
---|
4759 | 4806 | pad, get_fmt, NULL, &fmt); |
---|
4760 | 4807 | if (!ret) { |
---|
4761 | | - if (fmt.format.code == MEDIA_BUS_FMT_RGB888_1X24) |
---|
| 4808 | + if (fmt.format.code == MEDIA_BUS_FMT_RGB888_1X24 || |
---|
| 4809 | + fmt.format.code == MEDIA_BUS_FMT_BGR888_1X24 || |
---|
| 4810 | + fmt.format.code == MEDIA_BUS_FMT_GBR888_1X24) |
---|
4762 | 4811 | size = fmt.format.width * fmt.format.height * 3; |
---|
4763 | 4812 | else |
---|
4764 | 4813 | size = fmt.format.width * fmt.format.height * 2; |
---|
.. | .. |
---|
4964 | 5013 | spin_lock_irqsave(&stream->fps_lock, flags); |
---|
4965 | 5014 | fs_time = stream->readout.fs_timestamp; |
---|
4966 | 5015 | spin_unlock_irqrestore(&stream->fps_lock, flags); |
---|
4967 | | - cur_time = ktime_get_ns(); |
---|
| 5016 | + cur_time = rkcif_time_get_ns(dev); |
---|
4968 | 5017 | if (cur_time > fs_time && |
---|
4969 | 5018 | cur_time - fs_time < (frame_time_ns - 10000000)) { |
---|
4970 | 5019 | spin_lock_irqsave(&stream->vbq_lock, flags); |
---|
.. | .. |
---|
5024 | 5073 | list_add_tail(&stream->next_buf->queue, &stream->buf_head); |
---|
5025 | 5074 | spin_unlock_irqrestore(&stream->vbq_lock, flags); |
---|
5026 | 5075 | |
---|
5027 | | - stream->curr_buf = NULL; |
---|
5028 | | - stream->next_buf = NULL; |
---|
5029 | | - |
---|
5030 | 5076 | if (dev->hdr.hdr_mode == HDR_X2 || |
---|
5031 | 5077 | dev->hdr.hdr_mode == HDR_X3) |
---|
5032 | 5078 | rkcif_release_rdbk_buf(stream); |
---|
| 5079 | + |
---|
| 5080 | + stream->curr_buf = NULL; |
---|
| 5081 | + stream->next_buf = NULL; |
---|
5033 | 5082 | |
---|
5034 | 5083 | rkcif_rx_buffer_free(stream); |
---|
5035 | 5084 | list_for_each_entry(buf, &stream->buf_head, queue) { |
---|
.. | .. |
---|
5079 | 5128 | } |
---|
5080 | 5129 | } |
---|
5081 | 5130 | mutex_unlock(&hw_dev->dev_lock); |
---|
5082 | | - if (dev->can_be_reset && dev->chip_id >= CHIP_RK3588_CIF) |
---|
| 5131 | + if (dev->can_be_reset && dev->chip_id >= CHIP_RK3588_CIF) { |
---|
5083 | 5132 | rkcif_do_soft_reset(dev); |
---|
| 5133 | + atomic_set(&dev->streamoff_cnt, 0); |
---|
| 5134 | + } |
---|
5084 | 5135 | if (dev->can_be_reset && can_reset) { |
---|
5085 | 5136 | dev->can_be_reset = false; |
---|
5086 | 5137 | dev->reset_work_cancel = true; |
---|
.. | .. |
---|
5938 | 5989 | rkcif_write_register(dev, CIF_REG_DVP_CTRL, |
---|
5939 | 5990 | AXI_BURST_16 | workmode | ENABLE_CAPTURE); |
---|
5940 | 5991 | } |
---|
| 5992 | + dev->intr_mask = rkcif_read_register(dev, CIF_REG_DVP_INTSTAT); |
---|
5941 | 5993 | #if IS_ENABLED(CONFIG_CPU_RV1106) |
---|
5942 | 5994 | rv1106_sdmmc_put_lock(); |
---|
5943 | 5995 | #endif |
---|
.. | .. |
---|
6121 | 6173 | int rkmodule_stream_seq = RKMODULE_START_STREAM_DEFAULT; |
---|
6122 | 6174 | int ret; |
---|
6123 | 6175 | int i = 0; |
---|
| 6176 | + u32 skip_frame = 0; |
---|
6124 | 6177 | |
---|
6125 | 6178 | v4l2_info(&dev->v4l2_dev, "stream[%d] start streaming\n", stream->id); |
---|
6126 | 6179 | |
---|
.. | .. |
---|
6248 | 6301 | if (ret < 0) |
---|
6249 | 6302 | goto destroy_buf; |
---|
6250 | 6303 | } |
---|
| 6304 | + ret = v4l2_subdev_call(terminal_sensor->sd, |
---|
| 6305 | + core, ioctl, |
---|
| 6306 | + RKMODULE_GET_SKIP_FRAME, |
---|
| 6307 | + &skip_frame); |
---|
| 6308 | + if (!ret && skip_frame < RKCIF_SKIP_FRAME_MAX) |
---|
| 6309 | + stream->skip_frame = skip_frame; |
---|
| 6310 | + else |
---|
| 6311 | + stream->skip_frame = 0; |
---|
| 6312 | + stream->cur_skip_frame = stream->skip_frame; |
---|
6251 | 6313 | } |
---|
6252 | 6314 | if (dev->chip_id >= CHIP_RK1808_CIF) { |
---|
6253 | 6315 | if (dev->active_sensor && |
---|
.. | .. |
---|
6632 | 6694 | stream->buf_owner = 0; |
---|
6633 | 6695 | stream->buf_replace_cnt = 0; |
---|
6634 | 6696 | stream->is_stop_capture = false; |
---|
| 6697 | + stream->is_single_cap = false; |
---|
6635 | 6698 | atomic_set(&stream->buf_cnt, 0); |
---|
| 6699 | + stream->rx_buf_num = 0; |
---|
| 6700 | + init_completion(&stream->stop_complete); |
---|
| 6701 | + stream->is_wait_stop_complete = false; |
---|
6636 | 6702 | } |
---|
6637 | 6703 | |
---|
6638 | 6704 | static int rkcif_fh_open(struct file *filp) |
---|
.. | .. |
---|
7218 | 7284 | skip_n); |
---|
7219 | 7285 | } |
---|
7220 | 7286 | |
---|
| 7287 | +static bool rkcif_check_can_be_online(struct rkcif_device *cif_dev) |
---|
| 7288 | +{ |
---|
| 7289 | + if (cif_dev->sditf[0] == NULL || cif_dev->sditf[0]->mode.name == NULL || |
---|
| 7290 | + (cif_dev->chip_id == CHIP_RV1106_CIF && |
---|
| 7291 | + strstr(cif_dev->sditf[0]->mode.name, "unite"))) |
---|
| 7292 | + return false; |
---|
| 7293 | + return true; |
---|
| 7294 | +} |
---|
| 7295 | + |
---|
7221 | 7296 | static int rkcif_do_reset_work(struct rkcif_device *cif_dev, |
---|
7222 | 7297 | enum rkmodule_reset_src reset_src); |
---|
| 7298 | +static bool rkcif_check_single_dev_stream_on(struct rkcif_hw *hw); |
---|
7223 | 7299 | |
---|
7224 | 7300 | static long rkcif_ioctl_default(struct file *file, void *fh, |
---|
7225 | 7301 | bool valid_prio, unsigned int cmd, void *arg) |
---|
.. | .. |
---|
7231 | 7307 | struct csi_channel_info csi_info; |
---|
7232 | 7308 | struct rkcif_fps fps; |
---|
7233 | 7309 | int reset_src; |
---|
| 7310 | + struct rkcif_quick_stream_param *stream_param; |
---|
| 7311 | + bool is_single_dev = false; |
---|
| 7312 | + struct v4l2_subdev *sd; |
---|
| 7313 | + int ret = -EINVAL; |
---|
| 7314 | + int i = 0; |
---|
| 7315 | + int stream_num = 0; |
---|
| 7316 | + bool is_can_be_online = false; |
---|
7234 | 7317 | |
---|
7235 | 7318 | switch (cmd) { |
---|
7236 | 7319 | case RKCIF_CMD_GET_CSI_MEMORY_MODE: |
---|
.. | .. |
---|
7279 | 7362 | case RKCIF_CMD_SET_RESET: |
---|
7280 | 7363 | reset_src = *(int *)arg; |
---|
7281 | 7364 | return rkcif_do_reset_work(dev, reset_src); |
---|
| 7365 | + case RKCIF_CMD_SET_QUICK_STREAM: |
---|
| 7366 | + stream_param = (struct rkcif_quick_stream_param *)arg; |
---|
| 7367 | + if (!dev->sditf[0]) |
---|
| 7368 | + return -EINVAL; |
---|
| 7369 | + if (dev->hdr.hdr_mode == HDR_X2) |
---|
| 7370 | + stream_num = 2; |
---|
| 7371 | + else if (dev->hdr.hdr_mode == HDR_X3) |
---|
| 7372 | + stream_num = 3; |
---|
| 7373 | + else |
---|
| 7374 | + stream_num = 1; |
---|
| 7375 | + if (stream_param->on) { |
---|
| 7376 | + for (i = 0; i < stream_num; i++) |
---|
| 7377 | + dev->stream[i].cur_skip_frame = dev->stream[i].skip_frame; |
---|
| 7378 | + is_single_dev = rkcif_check_single_dev_stream_on(dev->hw_dev); |
---|
| 7379 | + is_can_be_online = rkcif_check_can_be_online(dev); |
---|
| 7380 | + if (is_single_dev && is_can_be_online) { |
---|
| 7381 | + for (i = 0; i < stream_num - 1; i++) { |
---|
| 7382 | + dev->stream[i].to_en_dma = RKCIF_DMAEN_BY_ISP; |
---|
| 7383 | + rkcif_enable_dma_capture(&dev->stream[i], true); |
---|
| 7384 | + } |
---|
| 7385 | + dev->sditf[0]->mode.rdbk_mode = RKISP_VICAP_ONLINE; |
---|
| 7386 | + sditf_change_to_online(dev->sditf[0]); |
---|
| 7387 | + sd = get_rkisp_sd(dev->sditf[0]); |
---|
| 7388 | + if (sd) |
---|
| 7389 | + ret = v4l2_subdev_call(sd, core, ioctl, |
---|
| 7390 | + RKISP_VICAP_CMD_MODE, &dev->sditf[0]->mode); |
---|
| 7391 | + if (ret) { |
---|
| 7392 | + v4l2_err(&dev->v4l2_dev, "set isp work mode online fail\n"); |
---|
| 7393 | + return -EINVAL; |
---|
| 7394 | + } |
---|
| 7395 | + } else { |
---|
| 7396 | + sditf_disable_immediately(dev->sditf[0]); |
---|
| 7397 | + dev->sditf[0]->mode.rdbk_mode = RKISP_VICAP_RDBK_AUTO; |
---|
| 7398 | + sd = get_rkisp_sd(dev->sditf[0]); |
---|
| 7399 | + if (sd) |
---|
| 7400 | + ret = v4l2_subdev_call(sd, core, ioctl, |
---|
| 7401 | + RKISP_VICAP_CMD_MODE, &dev->sditf[0]->mode); |
---|
| 7402 | + for (i = 0; i < stream_num; i++) { |
---|
| 7403 | + if (dev->sditf[0]->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO) |
---|
| 7404 | + dev->stream[i].to_en_dma = RKCIF_DMAEN_BY_ISP; |
---|
| 7405 | + else |
---|
| 7406 | + dev->stream[i].to_en_dma = RKCIF_DMAEN_BY_VICAP; |
---|
| 7407 | + rkcif_enable_dma_capture(&dev->stream[i], true); |
---|
| 7408 | + } |
---|
| 7409 | + } |
---|
| 7410 | + rkcif_dphy_quick_stream(dev, stream_param->on); |
---|
| 7411 | + v4l2_subdev_call(dev->terminal_sensor.sd, core, ioctl, |
---|
| 7412 | + RKMODULE_SET_QUICK_STREAM, &stream_param->on); |
---|
| 7413 | + } else { |
---|
| 7414 | + if (dev->sditf[0]->mode.rdbk_mode == RKISP_VICAP_ONLINE) { |
---|
| 7415 | + for (i = 0; i < stream_num - 1; i++) { |
---|
| 7416 | + reinit_completion(&dev->stream[i].stop_complete); |
---|
| 7417 | + dev->stream[i].is_wait_stop_complete = true; |
---|
| 7418 | + dev->stream[i].to_stop_dma = RKCIF_DMAEN_BY_ISP; |
---|
| 7419 | + wait_for_completion_timeout(&dev->stream[i].stop_complete, |
---|
| 7420 | + msecs_to_jiffies(RKCIF_STOP_MAX_WAIT_TIME_MS)); |
---|
| 7421 | + } |
---|
| 7422 | + stream->cifdev->sensor_state = stream_param->on; |
---|
| 7423 | + stream->cifdev->sensor_state_change = true; |
---|
| 7424 | + dev->stream[i].is_wait_stop_complete = true; |
---|
| 7425 | + wait_for_completion_timeout(&dev->stream[i].stop_complete, |
---|
| 7426 | + msecs_to_jiffies(RKCIF_STOP_MAX_WAIT_TIME_MS)); |
---|
| 7427 | + } else { |
---|
| 7428 | + for (i = 0; i < stream_num; i++) { |
---|
| 7429 | + dev->stream[i].is_wait_stop_complete = true; |
---|
| 7430 | + reinit_completion(&dev->stream[i].stop_complete); |
---|
| 7431 | + if (dev->sditf[0]->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO) |
---|
| 7432 | + dev->stream[i].to_stop_dma = RKCIF_DMAEN_BY_ISP; |
---|
| 7433 | + else |
---|
| 7434 | + dev->stream[i].to_stop_dma = RKCIF_DMAEN_BY_VICAP; |
---|
| 7435 | + wait_for_completion_timeout(&dev->stream[i].stop_complete, |
---|
| 7436 | + msecs_to_jiffies(RKCIF_STOP_MAX_WAIT_TIME_MS)); |
---|
| 7437 | + } |
---|
| 7438 | + rkcif_dphy_quick_stream(dev, stream_param->on); |
---|
| 7439 | + v4l2_subdev_call(dev->terminal_sensor.sd, core, ioctl, |
---|
| 7440 | + RKMODULE_SET_QUICK_STREAM, &stream_param->on); |
---|
| 7441 | + } |
---|
| 7442 | + stream_param->frame_num = dev->stream[0].frame_idx - 1; |
---|
| 7443 | + if (!dev->is_rtt_suspend) { |
---|
| 7444 | + dev->resume_mode = stream_param->resume_mode; |
---|
| 7445 | + v4l2_dbg(3, rkcif_debug, &dev->v4l2_dev, |
---|
| 7446 | + "set resume mode %d\n", dev->resume_mode); |
---|
| 7447 | + } |
---|
| 7448 | + } |
---|
| 7449 | + break; |
---|
7282 | 7450 | default: |
---|
7283 | 7451 | return -EINVAL; |
---|
7284 | 7452 | } |
---|
.. | .. |
---|
8082 | 8250 | timer->csi2_err_triggered_cnt++; |
---|
8083 | 8251 | if (timer->csi2_err_triggered_cnt == 1) { |
---|
8084 | 8252 | is_first_err = true; |
---|
8085 | | - timer->csi2_first_err_timestamp = ktime_get_ns(); |
---|
| 8253 | + timer->csi2_first_err_timestamp = rkcif_time_get_ns(dev); |
---|
8086 | 8254 | } |
---|
8087 | 8255 | |
---|
8088 | 8256 | is_assign_triggered = true; |
---|
.. | .. |
---|
8094 | 8262 | |
---|
8095 | 8263 | if (!is_first_err) { |
---|
8096 | 8264 | if (timer->csi2_err_triggered_cnt >= 1) { |
---|
8097 | | - cur_time = ktime_get_ns(); |
---|
| 8265 | + cur_time = rkcif_time_get_ns(dev); |
---|
8098 | 8266 | diff_time = cur_time - timer->csi2_first_err_timestamp; |
---|
8099 | 8267 | diff_time = div_u64(diff_time, 1000000); |
---|
8100 | 8268 | if (diff_time >= timer->err_time_interval) { |
---|
.. | .. |
---|
8437 | 8605 | v4l2_err(&dev->v4l2_dev, |
---|
8438 | 8606 | "s/m/l frame err, timestamp s:%lld m:%lld l:%lld\n", |
---|
8439 | 8607 | s_ts, m_ts, l_ts); |
---|
8440 | | - goto RDBK_FRM_UNMATCH; |
---|
| 8608 | + return; |
---|
8441 | 8609 | } |
---|
8442 | 8610 | |
---|
8443 | 8611 | if ((m_ts - l_ts) > time || (s_ts - m_ts) > time) { |
---|
.. | .. |
---|
8458 | 8626 | v4l2_err(&dev->v4l2_dev, |
---|
8459 | 8627 | "timestamp no match, s:%lld m:%lld l:%lld, fps:%d\n", |
---|
8460 | 8628 | s_ts, m_ts, l_ts, fps); |
---|
8461 | | - goto RDBK_FRM_UNMATCH; |
---|
| 8629 | + return; |
---|
8462 | 8630 | } |
---|
8463 | 8631 | } |
---|
8464 | 8632 | dev->rdbk_buf[RDBK_M]->vb.sequence = dev->rdbk_buf[RDBK_L]->vb.sequence; |
---|
.. | .. |
---|
8487 | 8655 | v4l2_err(&dev->v4l2_dev, "lost medium frames\n"); |
---|
8488 | 8656 | if (!dev->rdbk_buf[RDBK_S]) |
---|
8489 | 8657 | v4l2_err(&dev->v4l2_dev, "lost short frames\n"); |
---|
8490 | | - goto RDBK_FRM_UNMATCH; |
---|
| 8658 | + return; |
---|
8491 | 8659 | } |
---|
8492 | 8660 | } else if (dev->hdr.hdr_mode == HDR_X2) { |
---|
8493 | 8661 | if (dev->rdbk_buf[RDBK_L] && dev->rdbk_buf[RDBK_M]) { |
---|
.. | .. |
---|
8498 | 8666 | v4l2_err(&dev->v4l2_dev, |
---|
8499 | 8667 | "s/l frame err, timestamp s:%lld l:%lld\n", |
---|
8500 | 8668 | s_ts, l_ts); |
---|
8501 | | - goto RDBK_FRM_UNMATCH; |
---|
| 8669 | + return; |
---|
8502 | 8670 | } |
---|
8503 | 8671 | |
---|
8504 | 8672 | if ((s_ts - l_ts) > time) { |
---|
.. | .. |
---|
8518 | 8686 | v4l2_err(&dev->v4l2_dev, |
---|
8519 | 8687 | "timestamp no match, s:%lld l:%lld, fps:%d\n", |
---|
8520 | 8688 | s_ts, l_ts, fps); |
---|
8521 | | - goto RDBK_FRM_UNMATCH; |
---|
| 8689 | + return; |
---|
8522 | 8690 | } |
---|
8523 | 8691 | } |
---|
8524 | 8692 | dev->rdbk_buf[RDBK_M]->vb.sequence = dev->rdbk_buf[RDBK_L]->vb.sequence; |
---|
.. | .. |
---|
8542 | 8710 | v4l2_err(&dev->v4l2_dev, "lost long frames\n"); |
---|
8543 | 8711 | if (!dev->rdbk_buf[RDBK_M]) |
---|
8544 | 8712 | v4l2_err(&dev->v4l2_dev, "lost short frames\n"); |
---|
8545 | | - goto RDBK_FRM_UNMATCH; |
---|
| 8713 | + return; |
---|
8546 | 8714 | } |
---|
8547 | | - } |
---|
8548 | | - |
---|
8549 | | - dev->rdbk_buf[RDBK_L] = NULL; |
---|
8550 | | - dev->rdbk_buf[RDBK_M] = NULL; |
---|
8551 | | - dev->rdbk_buf[RDBK_S] = NULL; |
---|
8552 | | - return; |
---|
8553 | | - |
---|
8554 | | -RDBK_FRM_UNMATCH: |
---|
8555 | | - if (dev->rdbk_buf[RDBK_L]) { |
---|
8556 | | - dev->rdbk_buf[RDBK_L]->vb.vb2_buf.state = VB2_BUF_STATE_ACTIVE; |
---|
8557 | | - rkcif_buf_queue(&dev->rdbk_buf[RDBK_L]->vb.vb2_buf); |
---|
8558 | | - } |
---|
8559 | | - if (dev->rdbk_buf[RDBK_M]) { |
---|
8560 | | - dev->rdbk_buf[RDBK_M]->vb.vb2_buf.state = VB2_BUF_STATE_ACTIVE; |
---|
8561 | | - rkcif_buf_queue(&dev->rdbk_buf[RDBK_M]->vb.vb2_buf); |
---|
8562 | | - } |
---|
8563 | | - if (dev->rdbk_buf[RDBK_S]) { |
---|
8564 | | - dev->rdbk_buf[RDBK_S]->vb.vb2_buf.state = VB2_BUF_STATE_ACTIVE; |
---|
8565 | | - rkcif_buf_queue(&dev->rdbk_buf[RDBK_S]->vb.vb2_buf); |
---|
8566 | 8715 | } |
---|
8567 | 8716 | |
---|
8568 | 8717 | dev->rdbk_buf[RDBK_L] = NULL; |
---|
.. | .. |
---|
8603 | 8752 | else |
---|
8604 | 8753 | vb_done->vb2_buf.timestamp = stream->readout.fs_timestamp; |
---|
8605 | 8754 | vb_done->sequence = stream->frame_idx - 1; |
---|
8606 | | - active_buf->fe_timestamp = ktime_get_ns(); |
---|
| 8755 | + active_buf->fe_timestamp = rkcif_time_get_ns(cif_dev); |
---|
8607 | 8756 | if (stream->is_line_wake_up) { |
---|
8608 | 8757 | spin_lock_irqsave(&stream->fps_lock, flags); |
---|
8609 | 8758 | if (mode) |
---|
.. | .. |
---|
8615 | 8764 | } |
---|
8616 | 8765 | if (stream->cif_fmt_in->field == V4L2_FIELD_INTERLACED) |
---|
8617 | 8766 | vb_done->sequence /= 2; |
---|
| 8767 | + if (stream->cur_skip_frame) { |
---|
| 8768 | + rkcif_buf_queue(&active_buf->vb.vb2_buf); |
---|
| 8769 | + return; |
---|
| 8770 | + } |
---|
| 8771 | + } else if (cif_dev->rdbk_buf[stream->id]) { |
---|
| 8772 | + vb_done = &cif_dev->rdbk_buf[stream->id]->vb; |
---|
| 8773 | + if (cif_dev->chip_id < CHIP_RK3588_CIF && |
---|
| 8774 | + cif_dev->active_sensor->mbus.type == V4L2_MBUS_BT656) |
---|
| 8775 | + vb_done->vb2_buf.timestamp = stream->readout.fe_timestamp; |
---|
| 8776 | + else |
---|
| 8777 | + vb_done->vb2_buf.timestamp = stream->readout.fs_timestamp; |
---|
| 8778 | + vb_done->sequence = stream->frame_idx - 1; |
---|
| 8779 | + cif_dev->rdbk_buf[stream->id]->fe_timestamp = rkcif_time_get_ns(cif_dev); |
---|
8618 | 8780 | } |
---|
8619 | 8781 | |
---|
8620 | 8782 | if (cif_dev->hdr.hdr_mode == NO_HDR || cif_dev->hdr.hdr_mode == HDR_COMPR) { |
---|
.. | .. |
---|
8638 | 8800 | if (cif_dev->is_start_hdr) { |
---|
8639 | 8801 | spin_lock_irqsave(&cif_dev->hdr_lock, flags); |
---|
8640 | 8802 | if (mipi_id == RKCIF_STREAM_MIPI_ID0) { |
---|
8641 | | - if (cif_dev->rdbk_buf[RDBK_L]) { |
---|
| 8803 | + if (cif_dev->rdbk_buf[RDBK_L] && active_buf) { |
---|
8642 | 8804 | v4l2_err(&cif_dev->v4l2_dev, |
---|
8643 | 8805 | "multiple long data in %s frame,frm_idx:%d,state:0x%x\n", |
---|
8644 | 8806 | cif_dev->hdr.hdr_mode == HDR_X2 ? "hdr_x2" : "hdr_x3", |
---|
.. | .. |
---|
8651 | 8813 | if (active_buf) |
---|
8652 | 8814 | cif_dev->rdbk_buf[RDBK_L] = active_buf; |
---|
8653 | 8815 | } else if (mipi_id == RKCIF_STREAM_MIPI_ID1) { |
---|
8654 | | - if (cif_dev->rdbk_buf[RDBK_M]) { |
---|
| 8816 | + if (cif_dev->rdbk_buf[RDBK_M] && active_buf) { |
---|
8655 | 8817 | v4l2_err(&cif_dev->v4l2_dev, |
---|
8656 | 8818 | "multiple %s frame,frm_idx:%d,state:0x%x\n", |
---|
8657 | 8819 | cif_dev->hdr.hdr_mode == HDR_X2 ? "short data in hdr_x2" : "medium data in hdr_x3", |
---|
.. | .. |
---|
8666 | 8828 | if (cif_dev->hdr.hdr_mode == HDR_X2) |
---|
8667 | 8829 | rkcif_rdbk_frame_end(stream); |
---|
8668 | 8830 | } else if (mipi_id == RKCIF_STREAM_MIPI_ID2) { |
---|
8669 | | - if (cif_dev->rdbk_buf[RDBK_S]) { |
---|
| 8831 | + if (cif_dev->rdbk_buf[RDBK_S] && active_buf) { |
---|
8670 | 8832 | v4l2_err(&cif_dev->v4l2_dev, |
---|
8671 | 8833 | "multiple %s frame, frm_idx:%d,state:0x%x\n", |
---|
8672 | 8834 | cif_dev->hdr.hdr_mode == HDR_X2 ? "err short data in hdr_x3" : "short data in hdr_x3", |
---|
.. | .. |
---|
8833 | 8995 | spin_unlock_irqrestore(&stream->vbq_lock, flags); |
---|
8834 | 8996 | active_buf->dbufs.sequence = stream->frame_idx - 1; |
---|
8835 | 8997 | active_buf->dbufs.timestamp = stream->readout.fs_timestamp; |
---|
8836 | | - active_buf->fe_timestamp = ktime_get_ns(); |
---|
| 8998 | + active_buf->fe_timestamp = rkcif_time_get_ns(stream->cifdev); |
---|
8837 | 8999 | stream->last_frame_idx = stream->frame_idx; |
---|
8838 | 9000 | if (stream->cifdev->hdr.hdr_mode == NO_HDR) { |
---|
8839 | | - rkcif_s_rx_buffer(stream->cifdev, &active_buf->dbufs); |
---|
| 9001 | + rkcif_s_rx_buffer(stream, &active_buf->dbufs); |
---|
8840 | 9002 | if (stream->cifdev->is_support_tools && stream->tools_vdev) |
---|
8841 | 9003 | rkcif_rdbk_with_tools(stream, active_buf); |
---|
8842 | 9004 | } else { |
---|
.. | .. |
---|
8853 | 9015 | unsigned long flags; |
---|
8854 | 9016 | |
---|
8855 | 9017 | spin_lock_irqsave(&stream->fps_lock, flags); |
---|
8856 | | - stream->readout.fe_timestamp = ktime_get_ns(); |
---|
| 9018 | + stream->readout.fe_timestamp = rkcif_time_get_ns(cif_dev); |
---|
8857 | 9019 | |
---|
8858 | 9020 | if (cif_dev->inf_id == RKCIF_DVP) { |
---|
8859 | 9021 | spin_unlock_irqrestore(&stream->fps_lock, flags); |
---|
.. | .. |
---|
8900 | 9062 | if (stream->frame_phase & CIF_CSI_FRAME0_READY) { |
---|
8901 | 9063 | if (stream->curr_buf) |
---|
8902 | 9064 | active_buf = stream->curr_buf; |
---|
8903 | | - stream->fps_stats.frm0_timestamp = ktime_get_ns(); |
---|
| 9065 | + stream->fps_stats.frm0_timestamp = rkcif_time_get_ns(cif_dev); |
---|
8904 | 9066 | } else if (stream->frame_phase & CIF_CSI_FRAME1_READY) { |
---|
8905 | 9067 | if (stream->next_buf) |
---|
8906 | 9068 | active_buf = stream->next_buf; |
---|
8907 | | - stream->fps_stats.frm1_timestamp = ktime_get_ns(); |
---|
| 9069 | + stream->fps_stats.frm1_timestamp = rkcif_time_get_ns(cif_dev); |
---|
8908 | 9070 | } |
---|
8909 | 9071 | spin_unlock_irqrestore(&stream->fps_lock, flags); |
---|
8910 | 9072 | } |
---|
.. | .. |
---|
8926 | 9088 | cif_dev->active_sensor->mbus.type == V4L2_MBUS_BT656 && |
---|
8927 | 9089 | stream->id != 0) |
---|
8928 | 9090 | stream->frame_idx++; |
---|
8929 | | - if (!stream->is_line_wake_up && stream->dma_en & RKCIF_DMAEN_BY_VICAP) |
---|
| 9091 | + if (!stream->is_line_wake_up) |
---|
8930 | 9092 | rkcif_buf_done_prepare(stream, active_buf, mipi_id, 0); |
---|
8931 | 9093 | |
---|
8932 | 9094 | if (cif_dev->chip_id == CHIP_RV1126_CIF || |
---|
.. | .. |
---|
8948 | 9110 | |
---|
8949 | 9111 | spin_lock(&stream->fps_lock); |
---|
8950 | 9112 | if (stream->frame_phase & CIF_CSI_FRAME0_READY) |
---|
8951 | | - stream->fps_stats.frm0_timestamp = ktime_get_ns(); |
---|
| 9113 | + stream->fps_stats.frm0_timestamp = rkcif_time_get_ns(cif_dev); |
---|
8952 | 9114 | else if (stream->frame_phase & CIF_CSI_FRAME1_READY) |
---|
8953 | | - stream->fps_stats.frm1_timestamp = ktime_get_ns(); |
---|
| 9115 | + stream->fps_stats.frm1_timestamp = rkcif_time_get_ns(cif_dev); |
---|
8954 | 9116 | spin_unlock(&stream->fps_lock); |
---|
8955 | 9117 | |
---|
8956 | 9118 | if (cif_dev->inf_id == RKCIF_MIPI_LVDS) |
---|
.. | .. |
---|
8982 | 9144 | if (stream->frame_phase & CIF_CSI_FRAME0_READY) { |
---|
8983 | 9145 | if (stream->curr_buf_rockit) |
---|
8984 | 9146 | active_buf = stream->curr_buf_rockit; |
---|
8985 | | - stream->fps_stats.frm0_timestamp = ktime_get_ns(); |
---|
| 9147 | + stream->fps_stats.frm0_timestamp = rkcif_time_get_ns(cif_dev); |
---|
8986 | 9148 | } else if (stream->frame_phase & CIF_CSI_FRAME1_READY) { |
---|
8987 | 9149 | if (stream->next_buf_rockit) |
---|
8988 | 9150 | active_buf = stream->next_buf_rockit; |
---|
8989 | | - stream->fps_stats.frm1_timestamp = ktime_get_ns(); |
---|
| 9151 | + stream->fps_stats.frm1_timestamp = rkcif_time_get_ns(cif_dev); |
---|
8990 | 9152 | } |
---|
8991 | 9153 | spin_unlock_irqrestore(&stream->fps_lock, flags); |
---|
8992 | 9154 | } |
---|
.. | .. |
---|
9041 | 9203 | sensor->mbus.type == V4L2_MBUS_BT656) { |
---|
9042 | 9204 | rkcif_dvp_set_sof(cif_dev, seq); |
---|
9043 | 9205 | } |
---|
| 9206 | +} |
---|
| 9207 | + |
---|
| 9208 | +static void rkcif_toisp_set_stream(struct rkcif_device *dev, int on) |
---|
| 9209 | +{ |
---|
| 9210 | + struct v4l2_subdev *sd = get_rkisp_sd(dev->sditf[0]); |
---|
| 9211 | + |
---|
| 9212 | + if (sd) |
---|
| 9213 | + v4l2_subdev_call(sd, core, ioctl, |
---|
| 9214 | + RKISP_VICAP_CMD_SET_STREAM, &on); |
---|
9044 | 9215 | } |
---|
9045 | 9216 | |
---|
9046 | 9217 | static int rkcif_do_reset_work(struct rkcif_device *cif_dev, |
---|
.. | .. |
---|
9148 | 9319 | goto unlock_stream; |
---|
9149 | 9320 | } |
---|
9150 | 9321 | } |
---|
| 9322 | + |
---|
| 9323 | + if (priv && priv->mode.rdbk_mode == RKISP_VICAP_ONLINE) |
---|
| 9324 | + rkcif_toisp_set_stream(cif_dev, 1); |
---|
9151 | 9325 | |
---|
9152 | 9326 | for (i = 0; i < j; i++) { |
---|
9153 | 9327 | stream = resume_stream[i]; |
---|
.. | .. |
---|
9287 | 9461 | v4l2_dbg(3, rkcif_debug, &dev->v4l2_dev, "diff_time:%lld,devi_t:%ld,devi_h:%d\n", |
---|
9288 | 9462 | diff_time, timer->line_end_cycle * deviation, deviation); |
---|
9289 | 9463 | |
---|
9290 | | - cur_time = ktime_get_ns(); |
---|
| 9464 | + cur_time = rkcif_time_get_ns(dev); |
---|
9291 | 9465 | time_distance = timestamp0 > timestamp1 ? |
---|
9292 | 9466 | cur_time - timestamp0 : cur_time - timestamp1; |
---|
9293 | 9467 | time_distance = div_u64(time_distance, 1000); |
---|
.. | .. |
---|
9396 | 9570 | timer->csi2_err_cnt_even = 0; |
---|
9397 | 9571 | timer->csi2_err_fs_fe_cnt = 0; |
---|
9398 | 9572 | timer->notifer_called_cnt = 0; |
---|
| 9573 | + dev->is_toisp_reset = false; |
---|
9399 | 9574 | for (i = 0; i < dev->num_channels; i++) { |
---|
9400 | 9575 | stream = &dev->stream[i]; |
---|
9401 | 9576 | if (stream->state == RKCIF_STATE_STREAMING) |
---|
.. | .. |
---|
9405 | 9580 | if (timer->is_ctrl_by_user) { |
---|
9406 | 9581 | rkcif_send_reset_event(dev, timer->reset_src); |
---|
9407 | 9582 | } else { |
---|
| 9583 | + dev->reset_work.reset_src = timer->reset_src; |
---|
9408 | 9584 | if (!schedule_work(&dev->reset_work.work)) |
---|
9409 | 9585 | v4l2_info(&dev->v4l2_dev, |
---|
9410 | 9586 | "schedule reset work failed\n"); |
---|
9411 | | - dev->reset_work.reset_src = timer->reset_src; |
---|
9412 | 9587 | } |
---|
9413 | 9588 | } |
---|
9414 | 9589 | |
---|
.. | .. |
---|
9422 | 9597 | unsigned long flags; |
---|
9423 | 9598 | int ret, is_reset = 0; |
---|
9424 | 9599 | struct rkmodule_vicap_reset_info rst_info; |
---|
| 9600 | + |
---|
| 9601 | + if (dev->is_toisp_reset) { |
---|
| 9602 | + is_reset = 1; |
---|
| 9603 | + timer->reset_src = RKCIF_RESET_SRC_ERR_ISP; |
---|
| 9604 | + } |
---|
| 9605 | + if (is_reset) { |
---|
| 9606 | + rkcif_init_reset_work(timer); |
---|
| 9607 | + return is_reset; |
---|
| 9608 | + } |
---|
9425 | 9609 | |
---|
9426 | 9610 | if (timer->last_buf_wakeup_cnt[stream->id] < stream->buf_wake_up_cnt && |
---|
9427 | 9611 | check_cnt == 0) { |
---|
.. | .. |
---|
9796 | 9980 | if (stream->buf_owner == RKCIF_DMAEN_BY_ISP) |
---|
9797 | 9981 | stream->buf_owner = RKCIF_DMAEN_BY_ISP_TO_VICAP; |
---|
9798 | 9982 | |
---|
| 9983 | + atomic_dec(&cif_dev->streamoff_cnt); |
---|
9799 | 9984 | if (stream->dma_en) { |
---|
9800 | 9985 | stream->dma_en |= stream->to_en_dma; |
---|
9801 | 9986 | stream->to_en_dma = 0; |
---|
.. | .. |
---|
9866 | 10051 | return -EINVAL; |
---|
9867 | 10052 | |
---|
9868 | 10053 | stream->dma_en &= ~stream->to_stop_dma; |
---|
9869 | | - |
---|
| 10054 | + atomic_inc(&cif_dev->streamoff_cnt); |
---|
9870 | 10055 | if (stream->dma_en != 0) { |
---|
9871 | 10056 | if (stream->dma_en & RKCIF_DMAEN_BY_ISP) |
---|
9872 | 10057 | stream->buf_owner = RKCIF_DMAEN_BY_ISP; |
---|
.. | .. |
---|
9962 | 10147 | int i = 0; |
---|
9963 | 10148 | u32 val = 0; |
---|
9964 | 10149 | u64 cur_time = 0; |
---|
| 10150 | + int on = 0; |
---|
9965 | 10151 | |
---|
9966 | 10152 | for (i = 0; i < TOISP_CH_MAX; i++) { |
---|
9967 | 10153 | ch = rkcif_g_toisp_ch(intstat_glb, index); |
---|
.. | .. |
---|
9979 | 10165 | stream->stopping = false; |
---|
9980 | 10166 | wake_up(&stream->wq_stopped); |
---|
9981 | 10167 | } |
---|
9982 | | - |
---|
| 10168 | + if (stream->cifdev->sensor_state_change) { |
---|
| 10169 | + rkcif_dphy_quick_stream(stream->cifdev, on); |
---|
| 10170 | + stream->cifdev->sensor_work.on = stream->cifdev->sensor_state; |
---|
| 10171 | + schedule_work(&stream->cifdev->sensor_work.work); |
---|
| 10172 | + stream->cifdev->sensor_state_change = false; |
---|
| 10173 | + if (stream->is_wait_stop_complete) { |
---|
| 10174 | + stream->is_wait_stop_complete = false; |
---|
| 10175 | + complete(&stream->stop_complete); |
---|
| 10176 | + } |
---|
| 10177 | + } |
---|
| 10178 | + if (stream->is_single_cap && (!stream->cur_skip_frame) && |
---|
| 10179 | + (stream->cifdev->hdr.hdr_mode == NO_HDR || |
---|
| 10180 | + (stream->cifdev->hdr.hdr_mode == HDR_X2 && stream->id == 1) || |
---|
| 10181 | + (stream->cifdev->hdr.hdr_mode == HDR_X3 && stream->id == 2))) { |
---|
| 10182 | + rkcif_dphy_quick_stream(stream->cifdev, on); |
---|
| 10183 | + stream->cifdev->sensor_work.on = 0; |
---|
| 10184 | + schedule_work(&stream->cifdev->sensor_work.work); |
---|
| 10185 | + stream->is_single_cap = false; |
---|
| 10186 | + } |
---|
| 10187 | + if (stream->cur_skip_frame && |
---|
| 10188 | + (stream->cifdev->hdr.hdr_mode == NO_HDR || |
---|
| 10189 | + (stream->cifdev->hdr.hdr_mode == HDR_X2 && stream->id == 1) || |
---|
| 10190 | + (stream->cifdev->hdr.hdr_mode == HDR_X3 && stream->id == 2))) |
---|
| 10191 | + stream->cur_skip_frame--; |
---|
9983 | 10192 | if (stream->cifdev->chip_id >= CHIP_RV1106_CIF) |
---|
9984 | 10193 | rkcif_modify_frame_skip_config(stream); |
---|
9985 | 10194 | if (stream->cifdev->rdbk_debug && |
---|
.. | .. |
---|
10016 | 10225 | if (stream->id == 0) |
---|
10017 | 10226 | rkcif_send_sof(stream->cifdev); |
---|
10018 | 10227 | stream->frame_idx++; |
---|
10019 | | - cur_time = ktime_get_ns(); |
---|
| 10228 | + cur_time = rkcif_time_get_ns(stream->cifdev); |
---|
10020 | 10229 | stream->readout.readout_time = cur_time - stream->readout.fs_timestamp; |
---|
10021 | 10230 | stream->readout.fs_timestamp = cur_time; |
---|
| 10231 | + stream->buf_wake_up_cnt++; |
---|
| 10232 | + if (stream->frame_idx % 2) |
---|
| 10233 | + stream->fps_stats.frm0_timestamp = rkcif_time_get_ns(stream->cifdev); |
---|
| 10234 | + else |
---|
| 10235 | + stream->fps_stats.frm1_timestamp = rkcif_time_get_ns(stream->cifdev); |
---|
10022 | 10236 | if (stream->cifdev->rdbk_debug && |
---|
10023 | 10237 | stream->frame_idx < 15) |
---|
10024 | 10238 | v4l2_info(&priv->cif_dev->v4l2_dev, |
---|
.. | .. |
---|
10143 | 10357 | if (cif_dev->chip_id < CHIP_RK3588_CIF) |
---|
10144 | 10358 | detect_stream->fs_cnt_in_single_frame++; |
---|
10145 | 10359 | spin_lock_irqsave(&detect_stream->fps_lock, flags); |
---|
10146 | | - detect_stream->readout.fs_timestamp = ktime_get_ns(); |
---|
| 10360 | + detect_stream->readout.fs_timestamp = rkcif_time_get_ns(cif_dev); |
---|
10147 | 10361 | spin_unlock_irqrestore(&detect_stream->fps_lock, flags); |
---|
10148 | 10362 | |
---|
10149 | 10363 | if (cif_dev->sync_cfg.type != RKCIF_NOSYNC_MODE) { |
---|
.. | .. |
---|
10194 | 10408 | "stream[%d] sof %d %lld\n", |
---|
10195 | 10409 | detect_stream->id, |
---|
10196 | 10410 | detect_stream->frame_idx - 1, |
---|
10197 | | - ktime_get_ns()); |
---|
| 10411 | + rkcif_time_get_ns(cif_dev)); |
---|
10198 | 10412 | } |
---|
10199 | 10413 | } |
---|
10200 | 10414 | |
---|
.. | .. |
---|
10253 | 10467 | return is_update; |
---|
10254 | 10468 | } |
---|
10255 | 10469 | |
---|
| 10470 | +static bool rkcif_check_single_dev_stream_on(struct rkcif_hw *hw) |
---|
| 10471 | +{ |
---|
| 10472 | + struct rkcif_device *cif_dev = NULL; |
---|
| 10473 | + struct rkcif_stream *stream = NULL; |
---|
| 10474 | + int i = 0, j = 0; |
---|
| 10475 | + int stream_cnt = 0; |
---|
| 10476 | + |
---|
| 10477 | + if (hw->dev_num == 1) |
---|
| 10478 | + return true; |
---|
| 10479 | + for (i = 0; i < hw->dev_num; i++) { |
---|
| 10480 | + cif_dev = hw->cif_dev[i]; |
---|
| 10481 | + for (j = 0; j < RKCIF_MAX_STREAM_MIPI; j++) { |
---|
| 10482 | + stream = &cif_dev->stream[j]; |
---|
| 10483 | + if (stream->state == RKCIF_STATE_STREAMING || |
---|
| 10484 | + stream->state == RKCIF_STATE_RESET_IN_STREAMING) { |
---|
| 10485 | + stream_cnt++; |
---|
| 10486 | + break; |
---|
| 10487 | + } |
---|
| 10488 | + } |
---|
| 10489 | + } |
---|
| 10490 | + if (stream_cnt > 1) |
---|
| 10491 | + return false; |
---|
| 10492 | + return true; |
---|
| 10493 | +} |
---|
| 10494 | + |
---|
| 10495 | +static void rkcif_get_resmem_head(struct rkcif_device *cif_dev) |
---|
| 10496 | +{ |
---|
| 10497 | + void *resmem_va = phys_to_virt(cif_dev->resmem_pa); |
---|
| 10498 | + struct rkisp_thunderboot_resmem_head *head = NULL; |
---|
| 10499 | + int size = 0; |
---|
| 10500 | + int offset = 0; |
---|
| 10501 | + int ret = 0; |
---|
| 10502 | + int cam_idx = 0; |
---|
| 10503 | + char cam_idx_str[3] = {0}; |
---|
| 10504 | + |
---|
| 10505 | + if (!cif_dev->is_rtt_suspend) |
---|
| 10506 | + return; |
---|
| 10507 | + strscpy(cam_idx_str, cif_dev->terminal_sensor.sd->name + 1, 2); |
---|
| 10508 | + cam_idx_str[2] = '\0'; |
---|
| 10509 | + ret = kstrtoint(cam_idx_str, 0, &cam_idx); |
---|
| 10510 | + if (ret) { |
---|
| 10511 | + v4l2_err(&cif_dev->v4l2_dev, |
---|
| 10512 | + "get camera index fail\n"); |
---|
| 10513 | + return; |
---|
| 10514 | + } |
---|
| 10515 | + |
---|
| 10516 | + if (cif_dev->chip_id == CHIP_RV1106_CIF) { |
---|
| 10517 | + size = sizeof(struct rkisp32_thunderboot_resmem_head); |
---|
| 10518 | + offset = size * cam_idx; |
---|
| 10519 | + } |
---|
| 10520 | + /* currently, thunderboot with mcu only run one camera */ |
---|
| 10521 | + offset = 0; |
---|
| 10522 | + |
---|
| 10523 | + if (size && size < cif_dev->resmem_size) { |
---|
| 10524 | + dma_sync_single_for_cpu(cif_dev->dev, cif_dev->resmem_addr + offset, |
---|
| 10525 | + size, DMA_FROM_DEVICE); |
---|
| 10526 | + if (cif_dev->chip_id == CHIP_RV1106_CIF) { |
---|
| 10527 | + struct rkisp32_thunderboot_resmem_head *tmp = resmem_va + offset; |
---|
| 10528 | + |
---|
| 10529 | + head = &tmp->head; |
---|
| 10530 | + cif_dev->resume_mode = head->rtt_mode; |
---|
| 10531 | + cif_dev->nr_buf_size = head->nr_buf_size; |
---|
| 10532 | + cif_dev->share_mem_size = head->share_mem_size; |
---|
| 10533 | + cif_dev->thunderboot_sensor_num = head->camera_num; |
---|
| 10534 | + } |
---|
| 10535 | + } |
---|
| 10536 | + v4l2_err(&cif_dev->v4l2_dev, |
---|
| 10537 | + "get camera index %02x, resume_mode 0x%x, nr_buf_size %d\n", |
---|
| 10538 | + cam_idx, cif_dev->resume_mode, cif_dev->nr_buf_size); |
---|
| 10539 | +} |
---|
| 10540 | + |
---|
| 10541 | +static int rkcif_subdevs_set_power(struct rkcif_device *cif_dev, int on) |
---|
| 10542 | +{ |
---|
| 10543 | + struct sditf_priv *priv = cif_dev->sditf[0]; |
---|
| 10544 | + int ret = 0; |
---|
| 10545 | + int i = 0; |
---|
| 10546 | + |
---|
| 10547 | + if (cif_dev->terminal_sensor.sd) |
---|
| 10548 | + ret = v4l2_subdev_call(cif_dev->terminal_sensor.sd, |
---|
| 10549 | + core, s_power, on); |
---|
| 10550 | + if (priv && priv->is_combine_mode && cif_dev->sditf_cnt <= RKCIF_MAX_SDITF) { |
---|
| 10551 | + for (i = 0; i < cif_dev->sditf_cnt; i++) { |
---|
| 10552 | + if (cif_dev->sditf[i] && cif_dev->sditf[i]->sensor_sd) |
---|
| 10553 | + v4l2_subdev_call(cif_dev->sditf[i]->sensor_sd, core, |
---|
| 10554 | + s_power, on); |
---|
| 10555 | + } |
---|
| 10556 | + } |
---|
| 10557 | + return ret; |
---|
| 10558 | +} |
---|
| 10559 | + |
---|
| 10560 | +static void rkcif_sensor_quick_streaming_cb(void *data) |
---|
| 10561 | +{ |
---|
| 10562 | + struct v4l2_subdev *subdevs = (struct v4l2_subdev *)data; |
---|
| 10563 | + int on = 1; |
---|
| 10564 | + |
---|
| 10565 | + v4l2_subdev_call(subdevs, core, ioctl, |
---|
| 10566 | + RKMODULE_SET_QUICK_STREAM, &on); |
---|
| 10567 | +} |
---|
| 10568 | + |
---|
| 10569 | +static int rkcif_subdevs_set_stream(struct rkcif_device *cif_dev, int on) |
---|
| 10570 | +{ |
---|
| 10571 | + struct rkcif_pipeline *p = &cif_dev->pipe; |
---|
| 10572 | + struct rkcif_sensor_info *terminal_sensor = &cif_dev->terminal_sensor; |
---|
| 10573 | + struct sditf_priv *priv = cif_dev->sditf[0]; |
---|
| 10574 | + int i = 0; |
---|
| 10575 | + int ret = 0; |
---|
| 10576 | + |
---|
| 10577 | + for (i = 0; i < p->num_subdevs; i++) { |
---|
| 10578 | + if (p->subdevs[i] == terminal_sensor->sd && on) |
---|
| 10579 | + rkcif_set_sof(cif_dev, cif_dev->stream[0].frame_idx); |
---|
| 10580 | + if (p->subdevs[i] == terminal_sensor->sd && |
---|
| 10581 | + cif_dev->chip_id == CHIP_RV1106_CIF) { |
---|
| 10582 | + if (!rk_tb_mcu_is_done() && on) { |
---|
| 10583 | + cif_dev->tb_client.data = p->subdevs[i]; |
---|
| 10584 | + cif_dev->tb_client.cb = rkcif_sensor_quick_streaming_cb; |
---|
| 10585 | + rk_tb_client_register_cb(&cif_dev->tb_client); |
---|
| 10586 | + } else { |
---|
| 10587 | + ret = v4l2_subdev_call(p->subdevs[i], core, ioctl, |
---|
| 10588 | + RKMODULE_SET_QUICK_STREAM, &on); |
---|
| 10589 | + if (ret) |
---|
| 10590 | + v4l2_dbg(1, rkcif_debug, &cif_dev->v4l2_dev, |
---|
| 10591 | + "%s:quick stream %s subdev:%s failed\n", |
---|
| 10592 | + __func__, on ? "on" : "off", |
---|
| 10593 | + p->subdevs[i]->name); |
---|
| 10594 | + } |
---|
| 10595 | + } else { |
---|
| 10596 | + ret = v4l2_subdev_call(p->subdevs[i], video, s_stream, on); |
---|
| 10597 | + if (ret) |
---|
| 10598 | + v4l2_dbg(1, rkcif_debug, &cif_dev->v4l2_dev, |
---|
| 10599 | + "%s:stream %s subdev:%s failed\n", |
---|
| 10600 | + __func__, on ? "on" : "off", p->subdevs[i]->name); |
---|
| 10601 | + } |
---|
| 10602 | + } |
---|
| 10603 | + |
---|
| 10604 | + if (priv && priv->is_combine_mode && cif_dev->sditf_cnt <= RKCIF_MAX_SDITF) { |
---|
| 10605 | + for (i = 0; i < cif_dev->sditf_cnt; i++) { |
---|
| 10606 | + if (cif_dev->sditf[i] && cif_dev->sditf[i]->sensor_sd) { |
---|
| 10607 | + ret = v4l2_subdev_call(cif_dev->sditf[i]->sensor_sd, video, s_stream, on); |
---|
| 10608 | + if (ret) |
---|
| 10609 | + v4l2_dbg(1, rkcif_debug, &cif_dev->v4l2_dev, |
---|
| 10610 | + "%s:stream %s subdev:%s failed\n", |
---|
| 10611 | + __func__, on ? "on" : "off", |
---|
| 10612 | + cif_dev->sditf[i]->sensor_sd->name); |
---|
| 10613 | + } |
---|
| 10614 | + } |
---|
| 10615 | + } |
---|
| 10616 | + return ret; |
---|
| 10617 | +} |
---|
| 10618 | + |
---|
| 10619 | +int rkcif_stream_suspend(struct rkcif_device *cif_dev, int mode) |
---|
| 10620 | +{ |
---|
| 10621 | + struct rkcif_stream *stream = NULL; |
---|
| 10622 | + struct rkcif_resume_info *resume_info = &cif_dev->reset_work.resume_info; |
---|
| 10623 | + struct sditf_priv *priv = cif_dev->sditf[0]; |
---|
| 10624 | + int ret = 0; |
---|
| 10625 | + int i = 0; |
---|
| 10626 | + int sof_cnt = 0; |
---|
| 10627 | + int on = 0; |
---|
| 10628 | + int suspend_cnt = 0; |
---|
| 10629 | + |
---|
| 10630 | + mutex_lock(&cif_dev->stream_lock); |
---|
| 10631 | + |
---|
| 10632 | + if (priv && priv->mode.rdbk_mode == RKISP_VICAP_ONLINE && mode == RKCIF_RESUME_CIF) |
---|
| 10633 | + goto out_suspend; |
---|
| 10634 | + |
---|
| 10635 | + for (i = 0; i < RKCIF_MAX_STREAM_MIPI; i++) { |
---|
| 10636 | + stream = &cif_dev->stream[i]; |
---|
| 10637 | + |
---|
| 10638 | + if (stream->state == RKCIF_STATE_STREAMING) { |
---|
| 10639 | + suspend_cnt++; |
---|
| 10640 | + v4l2_dbg(1, rkcif_debug, &cif_dev->v4l2_dev, |
---|
| 10641 | + "stream[%d] stopping\n", stream->id); |
---|
| 10642 | + if (stream->dma_en) { |
---|
| 10643 | + stream->stopping = true; |
---|
| 10644 | + ret = wait_event_timeout(stream->wq_stopped, |
---|
| 10645 | + stream->state != RKCIF_STATE_STREAMING, |
---|
| 10646 | + msecs_to_jiffies(500)); |
---|
| 10647 | + if (!ret) { |
---|
| 10648 | + rkcif_stream_stop(stream); |
---|
| 10649 | + stream->stopping = false; |
---|
| 10650 | + } |
---|
| 10651 | + } else { |
---|
| 10652 | + rkcif_stream_stop(stream); |
---|
| 10653 | + } |
---|
| 10654 | + |
---|
| 10655 | + if (stream->id == RKCIF_STREAM_MIPI_ID0) { |
---|
| 10656 | + sof_cnt = rkcif_get_sof(cif_dev); |
---|
| 10657 | + v4l2_dbg(1, rkcif_debug, &cif_dev->v4l2_dev, |
---|
| 10658 | + "%s: stream[%d] sync frmid & csi_sof, frm_id:%d, csi_sof:%d\n", |
---|
| 10659 | + __func__, |
---|
| 10660 | + stream->id, |
---|
| 10661 | + stream->frame_idx, |
---|
| 10662 | + sof_cnt); |
---|
| 10663 | + |
---|
| 10664 | + resume_info->frm_sync_seq = stream->frame_idx; |
---|
| 10665 | + } |
---|
| 10666 | + |
---|
| 10667 | + stream->state = RKCIF_STATE_RESET_IN_STREAMING; |
---|
| 10668 | + stream->is_fs_fe_not_paired = false; |
---|
| 10669 | + stream->fs_cnt_in_single_frame = 0; |
---|
| 10670 | + |
---|
| 10671 | + v4l2_dbg(1, rkcif_debug, &cif_dev->v4l2_dev, |
---|
| 10672 | + "%s stop stream[%d] in streaming, frm_id:%d, csi_sof:%d\n", |
---|
| 10673 | + __func__, stream->id, stream->frame_idx, rkcif_get_sof(cif_dev)); |
---|
| 10674 | + |
---|
| 10675 | + } |
---|
| 10676 | + } |
---|
| 10677 | + |
---|
| 10678 | + if (suspend_cnt == 0) |
---|
| 10679 | + goto out_suspend; |
---|
| 10680 | + |
---|
| 10681 | + if (!cif_dev->resume_mode) |
---|
| 10682 | + rkcif_subdevs_set_power(cif_dev, on); |
---|
| 10683 | + |
---|
| 10684 | + rkcif_subdevs_set_stream(cif_dev, on); |
---|
| 10685 | + |
---|
| 10686 | +out_suspend: |
---|
| 10687 | + mutex_unlock(&cif_dev->stream_lock); |
---|
| 10688 | + return 0; |
---|
| 10689 | +} |
---|
| 10690 | + |
---|
| 10691 | +int rkcif_stream_resume(struct rkcif_device *cif_dev, int mode) |
---|
| 10692 | +{ |
---|
| 10693 | + struct rkcif_stream *stream = NULL; |
---|
| 10694 | + struct sditf_priv *priv = cif_dev->sditf[0]; |
---|
| 10695 | + struct v4l2_subdev *sd = NULL; |
---|
| 10696 | + int ret = 0; |
---|
| 10697 | + int i = 0; |
---|
| 10698 | + u32 capture_mode = 0; |
---|
| 10699 | + int on = 1; |
---|
| 10700 | + int resume_cnt = 0; |
---|
| 10701 | + unsigned long flags; |
---|
| 10702 | + bool is_single_dev = false; |
---|
| 10703 | + bool is_can_be_online = false; |
---|
| 10704 | + struct rkisp_vicap_mode vicap_mode; |
---|
| 10705 | + |
---|
| 10706 | + mutex_lock(&cif_dev->stream_lock); |
---|
| 10707 | + |
---|
| 10708 | + rkcif_get_resmem_head(cif_dev); |
---|
| 10709 | + is_single_dev = rkcif_check_single_dev_stream_on(cif_dev->hw_dev); |
---|
| 10710 | + is_can_be_online = rkcif_check_can_be_online(cif_dev); |
---|
| 10711 | + if (cif_dev->resume_mode == RKISP_RTT_MODE_ONE_FRAME) { |
---|
| 10712 | + if (cif_dev->is_rtt_suspend) { |
---|
| 10713 | + capture_mode = RKCIF_STREAM_MODE_TOISP_RDBK; |
---|
| 10714 | + if (priv) |
---|
| 10715 | + priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AUTO; |
---|
| 10716 | + } else { |
---|
| 10717 | + if (priv && priv->mode.rdbk_mode == RKISP_VICAP_ONLINE) { |
---|
| 10718 | + if (cif_dev->chip_id == CHIP_RV1106_CIF) { |
---|
| 10719 | + capture_mode = RKCIF_STREAM_MODE_TOISP_RDBK; |
---|
| 10720 | + priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AUTO; |
---|
| 10721 | + } else { |
---|
| 10722 | + capture_mode = RKCIF_STREAM_MODE_TOISP; |
---|
| 10723 | + } |
---|
| 10724 | + } else if (priv && |
---|
| 10725 | + (priv->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO || |
---|
| 10726 | + priv->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO_ONE_FRAME)) { |
---|
| 10727 | + capture_mode = RKCIF_STREAM_MODE_TOISP_RDBK; |
---|
| 10728 | + } else { |
---|
| 10729 | + capture_mode = RKCIF_STREAM_MODE_CAPTURE; |
---|
| 10730 | + } |
---|
| 10731 | + } |
---|
| 10732 | + } else if (cif_dev->resume_mode == RKISP_RTT_MODE_MULTI_FRAME) { |
---|
| 10733 | + if (is_single_dev && is_can_be_online) { |
---|
| 10734 | + capture_mode = RKCIF_STREAM_MODE_TOISP; |
---|
| 10735 | + if (priv) |
---|
| 10736 | + priv->mode.rdbk_mode = RKISP_VICAP_ONLINE; |
---|
| 10737 | + } else { |
---|
| 10738 | + if (cif_dev->is_thunderboot) { |
---|
| 10739 | + capture_mode = RKCIF_STREAM_MODE_TOISP_RDBK; |
---|
| 10740 | + if (priv) |
---|
| 10741 | + priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AUTO; |
---|
| 10742 | + } else { |
---|
| 10743 | + capture_mode = RKCIF_STREAM_MODE_CAPTURE; |
---|
| 10744 | + if (priv) |
---|
| 10745 | + priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AIQ; |
---|
| 10746 | + } |
---|
| 10747 | + } |
---|
| 10748 | + } else { |
---|
| 10749 | + if (priv && priv->mode.rdbk_mode == RKISP_VICAP_ONLINE) |
---|
| 10750 | + capture_mode = RKCIF_STREAM_MODE_TOISP; |
---|
| 10751 | + else if (priv && |
---|
| 10752 | + (priv->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO || |
---|
| 10753 | + priv->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO_ONE_FRAME)) |
---|
| 10754 | + capture_mode = RKCIF_STREAM_MODE_TOISP_RDBK; |
---|
| 10755 | + else |
---|
| 10756 | + capture_mode = RKCIF_STREAM_MODE_CAPTURE; |
---|
| 10757 | + } |
---|
| 10758 | + if (priv && priv->mode.rdbk_mode == RKISP_VICAP_ONLINE && mode == RKCIF_RESUME_CIF) |
---|
| 10759 | + goto out_resume; |
---|
| 10760 | + |
---|
| 10761 | + for (i = 0; i < RKCIF_MAX_STREAM_MIPI; i++) { |
---|
| 10762 | + stream = &cif_dev->stream[i]; |
---|
| 10763 | + if (stream->state != RKCIF_STATE_RESET_IN_STREAMING) |
---|
| 10764 | + continue; |
---|
| 10765 | + |
---|
| 10766 | + stream->fs_cnt_in_single_frame = 0; |
---|
| 10767 | + if (cif_dev->resume_mode == RKISP_RTT_MODE_ONE_FRAME) |
---|
| 10768 | + stream->is_single_cap = true; |
---|
| 10769 | + spin_lock_irqsave(&stream->vbq_lock, flags); |
---|
| 10770 | + if (!priv || priv->mode.rdbk_mode == RKISP_VICAP_RDBK_AIQ) { |
---|
| 10771 | + if (stream->cif_fmt_in->field == V4L2_FIELD_INTERLACED) { |
---|
| 10772 | + if (stream->curr_buf == stream->next_buf) { |
---|
| 10773 | + if (stream->curr_buf) |
---|
| 10774 | + list_add_tail(&stream->curr_buf->queue, &stream->buf_head); |
---|
| 10775 | + } else { |
---|
| 10776 | + if (stream->curr_buf) |
---|
| 10777 | + list_add_tail(&stream->curr_buf->queue, &stream->buf_head); |
---|
| 10778 | + if (stream->next_buf) |
---|
| 10779 | + list_add_tail(&stream->next_buf->queue, &stream->buf_head); |
---|
| 10780 | + } |
---|
| 10781 | + stream->curr_buf = NULL; |
---|
| 10782 | + stream->next_buf = NULL; |
---|
| 10783 | + } |
---|
| 10784 | + } else { |
---|
| 10785 | + if (priv->mode.rdbk_mode == RKISP_VICAP_ONLINE) { |
---|
| 10786 | + if (stream->curr_buf_toisp == stream->next_buf_toisp) { |
---|
| 10787 | + if (stream->curr_buf_toisp) |
---|
| 10788 | + list_add_tail(&stream->curr_buf_toisp->list, &stream->rx_buf_head); |
---|
| 10789 | + } else { |
---|
| 10790 | + if (stream->curr_buf_toisp) |
---|
| 10791 | + list_add_tail(&stream->curr_buf_toisp->list, &stream->rx_buf_head); |
---|
| 10792 | + if (stream->next_buf_toisp) |
---|
| 10793 | + list_add_tail(&stream->next_buf_toisp->list, &stream->rx_buf_head); |
---|
| 10794 | + } |
---|
| 10795 | + stream->curr_buf_toisp = NULL; |
---|
| 10796 | + stream->next_buf_toisp = NULL; |
---|
| 10797 | + } else { |
---|
| 10798 | + if (stream->curr_buf_toisp == stream->next_buf_toisp) { |
---|
| 10799 | + if (stream->curr_buf_toisp) |
---|
| 10800 | + list_add_tail(&stream->curr_buf_toisp->list, &stream->rx_buf_head); |
---|
| 10801 | + } else { |
---|
| 10802 | + if (stream->curr_buf_toisp) |
---|
| 10803 | + list_add_tail(&stream->curr_buf_toisp->list, &stream->rx_buf_head); |
---|
| 10804 | + if (stream->next_buf_toisp) |
---|
| 10805 | + list_add_tail(&stream->next_buf_toisp->list, &stream->rx_buf_head); |
---|
| 10806 | + } |
---|
| 10807 | + stream->curr_buf_toisp = NULL; |
---|
| 10808 | + stream->next_buf_toisp = NULL; |
---|
| 10809 | + } |
---|
| 10810 | + } |
---|
| 10811 | + |
---|
| 10812 | + spin_unlock_irqrestore(&stream->vbq_lock, flags); |
---|
| 10813 | + |
---|
| 10814 | + if (priv) { |
---|
| 10815 | + if (priv->mode.rdbk_mode == RKISP_VICAP_ONLINE) { |
---|
| 10816 | + sditf_change_to_online(priv); |
---|
| 10817 | + if (cif_dev->resume_mode == RKISP_RTT_MODE_MULTI_FRAME && |
---|
| 10818 | + stream->rx_buf_num && |
---|
| 10819 | + (priv->hdr_cfg.hdr_mode == NO_HDR || |
---|
| 10820 | + (priv->hdr_cfg.hdr_mode == HDR_X2 && stream->id == 1) || |
---|
| 10821 | + (priv->hdr_cfg.hdr_mode == HDR_X3 && stream->id == 2))) |
---|
| 10822 | + rkcif_free_rx_buf(stream, priv->buf_num); |
---|
| 10823 | + else if (!stream->rx_buf_num && |
---|
| 10824 | + ((priv->hdr_cfg.hdr_mode == HDR_X2 && stream->id == 0) || |
---|
| 10825 | + (priv->hdr_cfg.hdr_mode == HDR_X3 && (stream->id == 0 || stream->id == 1)))) |
---|
| 10826 | + rkcif_init_rx_buf(stream, 1); |
---|
| 10827 | + } else { |
---|
| 10828 | + if (stream->is_single_cap && stream->id == 0) { |
---|
| 10829 | + vicap_mode = priv->mode; |
---|
| 10830 | + vicap_mode.rdbk_mode = RKISP_VICAP_RDBK_AUTO_ONE_FRAME; |
---|
| 10831 | + sd = get_rkisp_sd(priv); |
---|
| 10832 | + if (sd) { |
---|
| 10833 | + ret = v4l2_subdev_call(sd, core, ioctl, |
---|
| 10834 | + RKISP_VICAP_CMD_MODE, &vicap_mode); |
---|
| 10835 | + if (ret) |
---|
| 10836 | + v4l2_err(&cif_dev->v4l2_dev, |
---|
| 10837 | + "set isp work mode rdbk aotu oneframe fail\n"); |
---|
| 10838 | + |
---|
| 10839 | + } |
---|
| 10840 | + } |
---|
| 10841 | + sditf_disable_immediately(priv); |
---|
| 10842 | + if (!stream->rx_buf_num && |
---|
| 10843 | + capture_mode == RKCIF_STREAM_MODE_TOISP_RDBK) { |
---|
| 10844 | + if (cif_dev->resume_mode == RKISP_RTT_MODE_ONE_FRAME) |
---|
| 10845 | + rkcif_init_rx_buf(stream, 1); |
---|
| 10846 | + else |
---|
| 10847 | + rkcif_init_rx_buf(stream, priv->buf_num); |
---|
| 10848 | + } |
---|
| 10849 | + } |
---|
| 10850 | + } |
---|
| 10851 | + |
---|
| 10852 | + stream->lack_buf_cnt = 0; |
---|
| 10853 | + if (cif_dev->active_sensor && |
---|
| 10854 | + (cif_dev->active_sensor->mbus.type == V4L2_MBUS_CSI2_DPHY || |
---|
| 10855 | + cif_dev->active_sensor->mbus.type == V4L2_MBUS_CSI2_CPHY || |
---|
| 10856 | + cif_dev->active_sensor->mbus.type == V4L2_MBUS_CCP2)) |
---|
| 10857 | + ret = rkcif_csi_stream_start(stream, capture_mode); |
---|
| 10858 | + else |
---|
| 10859 | + ret = rkcif_stream_start(stream, capture_mode); |
---|
| 10860 | + if (ret) |
---|
| 10861 | + v4l2_err(&cif_dev->v4l2_dev, "%s:resume stream[%d] failed\n", |
---|
| 10862 | + __func__, stream->id); |
---|
| 10863 | + |
---|
| 10864 | + resume_cnt++; |
---|
| 10865 | + stream->cur_skip_frame = stream->skip_frame; |
---|
| 10866 | + v4l2_dbg(1, rkcif_debug, &cif_dev->v4l2_dev, |
---|
| 10867 | + "resume stream[%d], frm_idx:%d, csi_sof:%d\n", |
---|
| 10868 | + stream->id, stream->frame_idx, |
---|
| 10869 | + rkcif_get_sof(cif_dev)); |
---|
| 10870 | + } |
---|
| 10871 | + |
---|
| 10872 | + if (resume_cnt == 0) |
---|
| 10873 | + goto out_resume; |
---|
| 10874 | + |
---|
| 10875 | + if (!cif_dev->resume_mode) |
---|
| 10876 | + rkcif_subdevs_set_power(cif_dev, on); |
---|
| 10877 | + |
---|
| 10878 | + atomic_set(&cif_dev->streamoff_cnt, 0); |
---|
| 10879 | + rkcif_subdevs_set_stream(cif_dev, on); |
---|
| 10880 | + |
---|
| 10881 | + if (cif_dev->chip_id < CHIP_RK3588_CIF) |
---|
| 10882 | + rkcif_start_luma(&cif_dev->luma_vdev, |
---|
| 10883 | + cif_dev->stream[RKCIF_STREAM_MIPI_ID0].cif_fmt_in); |
---|
| 10884 | +out_resume: |
---|
| 10885 | + mutex_unlock(&cif_dev->stream_lock); |
---|
| 10886 | + return 0; |
---|
| 10887 | +} |
---|
| 10888 | + |
---|
10256 | 10889 | void rkcif_err_print_work(struct work_struct *work) |
---|
10257 | 10890 | { |
---|
10258 | 10891 | struct rkcif_err_state_work *err_state_work = container_of(work, |
---|
.. | .. |
---|
10268 | 10901 | u64 cur_time = 0; |
---|
10269 | 10902 | bool is_print = false; |
---|
10270 | 10903 | |
---|
10271 | | - cur_time = ktime_get_ns(); |
---|
| 10904 | + cur_time = rkcif_time_get_ns(dev); |
---|
10272 | 10905 | if (err_state_work->last_timestamp == 0) { |
---|
10273 | 10906 | is_print = true; |
---|
10274 | 10907 | } else { |
---|
.. | .. |
---|
10312 | 10945 | v4l2_err(&dev->v4l2_dev, |
---|
10313 | 10946 | "stream[3], frm0/frm1 end simultaneously,frm id:%d, cnt %llu\n", |
---|
10314 | 10947 | dev->stream[3].frame_idx, dev->irq_stats.trig_simult_cnt[3]); |
---|
10315 | | - if (err_state & RKCIF_ERR_SIZE) |
---|
10316 | | - v4l2_err(&dev->v4l2_dev, |
---|
10317 | | - "ERROR: csi size err, intstat:0x%x, lastline:0x%x, cnt %llu\n", |
---|
10318 | | - intstat, lastline, dev->irq_stats.csi_size_err_cnt); |
---|
| 10948 | + if (err_state & RKCIF_ERR_SIZE) { |
---|
| 10949 | + if (dev->chip_id >= CHIP_RK3588_CIF) |
---|
| 10950 | + v4l2_err(&dev->v4l2_dev, |
---|
| 10951 | + "ERROR: csi size err, intstat:0x%x, size:0x%x,0x%x,0x%x,0x%x, cnt %llu\n", |
---|
| 10952 | + intstat, err_state_work->size_id0, err_state_work->size_id1, |
---|
| 10953 | + err_state_work->size_id2, err_state_work->size_id3, |
---|
| 10954 | + dev->irq_stats.csi_size_err_cnt); |
---|
| 10955 | + else |
---|
| 10956 | + v4l2_err(&dev->v4l2_dev, |
---|
| 10957 | + "ERROR: csi size err, intstat:0x%x, lastline:0x%x, cnt %llu\n", |
---|
| 10958 | + intstat, lastline, dev->irq_stats.csi_size_err_cnt); |
---|
| 10959 | + } |
---|
10319 | 10960 | if (err_state & RKCIF_ERR_OVERFLOW) |
---|
10320 | 10961 | v4l2_err(&dev->v4l2_dev, |
---|
10321 | 10962 | "ERROR: csi fifo overflow, intstat:0x%x, lastline:0x%x, cnt %llu\n", |
---|
.. | .. |
---|
10349 | 10990 | unsigned long flags; |
---|
10350 | 10991 | bool is_update = false; |
---|
10351 | 10992 | int ret = 0; |
---|
| 10993 | + int on = 0; |
---|
10352 | 10994 | |
---|
10353 | 10995 | if (!cif_dev->active_sensor) |
---|
10354 | 10996 | return; |
---|
.. | .. |
---|
10369 | 11011 | if (intstat) { |
---|
10370 | 11012 | rkcif_write_register(cif_dev, CIF_REG_MIPI_LVDS_INTSTAT, intstat); |
---|
10371 | 11013 | v4l2_dbg(2, rkcif_debug, &cif_dev->v4l2_dev, |
---|
10372 | | - "intstat 0x%x\n", |
---|
10373 | | - intstat); |
---|
| 11014 | + "intstat 0x%x\n", intstat); |
---|
10374 | 11015 | } else { |
---|
10375 | 11016 | return; |
---|
10376 | 11017 | } |
---|
10377 | 11018 | |
---|
10378 | 11019 | if (intstat & CSI_SIZE_ERR) { |
---|
| 11020 | + if (cif_dev->chip_id >= CHIP_RK3588_CIF) { |
---|
| 11021 | + cif_dev->err_state_work.size_id0 = rkcif_read_register(cif_dev, |
---|
| 11022 | + CIF_REG_MIPI_FRAME_SIZE_ID0); |
---|
| 11023 | + cif_dev->err_state_work.size_id1 = rkcif_read_register(cif_dev, |
---|
| 11024 | + CIF_REG_MIPI_FRAME_SIZE_ID1); |
---|
| 11025 | + cif_dev->err_state_work.size_id2 = rkcif_read_register(cif_dev, |
---|
| 11026 | + CIF_REG_MIPI_FRAME_SIZE_ID2); |
---|
| 11027 | + cif_dev->err_state_work.size_id3 = rkcif_read_register(cif_dev, |
---|
| 11028 | + CIF_REG_MIPI_FRAME_SIZE_ID3); |
---|
| 11029 | + } |
---|
10379 | 11030 | cif_dev->irq_stats.csi_size_err_cnt++; |
---|
10380 | 11031 | cif_dev->err_state |= RKCIF_ERR_SIZE; |
---|
10381 | 11032 | rkcif_write_register_or(cif_dev, CIF_REG_MIPI_LVDS_CTRL, 0x000A0000); |
---|
.. | .. |
---|
10388 | 11039 | return; |
---|
10389 | 11040 | } |
---|
10390 | 11041 | |
---|
10391 | | - if (intstat & CSI_BANDWIDTH_LACK_V1) { |
---|
| 11042 | + if (intstat & CSI_BANDWIDTH_LACK_V1 && |
---|
| 11043 | + cif_dev->intr_mask & CSI_BANDWIDTH_LACK_V1) { |
---|
10392 | 11044 | cif_dev->irq_stats.csi_bwidth_lack_cnt++; |
---|
10393 | 11045 | cif_dev->err_state |= RKCIF_ERR_BANDWIDTH_LACK; |
---|
| 11046 | + if (cif_dev->irq_stats.csi_bwidth_lack_cnt > 10) { |
---|
| 11047 | + rkcif_write_register_and(cif_dev, CIF_REG_MIPI_LVDS_INTEN, ~(CSI_BANDWIDTH_LACK_V1)); |
---|
| 11048 | + cif_dev->intr_mask &= ~(CSI_BANDWIDTH_LACK_V1); |
---|
| 11049 | + schedule_delayed_work(&cif_dev->work_deal_err, msecs_to_jiffies(1000)); |
---|
| 11050 | + } |
---|
10394 | 11051 | } |
---|
10395 | 11052 | |
---|
10396 | 11053 | if (intstat & CSI_ALL_ERROR_INTEN_V1) { |
---|
.. | .. |
---|
10445 | 11102 | stream->id, |
---|
10446 | 11103 | stream->frame_idx - 1, |
---|
10447 | 11104 | stream->frame_phase, |
---|
10448 | | - ktime_get_ns()); |
---|
| 11105 | + rkcif_time_get_ns(cif_dev)); |
---|
10449 | 11106 | if (stream->is_finish_stop_dma && stream->is_wait_dma_stop) { |
---|
10450 | 11107 | stream->is_wait_dma_stop = false; |
---|
10451 | 11108 | wake_up(&stream->wq_stopped); |
---|
10452 | 11109 | stream->is_finish_stop_dma = false; |
---|
10453 | 11110 | continue; |
---|
10454 | 11111 | } |
---|
| 11112 | + |
---|
| 11113 | + if (stream->is_finish_stop_dma && stream->is_wait_stop_complete) { |
---|
| 11114 | + stream->is_finish_stop_dma = false; |
---|
| 11115 | + stream->is_wait_stop_complete = false; |
---|
| 11116 | + complete(&stream->stop_complete); |
---|
| 11117 | + } |
---|
| 11118 | + |
---|
10455 | 11119 | if (stream->crop_dyn_en) |
---|
10456 | 11120 | rkcif_dynamic_crop(stream); |
---|
10457 | 11121 | |
---|
.. | .. |
---|
10476 | 11140 | stream->dma_en); |
---|
10477 | 11141 | rkcif_update_stream_rockit(cif_dev, stream, mipi_id); |
---|
10478 | 11142 | } |
---|
| 11143 | + if (stream->is_single_cap && !stream->cur_skip_frame) { |
---|
| 11144 | + if (stream->dma_en & RKCIF_DMAEN_BY_ISP) |
---|
| 11145 | + stream->to_stop_dma = RKCIF_DMAEN_BY_ISP; |
---|
| 11146 | + else if (stream->dma_en & RKCIF_DMAEN_BY_VICAP) |
---|
| 11147 | + stream->to_stop_dma = RKCIF_DMAEN_BY_VICAP; |
---|
| 11148 | + else if (stream->dma_en & RKCIF_DMAEN_BY_ROCKIT) |
---|
| 11149 | + stream->to_stop_dma = RKCIF_DMAEN_BY_ROCKIT; |
---|
| 11150 | + rkcif_stop_dma_capture(stream); |
---|
| 11151 | + stream->is_single_cap = false; |
---|
| 11152 | + if ((cif_dev->hdr.hdr_mode == NO_HDR && atomic_read(&cif_dev->streamoff_cnt) == 1) || |
---|
| 11153 | + (cif_dev->hdr.hdr_mode == HDR_X2 && atomic_read(&cif_dev->streamoff_cnt) == 2) || |
---|
| 11154 | + (cif_dev->hdr.hdr_mode == HDR_X3 && atomic_read(&cif_dev->streamoff_cnt) == 3)) { |
---|
| 11155 | + rkcif_dphy_quick_stream(stream->cifdev, on); |
---|
| 11156 | + cif_dev->sensor_work.on = 0; |
---|
| 11157 | + schedule_work(&cif_dev->sensor_work.work); |
---|
| 11158 | + } |
---|
| 11159 | + } |
---|
| 11160 | + |
---|
| 11161 | + if (stream->cur_skip_frame) |
---|
| 11162 | + stream->cur_skip_frame--; |
---|
10479 | 11163 | |
---|
10480 | 11164 | if (cif_dev->chip_id >= CHIP_RV1106_CIF) |
---|
10481 | 11165 | rkcif_modify_frame_skip_config(stream); |
---|
.. | .. |
---|
10490 | 11174 | } |
---|
10491 | 11175 | |
---|
10492 | 11176 | spin_lock_irqsave(&stream->vbq_lock, flags); |
---|
10493 | | - if (!(stream->dma_en & RKCIF_DMAEN_BY_ISP) && stream->lack_buf_cnt == 2) { |
---|
| 11177 | + if (!(stream->cur_stream_mode & RKCIF_STREAM_MODE_TOISP) && |
---|
| 11178 | + stream->lack_buf_cnt == 2) { |
---|
| 11179 | + stream->to_stop_dma = RKCIF_DMAEN_BY_VICAP; |
---|
| 11180 | + rkcif_stop_dma_capture(stream); |
---|
10494 | 11181 | v4l2_dbg(4, rkcif_debug, &cif_dev->v4l2_dev, |
---|
10495 | 11182 | "stream[%d] to stop dma, lack_buf_cnt %d\n", |
---|
10496 | 11183 | stream->id, stream->lack_buf_cnt); |
---|
10497 | | - stream->to_stop_dma = RKCIF_DMAEN_BY_VICAP; |
---|
10498 | | - rkcif_stop_dma_capture(stream); |
---|
10499 | 11184 | } |
---|
10500 | 11185 | spin_unlock_irqrestore(&stream->vbq_lock, flags); |
---|
10501 | 11186 | if (stream->to_en_scale) { |
---|
.. | .. |
---|
10522 | 11207 | if (intstat & CSI_START_INTSTAT(i)) { |
---|
10523 | 11208 | stream = &cif_dev->stream[i]; |
---|
10524 | 11209 | if (i == 0) { |
---|
10525 | | - rkcif_deal_sof(cif_dev); |
---|
| 11210 | + if (!stream->cur_skip_frame) |
---|
| 11211 | + rkcif_deal_sof(cif_dev); |
---|
10526 | 11212 | } else { |
---|
10527 | 11213 | spin_lock_irqsave(&stream->fps_lock, flags); |
---|
10528 | | - stream->readout.fs_timestamp = ktime_get_ns(); |
---|
| 11214 | + stream->readout.fs_timestamp = rkcif_time_get_ns(cif_dev); |
---|
10529 | 11215 | stream->frame_idx++; |
---|
10530 | 11216 | spin_unlock_irqrestore(&stream->fps_lock, flags); |
---|
10531 | 11217 | } |
---|
.. | .. |
---|
10556 | 11242 | v4l2_info(&cif_dev->v4l2_dev, |
---|
10557 | 11243 | "line int %lld\n", |
---|
10558 | 11244 | stream->line_int_cnt); |
---|
10559 | | - if (cif_dev->sditf[0] && cif_dev->sditf[0]->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO) |
---|
| 11245 | + if (cif_dev->sditf[0] && (cif_dev->sditf[0]->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO || |
---|
| 11246 | + cif_dev->sditf[0]->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO_ONE_FRAME)) |
---|
10560 | 11247 | rkcif_line_wake_up_rdbk(stream, stream->id); |
---|
10561 | 11248 | else |
---|
10562 | 11249 | rkcif_line_wake_up(stream, stream->id); |
---|
.. | .. |
---|
10665 | 11352 | |
---|
10666 | 11353 | if (intstat & DVP_FRAME0_START_ID0 || intstat & DVP_FRAME1_START_ID0) { |
---|
10667 | 11354 | stream->is_in_vblank = false; |
---|
10668 | | - rkcif_deal_sof(cif_dev); |
---|
| 11355 | + if (!stream->cur_skip_frame) |
---|
| 11356 | + rkcif_deal_sof(cif_dev); |
---|
10669 | 11357 | } |
---|
10670 | 11358 | |
---|
10671 | 11359 | if (stream->crop_dyn_en) |
---|
.. | .. |
---|
10777 | 11465 | if (intstat & CSI_START_INTSTAT(i)) { |
---|
10778 | 11466 | stream = &cif_dev->stream[i]; |
---|
10779 | 11467 | if (i == 0) { |
---|
10780 | | - rkcif_deal_sof(cif_dev); |
---|
| 11468 | + if (!stream->cur_skip_frame) |
---|
| 11469 | + rkcif_deal_sof(cif_dev); |
---|
10781 | 11470 | } else { |
---|
10782 | 11471 | spin_lock_irqsave(&stream->fps_lock, flags); |
---|
10783 | | - stream->readout.fs_timestamp = ktime_get_ns(); |
---|
| 11472 | + stream->readout.fs_timestamp = rkcif_time_get_ns(cif_dev); |
---|
10784 | 11473 | stream->frame_idx++; |
---|
10785 | 11474 | spin_unlock_irqrestore(&stream->fps_lock, flags); |
---|
10786 | 11475 | } |
---|
.. | .. |
---|
10907 | 11596 | |
---|
10908 | 11597 | spin_lock_irqsave(&stream->fps_lock, flags); |
---|
10909 | 11598 | if (stream->frame_phase & CIF_CSI_FRAME0_READY) |
---|
10910 | | - stream->fps_stats.frm0_timestamp = ktime_get_ns(); |
---|
| 11599 | + stream->fps_stats.frm0_timestamp = rkcif_time_get_ns(cif_dev); |
---|
10911 | 11600 | else if (stream->frame_phase & CIF_CSI_FRAME1_READY) |
---|
10912 | | - stream->fps_stats.frm1_timestamp = ktime_get_ns(); |
---|
| 11601 | + stream->fps_stats.frm1_timestamp = rkcif_time_get_ns(cif_dev); |
---|
10913 | 11602 | spin_unlock_irqrestore(&stream->fps_lock, flags); |
---|
10914 | 11603 | |
---|
10915 | 11604 | ret = rkcif_assign_new_buffer_oneframe(stream, |
---|
.. | .. |
---|
10980 | 11669 | (cif_dev->dvp_sof_in_oneframe == 0)) { |
---|
10981 | 11670 | if ((intstat & (PRE_INF_FRAME_END | PST_INF_FRAME_END)) == 0x0) { |
---|
10982 | 11671 | if ((intstat & INTSTAT_ERR) == 0x0) { |
---|
10983 | | - rkcif_deal_sof(cif_dev); |
---|
| 11672 | + if (!stream->cur_skip_frame) |
---|
| 11673 | + rkcif_deal_sof(cif_dev); |
---|
10984 | 11674 | int_en = rkcif_read_register(cif_dev, CIF_REG_DVP_INTEN); |
---|
10985 | 11675 | int_en &= ~LINE_INT_EN; |
---|
10986 | 11676 | rkcif_write_register(cif_dev, CIF_REG_DVP_INTEN, int_en); |
---|