~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,15 +1,6 @@
	1	+/* SPDX-License-Identifier: GPL-2.0-or-later */
1	2	/*
2	3	* Copyright (C) 2006-2009 Texas Instruments Inc
3		- *
4		- * This program is free software; you can redistribute it and/or modify
5		- * it under the terms of the GNU General Public License as published by
6		- * the Free Software Foundation; either version 2 of the License, or
7		- * (at your option) any later version.
8		- *
9		- * This program is distributed in the hope that it will be useful,
10		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
11		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12		- * GNU General Public License for more details.
13	4	*/
14	5	#ifndef _DM644X_CCDC_REGS_H
15	6	#define _DM644X_CCDC_REGS_H
..	..	@@ -75,13 +66,13 @@
75	66	#define CCDC_PIX_FMT_MASK 3
76	67	#define CCDC_PIX_FMT_SHIFT 12
77	68	#define CCDC_VP2SDR_DISABLE 0xFFFBFFFF
78		-#define CCDC_WEN_ENABLE (1 << 17)
	69	+#define CCDC_WEN_ENABLE BIT(17)
79	70	#define CCDC_SDR2RSZ_DISABLE 0xFFF7FFFF
80		-#define CCDC_VDHDEN_ENABLE (1 << 16)
81		-#define CCDC_LPF_ENABLE (1 << 14)
82		-#define CCDC_ALAW_ENABLE (1 << 3)
	71	+#define CCDC_VDHDEN_ENABLE BIT(16)
	72	+#define CCDC_LPF_ENABLE BIT(14)
	73	+#define CCDC_ALAW_ENABLE BIT(3)
83	74	#define CCDC_ALAW_GAMMA_WD_MASK 7
84		-#define CCDC_BLK_CLAMP_ENABLE (1 << 31)
	75	+#define CCDC_BLK_CLAMP_ENABLE BIT(31)
85	76	#define CCDC_BLK_SGAIN_MASK 0x1F
86	77	#define CCDC_BLK_ST_PXL_MASK 0x7FFF
87	78	#define CCDC_BLK_ST_PXL_SHIFT 10
..	..	@@ -94,11 +85,11 @@
94	85	#define CCDC_BLK_COMP_GB_COMP_SHIFT 8
95	86	#define CCDC_BLK_COMP_GR_COMP_SHIFT 16
96	87	#define CCDC_BLK_COMP_R_COMP_SHIFT 24
97		-#define CCDC_LATCH_ON_VSYNC_DISABLE (1 << 15)
98		-#define CCDC_FPC_ENABLE (1 << 15)
	88	+#define CCDC_LATCH_ON_VSYNC_DISABLE BIT(15)
	89	+#define CCDC_FPC_ENABLE BIT(15)
99	90	#define CCDC_FPC_DISABLE 0
100	91	#define CCDC_FPC_FPC_NUM_MASK 0x7FFF
101		-#define CCDC_DATA_PACK_ENABLE (1 << 11)
	92	+#define CCDC_DATA_PACK_ENABLE BIT(11)
102	93	#define CCDC_FMTCFG_VPIN_MASK 7
103	94	#define CCDC_FMTCFG_VPIN_SHIFT 12
104	95	#define CCDC_FMT_HORZ_FMTLNH_MASK 0x1FFF
..	..	@@ -141,9 +132,9 @@
141	132	#define CCDC_SYN_FLDMODE_MASK 1
142	133	#define CCDC_SYN_FLDMODE_SHIFT 7
143	134	#define CCDC_REC656IF_BT656_EN 3
144		-#define CCDC_SYN_MODE_VD_POL_NEGATIVE (1 << 2)
	135	+#define CCDC_SYN_MODE_VD_POL_NEGATIVE BIT(2)
145	136	#define CCDC_CCDCFG_Y8POS_SHIFT 11
146		-#define CCDC_CCDCFG_BW656_10BIT (1 << 5)
	137	+#define CCDC_CCDCFG_BW656_10BIT BIT(5)
147	138	#define CCDC_SDOFST_FIELD_INTERLEAVED 0x249
148	139	#define CCDC_NO_CULLING 0xffff00ff
149	140	#endif