update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/media/platform/am437x/am437x-vpfe_regs.h
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@@ -1,3 +1,4 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * TI AM437x Image Sensor Interface Registers
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  *
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@@ -5,15 +6,6 @@
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  *
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  * Benoit Parrot <bparrot@ti.com>
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  * Lad, Prabhakar <prabhakar.csengg@gmail.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
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- * kind, whether express or implied; without even the implied warranty
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- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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  */
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 #ifndef AM437X_VPFE_REGS_H
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@@ -66,13 +58,13 @@
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 #define VPFE_PIX_FMT_MASK			3
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 #define VPFE_PIX_FMT_SHIFT			12
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 #define VPFE_VP2SDR_DISABLE			0xfffbffff
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-#define VPFE_WEN_ENABLE				(1 << 17)
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+#define VPFE_WEN_ENABLE				BIT(17)
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 #define VPFE_SDR2RSZ_DISABLE			0xfff7ffff
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-#define VPFE_VDHDEN_ENABLE			(1 << 16)
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-#define VPFE_LPF_ENABLE				(1 << 14)
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-#define VPFE_ALAW_ENABLE			(1 << 3)
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+#define VPFE_VDHDEN_ENABLE			BIT(16)
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+#define VPFE_LPF_ENABLE				BIT(14)
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+#define VPFE_ALAW_ENABLE			BIT(3)
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 #define VPFE_ALAW_GAMMA_WD_MASK			7
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-#define VPFE_BLK_CLAMP_ENABLE			(1 << 31)
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+#define VPFE_BLK_CLAMP_ENABLE			BIT(31)
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 #define VPFE_BLK_SGAIN_MASK			0x1f
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 #define VPFE_BLK_ST_PXL_MASK			0x7fff
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 #define VPFE_BLK_ST_PXL_SHIFT			10
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@@ -85,8 +77,8 @@
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 #define VPFE_BLK_COMP_GB_COMP_SHIFT		8
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 #define VPFE_BLK_COMP_GR_COMP_SHIFT		16
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 #define VPFE_BLK_COMP_R_COMP_SHIFT		24
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-#define VPFE_LATCH_ON_VSYNC_DISABLE		(1 << 15)
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-#define VPFE_DATA_PACK_ENABLE			(1 << 11)
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+#define VPFE_LATCH_ON_VSYNC_DISABLE		BIT(15)
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+#define VPFE_DATA_PACK_ENABLE			BIT(11)
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 #define VPFE_HORZ_INFO_SPH_SHIFT		16
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 #define VPFE_VERT_START_SLV0_SHIFT		16
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 #define VPFE_VDINT_VDINT0_SHIFT			16
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@@ -114,15 +106,15 @@
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 #define VPFE_SYN_FLDMODE_MASK			1
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 #define VPFE_SYN_FLDMODE_SHIFT			7
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 #define VPFE_REC656IF_BT656_EN			3
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-#define VPFE_SYN_MODE_VD_POL_NEGATIVE		(1 << 2)
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+#define VPFE_SYN_MODE_VD_POL_NEGATIVE		BIT(2)
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 #define VPFE_CCDCFG_Y8POS_SHIFT			11
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-#define VPFE_CCDCFG_BW656_10BIT			(1 << 5)
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+#define VPFE_CCDCFG_BW656_10BIT			BIT(5)
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 #define VPFE_SDOFST_FIELD_INTERLEAVED		0x249
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 #define VPFE_NO_CULLING				0xffff00ff
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-#define VPFE_VDINT0				(1 << 0)
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-#define VPFE_VDINT1				(1 << 1)
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-#define VPFE_VDINT2				(1 << 2)
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-#define VPFE_DMA_CNTL_OVERFLOW			(1 << 31)
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+#define VPFE_VDINT0				BIT(0)
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+#define VPFE_VDINT1				BIT(1)
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+#define VPFE_VDINT2				BIT(2)
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+#define VPFE_DMA_CNTL_OVERFLOW			BIT(31)
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 #define VPFE_CONFIG_PCLK_INV_SHIFT		0
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 #define VPFE_CONFIG_PCLK_INV_MASK		1