update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/media/i2c/sc031gs.c
..
..
@@ -50,8 +50,8 @@
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50
 
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 #define SC031GS_REG_COARSE_AGAIN		0x3e08
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 #define SC031GS_REG_FINE_AGAIN          0x3e09
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-#define	ANALOG_GAIN_MIN			0x01
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-#define	ANALOG_GAIN_MAX			0xF8
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+#define	ANALOG_GAIN_MIN			0x10
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+#define	ANALOG_GAIN_MAX			0x7c0   // 124x
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 #define	ANALOG_GAIN_STEP		1
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 #define	ANALOG_GAIN_DEFAULT		0x1f
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57
 
..
..
@@ -117,6 +117,8 @@
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 	struct v4l2_ctrl	*vblank;
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 	struct v4l2_ctrl	*test_pattern;
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 	struct mutex		mutex;
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+	struct v4l2_fract	cur_fps;
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+	u32			cur_vts;
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 	bool			streaming;
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 	bool			power_on;
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 	const struct sc031gs_mode *cur_mode;
..
..
@@ -296,7 +298,7 @@
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 	{0x3d08, 0x01},
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 	{0x3e01, 0x14},
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 	{0x3e02, 0x80},
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-	{0x3e06, 0x0c},
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+	{0x3e06, 0x00},
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 	{0x4500, 0x59},
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 	{0x4501, 0xc4},
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 	{0x4603, 0x00},
..
..
@@ -477,6 +479,8 @@
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 		__v4l2_ctrl_modify_range(sc031gs->vblank, vblank_def,
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 					 SC031GS_VTS_MAX - mode->height,
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 					 1, vblank_def);
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+		sc031gs->cur_fps = mode->max_fps;
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+		sc031gs->cur_vts = mode->vts_def;
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 	}
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 	mutex_unlock(&sc031gs->mutex);
..
..
@@ -611,7 +615,10 @@
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 		ret = sc031gs_ioctl(sd, cmd, inf);
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 		if (!ret)
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-			ret = copy_to_user(up, inf, sizeof(*inf));
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+			if (copy_to_user(up, inf, sizeof(*inf))) {
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+				kfree(inf);
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+				return -EFAULT;
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+			}
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 		kfree(inf);
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 		break;
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 	case RKMODULE_AWB_CFG:
..
..
@@ -620,16 +627,17 @@
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 			ret = -ENOMEM;
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 			return ret;
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 		}
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-
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-		ret = copy_from_user(cfg, up, sizeof(*cfg));
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-		if (!ret)
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-			ret = sc031gs_ioctl(sd, cmd, cfg);
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+		if (copy_from_user(cfg, up, sizeof(*cfg))) {
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+			kfree(cfg);
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+			return -EFAULT;
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+		}
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+		ret = sc031gs_ioctl(sd, cmd, cfg);
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 		kfree(cfg);
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 		break;
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 	case RKMODULE_SET_QUICK_STREAM:
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-		ret = copy_from_user(&stream, up, sizeof(u32));
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-		if (!ret)
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-			ret = sc031gs_ioctl(sd, cmd, &stream);
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+		if (copy_from_user(&stream, up, sizeof(u32)))
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+			return -EFAULT;
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+		ret = sc031gs_ioctl(sd, cmd, &stream);
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 		break;
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 	default:
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 		ret = -ENOIOCTLCMD;
..
..
@@ -643,7 +651,7 @@
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 static int sc031gs_set_ctrl_gain(struct sc031gs *sc031gs, u32 a_gain)
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 {
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 	int ret = 0;
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-	u32 coarse_again, fine_again, fine_again_reg, coarse_again_reg;
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+	u32 coarse_again, fine_again, fine_again_reg, coarse_again_reg, digital_gain_reg;
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 		if (a_gain < 0x20) { /*1x ~ 2x*/
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 			fine_again = a_gain - 16;
..
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@@ -651,24 +659,40 @@
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 			fine_again_reg = ((0x01 << 4) & 0x10) |
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 				(fine_again & 0x0f);
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 			coarse_again_reg = coarse_again  & 0x1F;
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+			digital_gain_reg = 0x80;
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 		} else if (a_gain < 0x40) { /*2x ~ 4x*/
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 			fine_again = (a_gain >> 1) - 16;
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 			coarse_again = 0x7;
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 			fine_again_reg = ((0x01 << 4) & 0x10) |
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 				(fine_again & 0x0f);
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 			coarse_again_reg = coarse_again  & 0x1F;
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+			digital_gain_reg = 0x80;
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 		} else if (a_gain < 0x80) { /*4x ~ 8x*/
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 			fine_again = (a_gain >> 2) - 16;
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 			coarse_again = 0xf;
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 			fine_again_reg = ((0x01 << 4) & 0x10) |
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 				(fine_again & 0x0f);
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 			coarse_again_reg = coarse_again  & 0x1F;
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-		} else { /*8x ~ 16x*/
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+			digital_gain_reg = 0x80;
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+		} else if (a_gain < 0x100) { /*8x ~ 16x*/
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 			fine_again = (a_gain >> 3) - 16;
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 			coarse_again = 0x1f;
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 			fine_again_reg = ((0x01 << 4) & 0x10) |
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 				(fine_again & 0x0f);
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 			coarse_again_reg = coarse_again  & 0x1F;
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+			digital_gain_reg = 0x80;
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+		} else if (a_gain < 0x200) { /*16x ~ 32x*/
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+			fine_again_reg = 0x1f;
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+			coarse_again_reg = 0x1f;
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+			digital_gain_reg = (a_gain * 0x80 / 0x100) & 0xf8;
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+		} else if (a_gain < 0x400) { /*32x ~ 64x*/
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+			fine_again_reg = 0x1f;
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+			coarse_again_reg = 0x1f;
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+			digital_gain_reg = (a_gain * 0x80 / 0x200) & 0x1f8;
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+		} else { /*64x ~ 124*/
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+			fine_again_reg = 0x1f;
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+			coarse_again_reg = 0x1f;
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+			digital_gain_reg = (a_gain * 0x80 / 0x400) & 0x3f8;
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 		}
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 		if (a_gain < 0x20) {
..
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@@ -690,6 +714,9 @@
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 			SC031GS_REG_FINE_AGAIN,
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 			SC031GS_REG_VALUE_08BIT,
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 			fine_again_reg);
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+
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+		ret |= sc031gs_write_reg(sc031gs->client, 0x3e06,
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+						SC031GS_REG_VALUE_16BIT, digital_gain_reg);
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 	return ret;
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 }
..
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@@ -765,9 +792,10 @@
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 	struct sc031gs *sc031gs = to_sc031gs(sd);
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 	const struct sc031gs_mode *mode = sc031gs->cur_mode;
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-	mutex_lock(&sc031gs->mutex);
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-	fi->interval = mode->max_fps;
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-	mutex_unlock(&sc031gs->mutex);
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+	if (sc031gs->streaming)
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+		fi->interval = sc031gs->cur_fps;
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+	else
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+		fi->interval = mode->max_fps;
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 	return 0;
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 }
..
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@@ -917,8 +945,7 @@
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 	if (fie->index >= ARRAY_SIZE(supported_modes))
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 		return -EINVAL;
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-	if (fie->code != PIX_FORMAT)
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-		return -EINVAL;
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+	fie->code = PIX_FORMAT;
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 	fie->width = supported_modes[fie->index].width;
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 	fie->height = supported_modes[fie->index].height;
..
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@@ -967,6 +994,14 @@
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 	.pad	= &sc031gs_pad_ops,
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 };
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+static void sc031gs_modify_fps_info(struct sc031gs *sc031gs)
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+{
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+	const struct sc031gs_mode *mode = sc031gs->cur_mode;
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+
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+	sc031gs->cur_fps.denominator = mode->max_fps.denominator * mode->vts_def /
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+				       sc031gs->cur_vts;
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+}
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+
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 static int sc031gs_set_ctrl(struct v4l2_ctrl *ctrl)
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 {
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 	struct sc031gs *sc031gs = container_of(ctrl->handler,
..
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@@ -1003,6 +1038,9 @@
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 		ret = sc031gs_write_reg(sc031gs->client, SC031GS_REG_VTS,
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 				       SC031GS_REG_VALUE_16BIT,
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 				       ctrl->val + sc031gs->cur_mode->height);
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+		if (!ret)
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+			sc031gs->cur_vts = ctrl->val + sc031gs->cur_mode->height;
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+		sc031gs_modify_fps_info(sc031gs);
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 		break;
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 	case V4L2_CID_TEST_PATTERN:
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 		ret = sc031gs_enable_test_pattern(sc031gs, ctrl->val);
..
..
@@ -1053,6 +1091,7 @@
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 		sc031gs->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
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 	vblank_def = mode->vts_def - mode->height;
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+	sc031gs->cur_vts = mode->vts_def;
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 	sc031gs->vblank = v4l2_ctrl_new_std(handler, &sc031gs_ctrl_ops,
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 				V4L2_CID_VBLANK, vblank_def,
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 				SC031GS_VTS_MAX - mode->height,
..
..
@@ -1082,6 +1121,7 @@
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 	}
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 	sc031gs->subdev.ctrl_handler = handler;
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+	sc031gs->cur_fps = mode->max_fps;
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 	return 0;
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