forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf 
 kernel/drivers/media/i2c/nvp6188.c
....@@ -10,9 +10,11 @@
1010  *  2. add get virtual channel hotplug status ioctl
1111  *  3. add virtual channel hotplug status event report to vicap
1212  *  4. fixup variables are reused when multiple devices use the same driver
13
- * V0.0X02.0x00 version.
14
- *  1,support auto detect format when plugging
15
- *  2,support quick stream when reset vicap
13
+ * V0.0X02.0X00 version.
14
+ *  1. update init registers setting
15
+ *  2. nvp6188 do not stream after writing registers setting
16
+ *  3. support detect fmt change when hotplug ahd camera
17
+ *  4. support 1600x1300 ahd camera input
1618  */
1719 
1820 //#define DEBUG
....@@ -36,15 +38,14 @@
3638 #include <linux/rk-preisp.h>
3739 #include <linux/sched.h>
3840 #include <linux/kthread.h>
39
-
4041 #include <sound/core.h>
4142 #include <sound/pcm.h>
4243 #include <sound/pcm_params.h>
4344 #include <sound/soc.h>
4445 #include <sound/tlv.h>
45
-
4646 #include <linux/platform_device.h>
4747 #include <linux/input.h>
48
+#include "nvp6188.h"
4849 
4950 #define DRIVER_VERSION				KERNEL_VERSION(0, 0x02, 0x0)
5051 
....@@ -80,21 +81,15 @@
8081 #endif
8182 
8283 #define NVP_RESO_960H_NSTC_VALUE	0x00
83
-#define NVP_RESO_960H_PAL_VALUE	0x10
84
+#define NVP_RESO_960H_PAL_VALUE		0x10
8485 #define NVP_RESO_720P_NSTC_VALUE	0x20
85
-#define NVP_RESO_720P_PAL_VALUE	0x21
86
+#define NVP_RESO_720P_PAL_VALUE		0x21
8687 #define NVP_RESO_1080P_NSTC_VALUE	0x30
8788 #define NVP_RESO_1080P_PAL_VALUE	0x31
8889 #define NVP_RESO_960P_NSTC_VALUE	0xa0
89
-#define NVP_RESO_960P_PAL_VALUE	0xa1
90
-
91
-enum nvp6188_max_pad {
92
-	PAD0,
93
-	PAD1,
94
-	PAD2,
95
-	PAD3,
96
-	PAD_MAX,
97
-};
90
+#define NVP_RESO_960P_PAL_VALUE		0xa1
91
+#define NVP_RESO_1300P_NSTC_VALUE	0x3A
92
+#define NVP_RESO_1300P_PAL_VALUE	0x3B
9893 
9994 enum nvp6188_support_reso {
10095 	NVP_RESO_UNKOWN = 0,
....@@ -102,10 +97,12 @@
10297 	NVP_RESO_720P_PAL,
10398 	NVP_RESO_960P_PAL,
10499 	NVP_RESO_1080P_PAL,
100
+	NVP_RESO_1300P_PAL,
105101 	NVP_RESO_960H_NSTC,
106102 	NVP_RESO_720P_NSTC,
107103 	NVP_RESO_960P_NSTC,
108104 	NVP_RESO_1080P_NSTC,
105
+	NVP_RESO_1300P_NSTC,
109106 };
110107 
111108 /* Audio output port formats */
....@@ -133,6 +130,7 @@
133130 	u32 hdr_mode;
134131 	u32 vc[PAD_MAX];
135132 	u32 channel_reso[PAD_MAX];
133
+	u32 unkown_reso_count[PAD_MAX];
136134 };
137135 
138136 struct nvp6188_audio {
....@@ -146,11 +144,9 @@
146144 	struct gpio_desc	*reset_gpio;
147145 	struct gpio_desc	*power_gpio;
148146 	struct gpio_desc	*vi_gpio;
149
-
150147 	struct pinctrl		*pinctrl;
151148 	struct pinctrl_state	*pins_default;
152149 	struct pinctrl_state	*pins_sleep;
153
-
154150 	struct v4l2_subdev	subdev;
155151 	struct media_pad	pad;
156152 	struct v4l2_ctrl_handler ctrl_handler;
....@@ -159,23 +155,20 @@
159155 	struct mutex		mutex;
160156 	bool			power_on;
161157 	struct nvp6188_mode cur_mode;
162
-
163158 	u32			module_index;
164159 	u32			cfg_num;
165160 	const char		*module_facing;
166161 	const char		*module_name;
167162 	const char		*len_name;
168
-
169163 	struct nvp6188_audio *audio_in;
170164 	struct nvp6188_audio *audio_out;
171
-
172165 	int streaming;
173
-
174166 	struct task_struct *detect_thread;
175167 	struct input_dev* input_dev;
176168 	unsigned char detect_status;
177169 	unsigned char last_detect_status;
178170 	u8 is_reset;
171
+	bool disable_dump_register;
179172 };
180173 
181174 #define to_nvp6188(sd) container_of(sd, struct nvp6188, subdev)
....@@ -192,489 +185,619 @@
192185 	struct i2c_client *client = to_i2c_client(dev);
193186 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
194187 	struct nvp6188 *nvp6188 = to_nvp6188(sd);
188
+
195189 	return sprintf(buf, "%d\n", nvp6188->detect_status);
196190 }
197191 
198
-static DEVICE_ATTR(hotplug_status, 0644, show_hotplug_status, NULL);
192
+static ssize_t nvp6188_debug_func(struct device *dev,
193
+				  struct device_attribute *attr,
194
+				  char *buf)
195
+{
196
+	struct i2c_client *client = to_i2c_client(dev);
197
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
198
+	struct nvp6188 *nvp6188 = to_nvp6188(sd);
199
+
200
+	nvp6188->disable_dump_register = (nvp6188->disable_dump_register) ? false : true;
201
+	return sprintf(buf, "switch disable_dump_register(%d)\n", nvp6188->disable_dump_register);
202
+}
203
+
204
+static DEVICE_ATTR(hotplug_status, S_IRUSR, show_hotplug_status, NULL);
205
+static DEVICE_ATTR(nvp6188_debug, S_IRUSR, nvp6188_debug_func, NULL);
199206 static struct attribute *dev_attrs[] = {
200207 	&dev_attr_hotplug_status.attr,
208
+	&dev_attr_nvp6188_debug.attr,
201209 	NULL,
202210 };
211
+
203212 static struct attribute_group dev_attr_grp = {
204213 	.attrs = dev_attrs,
205214 };
206215 
207216 static __maybe_unused const struct regval common_setting_756M_regs[] = {
208
-	{ 0xff, 0x00 },
209
-	{ 0x80, 0x0f },
210
-	{ 0x00, 0x10 },
211
-	{ 0x01, 0x10 },
212
-	{ 0x02, 0x10 },
213
-	{ 0x03, 0x10 },
214
-	{ 0x22, 0x0b },
215
-	{ 0x23, 0x41 },
216
-	{ 0x26, 0x0b },
217
-	{ 0x27, 0x41 },
218
-	{ 0x2a, 0x0b },
219
-	{ 0x2b, 0x41 },
220
-	{ 0x2e, 0x0b },
221
-	{ 0x2f, 0x41 },
217
+	{0xff, 0x00},
218
+	{0x80, 0x0f},
219
+	{0x00, 0x10},
220
+	{0x01, 0x10},
221
+	{0x02, 0x10},
222
+	{0x03, 0x10},
223
+	{0x22, 0x0b},
224
+	{0x23, 0x41},
225
+	{0x26, 0x0b},
226
+	{0x27, 0x41},
227
+	{0x2a, 0x0b},
228
+	{0x2b, 0x41},
229
+	{0x2e, 0x0b},
230
+	{0x2f, 0x41},
222231 
223
-	{ 0xff, 0x01 },
224
-	{ 0x98, 0x30 },
225
-	{ 0xed, 0x00 },
232
+	{0xff, 0x01},
233
+	{0x98, 0x30},
234
+	{0xed, 0x00},
226235 
227
-	{ 0xff, 0x05+0 },
228
-	{ 0x00, 0xd0 },
229
-	{ 0x01, 0x22 },
230
-	{ 0x47, 0xee },
231
-	{ 0x50, 0xc6 },
232
-	{ 0x57, 0x00 },
233
-	{ 0x58, 0x77 },
234
-	{ 0x5b, 0x41 },
235
-	{ 0x5c, 0x78 },
236
-	{ 0xB8, 0xB8 },
236
+	{0xff, 0x05 + 0},
237
+	{0x00, 0xd0},
238
+	{0x01, 0x22},
239
+	{0x47, 0xee},
240
+	{0x50, 0xc6},
241
+	{0x57, 0x00},
242
+	{0x58, 0x77},
243
+	{0x5b, 0x41},
244
+	{0x5c, 0x78},
245
+	{0xB8, 0xB8},
237246 
238
-	{ 0xff, 0x05+1 },
239
-	{ 0x00, 0xd0 },
240
-	{ 0x01, 0x22 },
241
-	{ 0x47, 0xee },
242
-	{ 0x50, 0xc6 },
243
-	{ 0x57, 0x00 },
244
-	{ 0x58, 0x77 },
245
-	{ 0x5b, 0x41 },
246
-	{ 0x5c, 0x78 },
247
-	{ 0xB8, 0xB8 },
247
+	{0xff, 0x05 + 1},
248
+	{0x00, 0xd0},
249
+	{0x01, 0x22},
250
+	{0x47, 0xee},
251
+	{0x50, 0xc6},
252
+	{0x57, 0x00},
253
+	{0x58, 0x77},
254
+	{0x5b, 0x41},
255
+	{0x5c, 0x78},
256
+	{0xB8, 0xB8},
248257 
249
-	{ 0xff, 0x05+2 },
250
-	{ 0x00, 0xd0 },
251
-	{ 0x01, 0x22 },
252
-	{ 0x47, 0xee },
253
-	{ 0x50, 0xc6 },
254
-	{ 0x57, 0x00 },
255
-	{ 0x58, 0x77 },
256
-	{ 0x5b, 0x41 },
257
-	{ 0x5c, 0x78 },
258
-	{ 0xB8, 0xB8 },
258
+	{0xff, 0x05 + 2},
259
+	{0x00, 0xd0},
260
+	{0x01, 0x22},
261
+	{0x47, 0xee},
262
+	{0x50, 0xc6},
263
+	{0x57, 0x00},
264
+	{0x58, 0x77},
265
+	{0x5b, 0x41},
266
+	{0x5c, 0x78},
267
+	{0xB8, 0xB8},
259268 
260
-	{ 0xff, 0x05+3 },
261
-	{ 0x00, 0xd0 },
262
-	{ 0x01, 0x22 },
263
-	{ 0x47, 0xee },
264
-	{ 0x50, 0xc6 },
265
-	{ 0x57, 0x00 },
266
-	{ 0x58, 0x77 },
267
-	{ 0x5b, 0x41 },
268
-	{ 0x5c, 0x78 },
269
-	{ 0xB8, 0xB8 },
269
+	{0xff, 0x05 + 3},
270
+	{0x00, 0xd0},
271
+	{0x01, 0x22},
272
+	{0x47, 0xee},
273
+	{0x50, 0xc6},
274
+	{0x57, 0x00},
275
+	{0x58, 0x77},
276
+	{0x5b, 0x41},
277
+	{0x5c, 0x78},
278
+	{0xB8, 0xB8},
270279 
271
-	{ 0xff, 0x09 },
272
-	{ 0x50, 0x30 },
273
-	{ 0x51, 0x6f },
274
-	{ 0x52, 0x67 },
275
-	{ 0x53, 0x48 },
276
-	{ 0x54, 0x30 },
277
-	{ 0x55, 0x6f },
278
-	{ 0x56, 0x67 },
279
-	{ 0x57, 0x48 },
280
-	{ 0x58, 0x30 },
281
-	{ 0x59, 0x6f },
282
-	{ 0x5a, 0x67 },
283
-	{ 0x5b, 0x48 },
284
-	{ 0x5c, 0x30 },
285
-	{ 0x5d, 0x6f },
286
-	{ 0x5e, 0x67 },
287
-	{ 0x5f, 0x48 },
280
+	{0xff, 0x09},
281
+	{0x50, 0x30},
282
+	{0x51, 0x6f},
283
+	{0x52, 0x67},
284
+	{0x53, 0x48},
285
+	{0x54, 0x30},
286
+	{0x55, 0x6f},
287
+	{0x56, 0x67},
288
+	{0x57, 0x48},
289
+	{0x58, 0x30},
290
+	{0x59, 0x6f},
291
+	{0x5a, 0x67},
292
+	{0x5b, 0x48},
293
+	{0x5c, 0x30},
294
+	{0x5d, 0x6f},
295
+	{0x5e, 0x67},
296
+	{0x5f, 0x48},
288297 
289
-	{ 0xff, 0x0a },
290
-	{ 0x25, 0x10 },
291
-	{ 0x27, 0x1e },
292
-	{ 0x30, 0xac },
293
-	{ 0x31, 0x78 },
294
-	{ 0x32, 0x17 },
295
-	{ 0x33, 0xc1 },
296
-	{ 0x34, 0x40 },
297
-	{ 0x35, 0x00 },
298
-	{ 0x36, 0xc3 },
299
-	{ 0x37, 0x0a },
300
-	{ 0x38, 0x00 },
301
-	{ 0x39, 0x02 },
302
-	{ 0x3a, 0x00 },
303
-	{ 0x3b, 0xb2 },
304
-	{ 0xa5, 0x10 },
305
-	{ 0xa7, 0x1e },
306
-	{ 0xb0, 0xac },
307
-	{ 0xb1, 0x78 },
308
-	{ 0xb2, 0x17 },
309
-	{ 0xb3, 0xc1 },
310
-	{ 0xb4, 0x40 },
311
-	{ 0xb5, 0x00 },
312
-	{ 0xb6, 0xc3 },
313
-	{ 0xb7, 0x0a },
314
-	{ 0xb8, 0x00 },
315
-	{ 0xb9, 0x02 },
316
-	{ 0xba, 0x00 },
317
-	{ 0xbb, 0xb2 },
318
-	{ 0xff, 0x0b },
319
-	{ 0x25, 0x10 },
320
-	{ 0x27, 0x1e },
321
-	{ 0x30, 0xac },
322
-	{ 0x31, 0x78 },
323
-	{ 0x32, 0x17 },
324
-	{ 0x33, 0xc1 },
325
-	{ 0x34, 0x40 },
326
-	{ 0x35, 0x00 },
327
-	{ 0x36, 0xc3 },
328
-	{ 0x37, 0x0a },
329
-	{ 0x38, 0x00 },
330
-	{ 0x39, 0x02 },
331
-	{ 0x3a, 0x00 },
332
-	{ 0x3b, 0xb2 },
333
-	{ 0xa5, 0x10 },
334
-	{ 0xa7, 0x1e },
335
-	{ 0xb0, 0xac },
336
-	{ 0xb1, 0x78 },
337
-	{ 0xb2, 0x17 },
338
-	{ 0xb3, 0xc1 },
339
-	{ 0xb4, 0x40 },
340
-	{ 0xb5, 0x00 },
341
-	{ 0xb6, 0xc3 },
342
-	{ 0xb7, 0x0a },
343
-	{ 0xb8, 0x00 },
344
-	{ 0xb9, 0x02 },
345
-	{ 0xba, 0x00 },
346
-	{ 0xbb, 0xb2 },
298
+	{0xff, 0x0a},
299
+	{0x25, 0x10},
300
+	{0x27, 0x1e},
301
+	{0x30, 0xac},
302
+	{0x31, 0x78},
303
+	{0x32, 0x17},
304
+	{0x33, 0xc1},
305
+	{0x34, 0x40},
306
+	{0x35, 0x00},
307
+	{0x36, 0xc3},
308
+	{0x37, 0x0a},
309
+	{0x38, 0x00},
310
+	{0x39, 0x02},
311
+	{0x3a, 0x00},
312
+	{0x3b, 0xb2},
313
+	{0xa5, 0x10},
314
+	{0xa7, 0x1e},
315
+	{0xb0, 0xac},
316
+	{0xb1, 0x78},
317
+	{0xb2, 0x17},
318
+	{0xb3, 0xc1},
319
+	{0xb4, 0x40},
320
+	{0xb5, 0x00},
321
+	{0xb6, 0xc3},
322
+	{0xb7, 0x0a},
323
+	{0xb8, 0x00},
324
+	{0xb9, 0x02},
325
+	{0xba, 0x00},
326
+	{0xbb, 0xb2},
327
+	{0xff, 0x0b},
328
+	{0x25, 0x10},
329
+	{0x27, 0x1e},
330
+	{0x30, 0xac},
331
+	{0x31, 0x78},
332
+	{0x32, 0x17},
333
+	{0x33, 0xc1},
334
+	{0x34, 0x40},
335
+	{0x35, 0x00},
336
+	{0x36, 0xc3},
337
+	{0x37, 0x0a},
338
+	{0x38, 0x00},
339
+	{0x39, 0x02},
340
+	{0x3a, 0x00},
341
+	{0x3b, 0xb2},
342
+	{0xa5, 0x10},
343
+	{0xa7, 0x1e},
344
+	{0xb0, 0xac},
345
+	{0xb1, 0x78},
346
+	{0xb2, 0x17},
347
+	{0xb3, 0xc1},
348
+	{0xb4, 0x40},
349
+	{0xb5, 0x00},
350
+	{0xb6, 0xc3},
351
+	{0xb7, 0x0a},
352
+	{0xb8, 0x00},
353
+	{0xb9, 0x02},
354
+	{0xba, 0x00},
355
+	{0xbb, 0xb2},
347356 
348
-	{ 0xff, 0x13 },
349
-	{ 0x05, 0xa0 },
350
-	{ 0x31, 0xff },
351
-	{ 0x07, 0x47 },
352
-	{ 0x12, 0x04 },
353
-	{ 0x1e, 0x1f },
354
-	{ 0x1f, 0x27 },
355
-	{ 0x2e, 0x10 },
356
-	{ 0x2f, 0xc8 },
357
-	{ 0x31, 0xff },
358
-	{ 0x32, 0x00 },
359
-	{ 0x33, 0x00 },
360
-	{ 0x72, 0x05 },
361
-	{ 0x7a, 0xf0 },
362
-	{ 0xff, _MAR_BANK_ },
363
-	{ 0x10, 0xff },
364
-	{ 0x11, 0xff },
357
+	{0xff, 0x13},
358
+	{0x05, 0xa0},
359
+	{0x31, 0xff},
360
+	{0x07, 0x47},
361
+	{0x12, 0x04},
362
+	{0x1e, 0x1f},
363
+	{0x1f, 0x27},
364
+	{0x2e, 0x10},
365
+	{0x2f, 0xc8},
366
+	{0x31, 0xff},
367
+	{0x32, 0x00},
368
+	{0x33, 0x00},
369
+	{0x72, 0x05},
370
+	{0x7a, 0xf0},
371
+	{0xff, _MAR_BANK_},
372
+	{0x10, 0xff},
373
+	{0x11, 0xff},
365374 
366
-	{ 0x30, 0x0f },
367
-	{ 0x32, 0x92 },
368
-	{ 0x34, 0xcd },
369
-	{ 0x36, 0x04 },
370
-	{ 0x38, 0x58 },
375
+	{0x30, 0x0f},
376
+	{0x32, 0x92},
377
+	{0x34, 0xcd},
378
+	{0x36, 0x04},
379
+	{0x38, 0x58},
371380 
372
-	{ 0x3c, 0x01 },
373
-	{ 0x3d, 0x11 },
374
-	{ 0x3e, 0x11 },
375
-	{ 0x45, 0x60 },
376
-	{ 0x46, 0x49 },
381
+	{0x3c, 0x01},
382
+	{0x3d, 0x11},
383
+	{0x3e, 0x11},
384
+	{0x45, 0x60},
385
+	{0x46, 0x49},
377386 
378
-	{ 0xff, _MTX_BANK_ },
379
-	{ 0xe9, 0x03 },
380
-	{ 0x03, 0x02 },
381
-	{ 0x01, 0xe0 },
382
-	{ 0x00, 0x7d },
383
-	{ 0x01, 0xe0 },
384
-	{ 0x02, 0xa0 },
385
-	{ 0x20, 0x1e },
386
-	{ 0x20, 0x1f },
387
+	{0xff, _MTX_BANK_},
388
+	{0xe9, 0x03},
389
+	{0x03, 0x02},
390
+	{0x01, 0xe0},
391
+	{0x00, 0x7d},
392
+	{0x01, 0xe0},
393
+	{0x02, 0xa0},
394
+	{0x20, 0x1e},
395
+	{0x20, 0x1f},
387396 
388
-	{ 0x04, 0x38 },
389
-	{ 0x45, 0xc4 },
390
-	{ 0x46, 0x01 },
391
-	{ 0x47, 0x1b },
392
-	{ 0x48, 0x08 },
393
-	{ 0x65, 0xc4 },
394
-	{ 0x66, 0x01 },
395
-	{ 0x67, 0x1b },
396
-	{ 0x68, 0x08 },
397
-	{ 0x85, 0xc4 },
398
-	{ 0x86, 0x01 },
399
-	{ 0x87, 0x1b },
400
-	{ 0x88, 0x08 },
401
-	{ 0xa5, 0xc4 },
402
-	{ 0xa6, 0x01 },
403
-	{ 0xa7, 0x1b },
404
-	{ 0xa8, 0x08 },
405
-	{ 0xc5, 0xc4 },
406
-	{ 0xc6, 0x01 },	
407
-	{ 0xc7, 0x1b },	
408
-	{ 0xc8, 0x08 },
409
-	{ 0xeb, 0x8d },
397
+	{0x04, 0x38},
398
+	{0x45, 0xc4},
399
+	{0x46, 0x01},
400
+	{0x47, 0x1b},
401
+	{0x48, 0x08},
402
+	{0x65, 0xc4},
403
+	{0x66, 0x01},
404
+	{0x67, 0x1b},
405
+	{0x68, 0x08},
406
+	{0x85, 0xc4},
407
+	{0x86, 0x01},
408
+	{0x87, 0x1b},
409
+	{0x88, 0x08},
410
+	{0xa5, 0xc4},
411
+	{0xa6, 0x01},
412
+	{0xa7, 0x1b},
413
+	{0xa8, 0x08},
414
+	{0xc5, 0xc4},
415
+	{0xc6, 0x01},
416
+	{0xc7, 0x1b},
417
+	{0xc8, 0x08},
418
+	{0xeb, 0x8d},
410419 
411
-	{ 0xff, _MAR_BANK_ },
412
-	{ 0x00, 0xff },
413
-	{ 0x40, 0x01 },
414
-	{ 0x40, 0x00 },
415
-	{ 0xff, 0x01 },
416
-	{ 0x97, 0x00 },
417
-	{ 0x97, 0x0f },
420
+	{0xff, _MAR_BANK_},
421
+	{0x00, 0xff},
422
+	{0x40, 0x01},
423
+	{0x40, 0x00},
424
+	{0xff, 0x01},
425
+	{0x97, 0x00},
426
+	{0x97, 0x0f},
418427 
419
-	{ 0xff, 0x00 },  //test pattern
420
-	{ 0x78, 0xba },
421
-	{ 0x79, 0xac },
422
-	{ 0xff, 0x05 },
423
-	{ 0x2c, 0x08 },
424
-	{ 0x6a, 0x80 },
425
-	{ 0xff, 0x06 },
426
-	{ 0x2c, 0x08 },
427
-	{ 0x6a, 0x80 },
428
-	{ 0xff, 0x07 },
429
-	{ 0x2c, 0x08 },
430
-	{ 0x6a, 0x80 },
431
-	{ 0xff, 0x08 },
432
-	{ 0x2c, 0x08 },
433
-	{ 0x6a, 0x80 },
428
+	{0xff, 0x00},  //test pattern
429
+	{0x78, 0xba},
430
+	{0x79, 0xac},
431
+	{0xff, 0x05},
432
+	{0x2c, 0x08},
433
+	{0x6a, 0x80},
434
+	{0xff, 0x06},
435
+	{0x2c, 0x08},
436
+	{0x6a, 0x80},
437
+	{0xff, 0x07},
438
+	{0x2c, 0x08},
439
+	{0x6a, 0x80},
440
+	{0xff, 0x08},
441
+	{0x2c, 0x08},
442
+	{0x6a, 0x80},
434443 };
435444 
436445 static __maybe_unused const struct regval common_setting_1458M_regs[] = {
437
-	{ 0xff, 0x00 },
438
-	{ 0x80, 0x0f },
439
-	{ 0x00, 0x10 },
440
-	{ 0x01, 0x10 },
441
-	{ 0x02, 0x10 },
442
-	{ 0x03, 0x10 },
443
-	{ 0x22, 0x0b },
444
-	{ 0x23, 0x41 },
445
-	{ 0x26, 0x0b },
446
-	{ 0x27, 0x41 },
447
-	{ 0x2a, 0x0b },
448
-	{ 0x2b, 0x41 },
449
-	{ 0x2e, 0x0b },
450
-	{ 0x2f, 0x41 },
446
+	{0xff, 0x01},
447
+	{0x80, 0x40},
448
+	{0x98, 0x30},
449
+	{0x7a, 0x00},
450
+	{0xff, _MTX_BANK_},
451
+	{0xe9, 0x03},
452
+	{0x03, 0x02},
453
+	{0x04, 0x6c},
454
+	{0x08, 0x4f},
455
+	{0x01, 0xe4},
456
+	{0x00, 0x7d},
457
+	{0x01, 0xe0},
458
+	{0x20, 0x1e},
459
+	{0x20, 0x1f},
460
+	{0xeb, 0x8d},
461
+	{0x45, 0xcd},
462
+	{0x46, 0x42},
463
+	{0x47, 0x36},
464
+	{0x48, 0x0f},
465
+	{0x65, 0xcd},
466
+	{0x66, 0x42},
467
+	{0x67, 0x0e},
468
+	{0x68, 0x0f},
469
+	{0x85, 0xcd},
470
+	{0x86, 0x42},
471
+	{0x87, 0x0e},
472
+	{0x88, 0x0f},
473
+	{0xa5, 0xcd},
474
+	{0xa6, 0x42},
475
+	{0xa7, 0x0e},
476
+	{0xa8, 0x0f},
477
+	{0xc5, 0xcd},
478
+	{0xc6, 0x42},
479
+	{0xc7, 0x0e},
480
+	{0xc8, 0x0f},
451481 
452
-	{ 0xff, 0x01 },
453
-	{ 0x98, 0x30 },
454
-	{ 0xed, 0x00 },
482
+	{0xff, 0x05 + 0},
483
+	{0x01, 0x62},
484
+	{0x05, 0x04},
485
+	{0x08, 0x55},
486
+	{0x1b, 0x08},
487
+	{0x25, 0xdc},
488
+	{0x28, 0x80},
489
+	{0x2f, 0x00},
490
+	{0x30, 0xe0},
491
+	{0x31, 0x43},
492
+	{0x32, 0xa2},
493
+	{0x57, 0x00},
494
+	{0x58, 0x77},
495
+	{0x5b, 0x41},
496
+	{0x5c, 0x78},
497
+	{0x5f, 0x00},
498
+	{0x7b, 0x11},
499
+	{0x7c, 0x01},
500
+	{0x7d, 0x80},
501
+	{0x80, 0x00},
502
+	{0x90, 0x01},
503
+	{0xa9, 0x00},
504
+	{0xb5, 0x00},
505
+	{0xb9, 0x72},
506
+	{0xd1, 0x00},
507
+	{0xd5, 0x80},
455508 
456
-	{ 0xff, 0x05+0 },
457
-	{ 0x00, 0xd0 },
458
-	{ 0x01, 0x22 },
459
-	{ 0x47, 0xee },
460
-	{ 0x50, 0xc6 },
461
-	{ 0x57, 0x00 },
462
-	{ 0x58, 0x77 },
463
-	{ 0x5b, 0x41 },
464
-	{ 0x5c, 0x78 },
465
-	{ 0xB8, 0xB8 },
509
+	{0xff, 0x05 + 1},
510
+	{0x01, 0x62},
511
+	{0x05, 0x04},
512
+	{0x08, 0x55},
513
+	{0x1b, 0x08},
514
+	{0x25, 0xdc},
515
+	{0x28, 0x80},
516
+	{0x2f, 0x00},
517
+	{0x30, 0xe0},
518
+	{0x31, 0x43},
519
+	{0x32, 0xa2},
520
+	{0x57, 0x00},
521
+	{0x58, 0x77},
522
+	{0x5b, 0x41},
523
+	{0x5c, 0x78},
524
+	{0x5f, 0x00},
525
+	{0x7b, 0x11},
526
+	{0x7c, 0x01},
527
+	{0x7d, 0x80},
528
+	{0x80, 0x00},
529
+	{0x90, 0x01},
530
+	{0xa9, 0x00},
531
+	{0xb5, 0x00},
532
+	{0xb9, 0x72},
533
+	{0xd1, 0x00},
534
+	{0xd5, 0x80},
466535 
467
-	{ 0xff, 0x05+1 },
468
-	{ 0x00, 0xd0 },
469
-	{ 0x01, 0x22 },
470
-	{ 0x47, 0xee },
471
-	{ 0x50, 0xc6 },
472
-	{ 0x57, 0x00 },
473
-	{ 0x58, 0x77 },
474
-	{ 0x5b, 0x41 },
475
-	{ 0x5c, 0x78 },
476
-	{ 0xB8, 0xB8 },
536
+	{0xff, 0x05 + 2},
537
+	{0x01, 0x62},
538
+	{0x05, 0x04},
539
+	{0x08, 0x55},
540
+	{0x1b, 0x08},
541
+	{0x25, 0xdc},
542
+	{0x28, 0x80},
543
+	{0x2f, 0x00},
544
+	{0x30, 0xe0},
545
+	{0x31, 0x43},
546
+	{0x32, 0xa2},
547
+	{0x57, 0x00},
548
+	{0x58, 0x77},
549
+	{0x5b, 0x41},
550
+	{0x5c, 0x78},
551
+	{0x5f, 0x00},
552
+	{0x7b, 0x11},
553
+	{0x7c, 0x01},
554
+	{0x7d, 0x80},
555
+	{0x80, 0x00},
556
+	{0x90, 0x01},
557
+	{0xa9, 0x00},
558
+	{0xb5, 0x00},
559
+	{0xb9, 0x72},
560
+	{0xd1, 0x00},
561
+	{0xd5, 0x80},
477562 
478
-	{ 0xff, 0x05+2 },
479
-	{ 0x00, 0xd0 },
480
-	{ 0x01, 0x22 },
481
-	{ 0x47, 0xee },
482
-	{ 0x50, 0xc6 },
483
-	{ 0x57, 0x00 },
484
-	{ 0x58, 0x77 },
485
-	{ 0x5b, 0x41 },
486
-	{ 0x5c, 0x78 },
487
-	{ 0xB8, 0xB8 },
563
+	{0xff, 0x05 + 3},
564
+	{0x01, 0x62},
565
+	{0x05, 0x04},
566
+	{0x08, 0x55},
567
+	{0x1b, 0x08},
568
+	{0x25, 0xdc},
569
+	{0x28, 0x80},
570
+	{0x2f, 0x00},
571
+	{0x30, 0xe0},
572
+	{0x31, 0x43},
573
+	{0x32, 0xa2},
574
+	{0x57, 0x00},
575
+	{0x58, 0x77},
576
+	{0x5b, 0x41},
577
+	{0x5c, 0x78},
578
+	{0x5f, 0x00},
579
+	{0x7b, 0x11},
580
+	{0x7c, 0x01},
581
+	{0x7d, 0x80},
582
+	{0x80, 0x00},
583
+	{0x90, 0x01},
584
+	{0xa9, 0x00},
585
+	{0xb5, 0x00},
586
+	{0xb9, 0x72},
587
+	{0xd1, 0x00},
588
+	{0xd5, 0x80},
488589 
489
-	{ 0xff, 0x05+3 },
490
-	{ 0x00, 0xd0 },
491
-	{ 0x01, 0x22 },
492
-	{ 0x47, 0xee },
493
-	{ 0x50, 0xc6 },
494
-	{ 0x57, 0x00 },
495
-	{ 0x58, 0x77 },
496
-	{ 0x5b, 0x41 },
497
-	{ 0x5c, 0x78 },
498
-	{ 0xB8, 0xB8 },
590
+	{0xff, 0x09},
591
+	{0x50, 0x30},
592
+	{0x51, 0x6f},
593
+	{0x52, 0x67},
594
+	{0x53, 0x48},
595
+	{0x54, 0x30},
596
+	{0x55, 0x6f},
597
+	{0x56, 0x67},
598
+	{0x57, 0x48},
599
+	{0x58, 0x30},
600
+	{0x59, 0x6f},
601
+	{0x5a, 0x67},
602
+	{0x5b, 0x48},
603
+	{0x5c, 0x30},
604
+	{0x5d, 0x6f},
605
+	{0x5e, 0x67},
606
+	{0x5f, 0x48},
607
+	{0x96, 0x03},
608
+	{0xb6, 0x03},
609
+	{0xd6, 0x03},
610
+	{0xf6, 0x03},
499611 
500
-	{ 0xff, 0x09 },
501
-	{ 0x50, 0x30 },
502
-	{ 0x51, 0x6f },
503
-	{ 0x52, 0x67 },
504
-	{ 0x53, 0x48 },
505
-	{ 0x54, 0x30 },
506
-	{ 0x55, 0x6f },
507
-	{ 0x56, 0x67 },
508
-	{ 0x57, 0x48 },
509
-	{ 0x58, 0x30 },
510
-	{ 0x59, 0x6f },
511
-	{ 0x5a, 0x67 },
512
-	{ 0x5b, 0x48 },
513
-	{ 0x5c, 0x30 },
514
-	{ 0x5d, 0x6f },
515
-	{ 0x5e, 0x67 },
516
-	{ 0x5f, 0x48 },
612
+	{0xff, 0x0a},
613
+	{0x25, 0x10},
614
+	{0x27, 0x1e},
615
+	{0x30, 0xac},
616
+	{0x31, 0x78},
617
+	{0x32, 0x17},
618
+	{0x33, 0xc1},
619
+	{0x34, 0x40},
620
+	{0x35, 0x00},
621
+	{0x36, 0xc3},
622
+	{0x37, 0x0a},
623
+	{0x38, 0x00},
624
+	{0x39, 0x02},
625
+	{0x3a, 0x00},
626
+	{0x3b, 0xb2},
627
+	{0xa5, 0x10},
628
+	{0xa7, 0x1e},
629
+	{0xb0, 0xac},
630
+	{0xb1, 0x78},
631
+	{0xb2, 0x17},
632
+	{0xb3, 0xc1},
633
+	{0xb4, 0x40},
634
+	{0xb5, 0x00},
635
+	{0xb6, 0xc3},
636
+	{0xb7, 0x0a},
637
+	{0xb8, 0x00},
638
+	{0xb9, 0x02},
639
+	{0xba, 0x00},
640
+	{0xbb, 0xb2},
641
+	{0xff, 0x0b},
642
+	{0x25, 0x10},
643
+	{0x27, 0x1e},
644
+	{0x30, 0xac},
645
+	{0x31, 0x78},
646
+	{0x32, 0x17},
647
+	{0x33, 0xc1},
648
+	{0x34, 0x40},
649
+	{0x35, 0x00},
650
+	{0x36, 0xc3},
651
+	{0x37, 0x0a},
652
+	{0x38, 0x00},
653
+	{0x39, 0x02},
654
+	{0x3a, 0x00},
655
+	{0x3b, 0xb2},
656
+	{0xa5, 0x10},
657
+	{0xa7, 0x1e},
658
+	{0xb0, 0xac},
659
+	{0xb1, 0x78},
660
+	{0xb2, 0x17},
661
+	{0xb3, 0xc1},
662
+	{0xb4, 0x40},
663
+	{0xb5, 0x00},
664
+	{0xb6, 0xc3},
665
+	{0xb7, 0x0a},
666
+	{0xb8, 0x00},
667
+	{0xb9, 0x02},
668
+	{0xba, 0x00},
669
+	{0xbb, 0xb2},
517670 
518
-	{ 0xff, 0x0a },
519
-	{ 0x25, 0x10 },
520
-	{ 0x27, 0x1e },
521
-	{ 0x30, 0xac },
522
-	{ 0x31, 0x78 },
523
-	{ 0x32, 0x17 },
524
-	{ 0x33, 0xc1 },
525
-	{ 0x34, 0x40 },
526
-	{ 0x35, 0x00 },
527
-	{ 0x36, 0xc3 },
528
-	{ 0x37, 0x0a },
529
-	{ 0x38, 0x00 },
530
-	{ 0x39, 0x02 },
531
-	{ 0x3a, 0x00 },
532
-	{ 0x3b, 0xb2 },
533
-	{ 0xa5, 0x10 },
534
-	{ 0xa7, 0x1e },
535
-	{ 0xb0, 0xac },
536
-	{ 0xb1, 0x78 },
537
-	{ 0xb2, 0x17 },
538
-	{ 0xb3, 0xc1 },
539
-	{ 0xb4, 0x40 },
540
-	{ 0xb5, 0x00 },
541
-	{ 0xb6, 0xc3 },
542
-	{ 0xb7, 0x0a },
543
-	{ 0xb8, 0x00 },
544
-	{ 0xb9, 0x02 },
545
-	{ 0xba, 0x00 },
546
-	{ 0xbb, 0xb2 },
547
-	{ 0xff, 0x0b },
548
-	{ 0x25, 0x10 },
549
-	{ 0x27, 0x1e },
550
-	{ 0x30, 0xac },
551
-	{ 0x31, 0x78 },
552
-	{ 0x32, 0x17 },
553
-	{ 0x33, 0xc1 },
554
-	{ 0x34, 0x40 },
555
-	{ 0x35, 0x00 },
556
-	{ 0x36, 0xc3 },
557
-	{ 0x37, 0x0a },
558
-	{ 0x38, 0x00 },
559
-	{ 0x39, 0x02 },
560
-	{ 0x3a, 0x00 },
561
-	{ 0x3b, 0xb2 },
562
-	{ 0xa5, 0x10 },
563
-	{ 0xa7, 0x1e },
564
-	{ 0xb0, 0xac },
565
-	{ 0xb1, 0x78 },
566
-	{ 0xb2, 0x17 },
567
-	{ 0xb3, 0xc1 },
568
-	{ 0xb4, 0x40 },
569
-	{ 0xb5, 0x00 },
570
-	{ 0xb6, 0xc3 },
571
-	{ 0xb7, 0x0a },
572
-	{ 0xb8, 0x00 },
573
-	{ 0xb9, 0x02 },
574
-	{ 0xba, 0x00 },
575
-	{ 0xbb, 0xb2 },
671
+	{0xff, 0x00},
672
+	{0x00, 0x10},
673
+	{0x01, 0x10},
674
+	{0x02, 0x10},
675
+	{0x03, 0x10},
676
+	{0x22, 0x0b},
677
+	{0x23, 0x41},
678
+	{0x26, 0x0b},
679
+	{0x27, 0x41},
680
+	{0x2a, 0x0b},
681
+	{0x2b, 0x41},
682
+	{0x2e, 0x0b},
683
+	{0x2f, 0x41},
576684 
577
-	{ 0xff, 0x13 },
578
-	{ 0x05, 0xa0 },
579
-	{ 0x31, 0xff },
580
-	{ 0x07, 0x47 },
581
-	{ 0x12, 0x04 },
582
-	{ 0x1e, 0x1f },
583
-	{ 0x1f, 0x27 },
584
-	{ 0x2e, 0x10 },
585
-	{ 0x2f, 0xc8 },
586
-	{ 0x31, 0xff },
587
-	{ 0x32, 0x00 },
588
-	{ 0x33, 0x00 },
589
-	{ 0x72, 0x05 },
590
-	{ 0x7a, 0xf0 },
591
-	{ 0xff, _MAR_BANK_ },
592
-	{ 0x10, 0xff },
593
-	{ 0x11, 0xff },
685
+	{0xff, 0x13},
686
+	{0x05, 0xa0},
687
+	{0x07, 0x47},
688
+	{0x12, 0x04},
689
+	{0x1e, 0x1f},
690
+	{0x1f, 0x27},
691
+	{0x2e, 0x10},
692
+	{0x2f, 0xc8},
693
+	{0x30, 0x00},
694
+	{0x31, 0xff},
695
+	{0x32, 0x00},
696
+	{0x33, 0x00},
697
+	{0x3a, 0xff},
698
+	{0x3b, 0xff},
699
+	{0x3c, 0xff},
700
+	{0x3d, 0xff},
701
+	{0x3e, 0xff},
702
+	{0x3f, 0x0f},
703
+	{0x70, 0x00},
704
+	{0x72, 0x05},
705
+	{0x7A, 0xf0},
706
+	{0x74, 0x00},
707
+	{0x76, 0x00},
708
+	{0x78, 0x00},
709
+	{0x75, 0xff},
710
+	{0x77, 0xff},
711
+	{0x79, 0xff},
712
+	{0x01, 0x0c},
713
+	{0x73, 0x23},
714
+	{0xff, _MAR_BANK_},
715
+	{0x40, 0x01},
716
+	{0x10, 0xff},
717
+	{0x11, 0xff},
718
+	{0x46, 0x49},
719
+	{0x45, 0x60},
720
+	{0x30, 0x0f},
721
+	{0x32, 0xff},
722
+	{0x34, 0xcd},
723
+	{0x36, 0x04},
724
+	{0x38, 0xff},
725
+	{0x07, 0x00},
726
+	{0x2a, 0x0a},
727
+	{0x3d, 0x11},
728
+	{0x3e, 0x11},
729
+	{0x3c, 0x01},
730
+	{0x1a, 0x92},
731
+	{0x1b, 0x00},
732
+	{0x1c, 0x00},
733
+	{0x05, 0x00},
734
+	{0x06, 0x00},
735
+	{0x0d, 0x01},
736
+	{0x00, 0x00},//mipi not enabled first
737
+	{0x40, 0x00},
594738 
595
-	{ 0x30, 0x0f },
596
-	{ 0x32, 0xff },
597
-	{ 0x34, 0xcd },
598
-	{ 0x36, 0x04 },
599
-	{ 0x38, 0xff },
600
-	{ 0x3c, 0x01 },
601
-	{ 0x3d, 0x11 },
602
-	{ 0x3e, 0x11 },
603
-	{ 0x45, 0x60 },
604
-	{ 0x46, 0x49 },
739
+	{0xff, 0x01},
740
+	//{ 0x82, 0x12 },
741
+	{0x80, 0x61},
742
+	{0x80, 0x60},
743
+	{0xa0, 0x20},
744
+	{0xa1, 0x20},
745
+	{0xa2, 0x20},
746
+	{0xa3, 0x20},
747
+	{0xed, 0x00},
605748 
606
-	{ 0xff, _MTX_BANK_ },
607
-	{ 0xe9, 0x03 },
608
-	{ 0x03, 0x02 },
609
-	{ 0x04, 0x6c },
610
-	{ 0x01, 0xe4 },
611
-	{ 0x00, 0x7d },
612
-	{ 0x01, 0xe0 },
613
-	{ 0x02, 0xa0 },
614
-	{ 0x20, 0x1e },
615
-	{ 0x20, 0x1f },
616
-	{ 0x45, 0xcd },
617
-	{ 0x46, 0x42 },
618
-	{ 0x47, 0x36 },
619
-	{ 0x48, 0x0f },
620
-	{ 0x65, 0xcd },
621
-	{ 0x66, 0x42 },
622
-	{ 0x67, 0x0e },
623
-	{ 0x68, 0x0f },
624
-	{ 0x85, 0xcd },
625
-	{ 0x86, 0x42 },
626
-	{ 0x87, 0x0e },
627
-	{ 0x88, 0x0f },
628
-	{ 0xa5, 0xcd },
629
-	{ 0xa6, 0x42 },
630
-	{ 0xa7, 0x0e },
631
-	{ 0xa8, 0x0f },
632
-	{ 0xc5, 0xcd },
633
-	{ 0xc6, 0x42 },
634
-	{ 0xc7, 0x0e },
635
-	{ 0xc8, 0x0f },
636
-	{ 0xeb, 0x8d },
749
+	{0xff, 0x00},
750
+	{0x80, 0x0f},
751
+	{0x81, 0x02},
752
+	{0x82, 0x02},
753
+	{0x83, 0x02},
754
+	{0x84, 0x02},
755
+	{0x64, 0x01},
756
+	{0x65, 0x01},
757
+	{0x66, 0x01},
758
+	{0x67, 0x01},
759
+	{0x5c, 0x80},
760
+	{0x5d, 0x80},
761
+	{0x5e, 0x80},
762
+	{0x5f, 0x80},
763
+	{0xff, 0x01},
764
+	{0x84, 0x02},
765
+	{0x85, 0x02},
766
+	{0x86, 0x02},
767
+	{0x87, 0x02},
768
+	{0x8c, 0x40},
769
+	{0x8d, 0x40},
770
+	{0x8e, 0x40},
771
+	{0x8f, 0x40},
772
+	{0xff, 0x20},
773
+	{0x01, 0x00},
774
+	{0x12, 0xc0},
775
+	{0x13, 0x03},
776
+	{0x14, 0xc0},
777
+	{0x15, 0x03},
778
+	{0x16, 0xc0},
779
+	{0x17, 0x03},
780
+	{0x18, 0xc0},
781
+	{0x19, 0x03},
782
+	{0xff, 0x01},
783
+	{0x97, 0xf0},
784
+	{0x97, 0x0f},
637785 
638
-	{ 0xff, _MAR_BANK_ },
639
-	{ 0x00, 0x00 }, //close mipi
640
-	{ 0x40, 0x01 },
641
-	{ 0x40, 0x00 },
642
-	{ 0xff, 0x01 },
643
-	{ 0x97, 0x00 },
644
-	{ 0x97, 0x0f },
645
-
646
-	{ 0xff, 0x00 },  //test pattern
647
-	{ 0x78, 0x88 },
648
-	{ 0x79, 0x88 },
649
-	{ 0xff, 0x05 },
650
-	{ 0x2c, 0x08 },
651
-	{ 0x6a, 0x00 },
652
-	{ 0xff, 0x06 },
653
-	{ 0x2c, 0x08 },
654
-	{ 0x6a, 0x00 },
655
-	{ 0xff, 0x07 },
656
-	{ 0x2c, 0x08 },
657
-	{ 0x6a, 0x00 },
658
-	{ 0xff, 0x08 },
659
-	{ 0x2c, 0x08 },
660
-	{ 0x6a, 0x00 },
661
-};
662
-
663
-static __maybe_unused const struct regval auto_detect_regs[] = {
664
-	{ 0xFF, 0x13 },
665
-	{ 0x30, 0x7f },
666
-	{ 0x70, 0xf0 },
667
-
668
-	{ 0xFF, 0x00 },
669
-	{ 0x00, 0x18 },
670
-	{ 0x01, 0x18 },
671
-	{ 0x02, 0x18 },
672
-	{ 0x03, 0x18 },
673
-
674
-	{ 0x00, 0x10 },
675
-	{ 0x01, 0x10 },
676
-	{ 0x02, 0x10 },
677
-	{ 0x03, 0x10 },
786
+	{0xff, 0x00},  //test pattern
787
+	{0x78, 0x88},
788
+	{0x79, 0x88},
789
+	{0xff, 0x05},
790
+	{0x2c, 0x08},
791
+	{0x6a, 0x00},
792
+	{0xff, 0x06},
793
+	{0x2c, 0x08},
794
+	{0x6a, 0x00},
795
+	{0xff, 0x07},
796
+	{0x2c, 0x08},
797
+	{0x6a, 0x00},
798
+	{0xff, 0x08},
799
+	{0x2c, 0x08},
800
+	{0x6a, 0x00},
678801 };
679802 
680803 static struct nvp6188_mode supported_modes[] = {
....@@ -808,51 +931,29 @@
808931 	return ret;
809932 }
810933 
934
+static int nv6188_read_htotal(struct nvp6188 *nvp6188, unsigned char ch)
935
+{
936
+	int ch_htotal = 0;
937
+	unsigned char val_5xf2 = 0, val_5xf3 = 0;
938
+	struct i2c_client *client = nvp6188->client;
939
+
940
+	nvp6188_write_reg(client, 0xff, 0x05 + ch);
941
+	nvp6188_read_reg(client, 0xf2, &val_5xf2);
942
+	nvp6188_read_reg(client, 0xf3, &val_5xf3);
943
+	ch_htotal = ((val_5xf3 << 8) | val_5xf2);
944
+
945
+	return ch_htotal;
946
+}
947
+
811948 static unsigned char nv6188_read_vfc(struct nvp6188 *nvp6188, unsigned char ch)
812949 {
813950 	unsigned char ch_vfc = 0xff;
814951 	struct i2c_client *client = nvp6188->client;
952
+
815953 	nvp6188_write_reg(client, 0xff, 0x05 + ch);
816954 	nvp6188_read_reg(client, 0xf0, &ch_vfc);
955
+
817956 	return ch_vfc;
818
-}
819
-
820
-static __maybe_unused int nvp6188_read_all_vfc(struct nvp6188 *nvp6188,
821
-					       u8 *ch_vfc)
822
-{
823
-	int ret = 0;
824
-	int check_cnt = 0, ch = 0;
825
-	struct i2c_client *client = nvp6188->client;
826
-
827
-	ret = nvp6188_write_array(client,
828
-		auto_detect_regs, ARRAY_SIZE(auto_detect_regs));
829
-	if (ret) {
830
-		dev_err(&client->dev, "write auto_detect_regs faild %d", ret);
831
-	}
832
-
833
-	while ((check_cnt++) < 50) {
834
-		for (ch = 0; ch < 4; ch++) {
835
-			ch_vfc[ch] = nv6188_read_vfc(nvp6188, ch);
836
-		}
837
-		if (ch_vfc[0] != 0xff || ch_vfc[1] != 0xff ||
838
-		    ch_vfc[2] != 0xff || ch_vfc[3] != 0xff) {
839
-			ret = 0;
840
-			if (ch == 3) {
841
-				dev_dbg(&client->dev, "try check cnt %d",check_cnt);
842
-				break;
843
-			}
844
-		} else {
845
-			usleep_range(20 * 1000, 40 * 1000);
846
-		}
847
-	}
848
-
849
-	if (ret) {
850
-		dev_err(&client->dev, "read vfc faild %d", ret);
851
-	} else {
852
-		dev_dbg(&client->dev, "read vfc 0x%2x 0x%2x 0x%2x 0x%2x",
853
-				ch_vfc[0], ch_vfc[1], ch_vfc[2], ch_vfc[3]);
854
-	}
855
-	return ret;
856957 }
857958 
858959 static __maybe_unused int nvp6188_auto_detect_hotplug(struct nvp6188 *nvp6188)
....@@ -924,8 +1025,8 @@
9241025 		__v4l2_ctrl_s_ctrl(nvp6188->link_freq, mode->mipi_freq_idx);
9251026 		pixel_rate = (u32)link_freq_items[mode->mipi_freq_idx] / mode->bpp * 2 * NVP6188_LANES;
9261027 		__v4l2_ctrl_s_ctrl_int64(nvp6188->pixel_rate, pixel_rate);
927
-		dev_err(&nvp6188->client->dev, "mipi_freq_idx %d\n", mode->mipi_freq_idx);
928
-		dev_err(&nvp6188->client->dev, "pixel_rate %lld\n", pixel_rate);
1028
+		dev_info(&nvp6188->client->dev, "mipi_freq_idx %d\n", mode->mipi_freq_idx);
1029
+		dev_info(&nvp6188->client->dev, "pixel_rate %lld\n", pixel_rate);
9291030 	}
9301031 
9311032 	mutex_unlock(&nvp6188->mutex);
....@@ -981,6 +1082,21 @@
9811082 	return 0;
9821083 }
9831084 
1085
+static int nvp6188_enum_frame_interval(struct v4l2_subdev *sd,
1086
+				       struct v4l2_subdev_pad_config *cfg,
1087
+				       struct v4l2_subdev_frame_interval_enum *fie)
1088
+{
1089
+	if (fie->index >= ARRAY_SIZE(supported_modes))
1090
+		return -EINVAL;
1091
+
1092
+	fie->code = supported_modes[fie->index].bus_fmt;
1093
+	fie->width = supported_modes[fie->index].width;
1094
+	fie->height = supported_modes[fie->index].height;
1095
+	fie->interval = supported_modes[fie->index].max_fps;
1096
+
1097
+	return 0;
1098
+}
1099
+
9841100 static int nvp6188_enum_frame_sizes(struct v4l2_subdev *sd,
9851101 				    struct v4l2_subdev_pad_config *cfg,
9861102 				    struct v4l2_subdev_frame_size_enum *fse)
....@@ -1003,12 +1119,25 @@
10031119 	return 0;
10041120 }
10051121 
1006
-static int nvp6188_g_mbus_config(struct v4l2_subdev *sd,
1122
+static int nvp6188_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
10071123 				 struct v4l2_mbus_config *cfg)
10081124 {
1009
-	cfg->type = V4L2_MBUS_CSI2;
1125
+	cfg->type = V4L2_MBUS_CSI2_DPHY;
10101126 	cfg->flags = V4L2_MBUS_CSI2_4_LANE |
10111127 		     V4L2_MBUS_CSI2_CHANNELS;
1128
+
1129
+	return 0;
1130
+}
1131
+
1132
+static int nvp6188_g_frame_interval(struct v4l2_subdev *sd,
1133
+				    struct v4l2_subdev_frame_interval *fi)
1134
+{
1135
+	struct nvp6188 *nvp6188 = to_nvp6188(sd);
1136
+	const struct nvp6188_mode *mode = &nvp6188->cur_mode;
1137
+
1138
+	mutex_lock(&nvp6188->mutex);
1139
+	fi->interval = mode->max_fps;
1140
+	mutex_unlock(&nvp6188->mutex);
10121141 
10131142 	return 0;
10141143 }
....@@ -1028,8 +1157,8 @@
10281157 {
10291158 	int ch = 0;
10301159 	static u32 last_channel_reso[PAD_MAX] = {NVP_RESO_UNKOWN};
1031
-
10321160 	memset(inf, 0, sizeof(*inf));
1161
+
10331162 	for (ch = 0; ch < PAD_MAX; ch++) {
10341163 		//Maintain last resolution modify by cairufan
10351164 		if (nvp6188->cur_mode.channel_reso[ch] != NVP_RESO_UNKOWN)
....@@ -1071,6 +1200,16 @@
10711200 				inf->height[ch] = 1080;
10721201 				inf->fps[ch] = 25;
10731202 			break;
1203
+		case NVP_RESO_1300P_NSTC:
1204
+				inf->width[ch] = 1600;
1205
+				inf->height[ch] = 1300;
1206
+				inf->fps[ch] = 30;
1207
+			break;
1208
+		case NVP_RESO_1300P_PAL:
1209
+				inf->width[ch] = 1600;
1210
+				inf->height[ch] = 1300;
1211
+				inf->fps[ch] = 25;
1212
+			break;
10741213 		case NVP_RESO_1080P_NSTC:
10751214 			default:
10761215 				inf->width[ch] = 1920;
....@@ -1107,18 +1246,8 @@
11071246 	struct i2c_client *client = nvp6188->client;
11081247 
11091248 	dev_info(&client->dev, "%s: on: %d\n", __func__, on);
1110
-
1111
-	mutex_lock(&nvp6188->mutex);
1112
-
1113
-	if (on) {
1114
-		nvp6188_write_reg(client, 0xff, 0x20);
1115
-		nvp6188_write_reg(client, 0xff, 0xff);
1116
-	} else {
1117
-		nvp6188_write_reg(client, 0xff, 0x20);
1118
-		nvp6188_write_reg(client, 0xff, 0x00);
1119
-	}
1120
-
1121
-	mutex_unlock(&nvp6188->mutex);
1249
+	if (!on)
1250
+		usleep_range(40 * 1000, 50 * 1000);
11221251 }
11231252 
11241253 static long nvp6188_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
....@@ -1292,6 +1421,7 @@
12921421  */
12931422 static __maybe_unused void nv6188_set_chn_960p(struct nvp6188 *nvp6188, u8 ch,
12941423 							u8 ntpal)
1424
+
12951425 {
12961426 	unsigned char val_0x54 = 0, val_20x01 = 0;
12971427 	struct i2c_client *client = nvp6188->client;
....@@ -1299,27 +1429,29 @@
12991429 	dev_info(&client->dev, "%s: ch %d ntpal %d", __func__, ch, ntpal);
13001430 
13011431 	nvp6188_write_reg(client, 0xff, 0x00);
1302
-	nvp6188_write_reg(client, 0x08+ch, 0x00);
1303
-	nvp6188_write_reg(client, 0x18+ch, 0x0f);
1304
-	nvp6188_write_reg(client, 0x30+ch, 0x12);
1305
-	nvp6188_write_reg(client, 0x34+ch, 0x00);
1432
+	nvp6188_write_reg(client, 0x00 + ch, 0x10);
1433
+	nvp6188_write_reg(client, 0x08 + ch, 0x00);
1434
+	nvp6188_write_reg(client, 0x18 + ch, 0x0f);
1435
+	nvp6188_write_reg(client, 0x30 + ch, 0x12);
1436
+	nvp6188_write_reg(client, 0x34 + ch, 0x00);
13061437 	nvp6188_read_reg(client, 0x54, &val_0x54);
1307
-	val_0x54 &= ~(0x10<<ch);
1438
+	val_0x54 &= ~(0x10 << ch);
13081439 	nvp6188_write_reg(client, 0x54, val_0x54);
1309
-	nvp6188_write_reg(client, 0x58+ch, ntpal?0x40:0x48);
1310
-	nvp6188_write_reg(client, 0x5c+ch, ntpal?0x80:0x80);
1311
-	nvp6188_write_reg(client, 0x64+ch, ntpal?0x28:0x28);
1312
-	nvp6188_write_reg(client, 0x81+ch, ntpal?0x07:0x06);
1313
-	nvp6188_write_reg(client, 0x85+ch, 0x0b);
1314
-	nvp6188_write_reg(client, 0x89+ch, 0x00);
1315
-	nvp6188_write_reg(client, ch+0x8e, 0x00);
1316
-	nvp6188_write_reg(client, 0xa0+ch, 0x05);
1440
+	nvp6188_write_reg(client, 0x58 + ch, ntpal ? 0x40 : 0x48);
1441
+	nvp6188_write_reg(client, 0x5c + ch, ntpal ? 0x80 : 0x80);
1442
+	nvp6188_write_reg(client, 0x64 + ch, ntpal ? 0x28 : 0x28);
1443
+	nvp6188_write_reg(client, 0x81 + ch, ntpal ? 0x07 : 0x06);
1444
+	nvp6188_write_reg(client, 0x85 + ch, 0x0b);
1445
+	nvp6188_write_reg(client, 0x89 + ch, 0x00);
1446
+	nvp6188_write_reg(client, 0x8e + ch, 0x00);
1447
+	nvp6188_write_reg(client, 0xa0 + ch, 0x05);
13171448 	nvp6188_write_reg(client, 0xff, 0x01);
1318
-	nvp6188_write_reg(client, 0x84+ch, 0x02);
1319
-	nvp6188_write_reg(client, 0x88+ch, 0x00);
1320
-	nvp6188_write_reg(client, 0x8c+ch, 0x40);
1321
-	nvp6188_write_reg(client, 0xa0+ch, 0x20);
1322
-	nvp6188_write_reg(client, 0xff, 0x05+ch);
1449
+	nvp6188_write_reg(client, 0x84 + ch, 0x02);
1450
+	nvp6188_write_reg(client, 0x88 + ch, 0x00);
1451
+	nvp6188_write_reg(client, 0x8c + ch, 0x40);
1452
+	nvp6188_write_reg(client, 0xa0 + ch, 0x20);
1453
+	nvp6188_write_reg(client, 0xff, 0x05 + ch);
1454
+	nvp6188_write_reg(client, 0x00, 0xd0);
13231455 	nvp6188_write_reg(client, 0x01, 0x22);
13241456 	nvp6188_write_reg(client, 0x05, 0x04);
13251457 	nvp6188_write_reg(client, 0x08, 0x55);
....@@ -1353,16 +1485,18 @@
13531485 	nvp6188_write_reg(client, 0xd1, 0x00);
13541486 	nvp6188_write_reg(client, 0xd5, 0x80);
13551487 	nvp6188_write_reg(client, 0xff, 0x09);
1356
-	nvp6188_write_reg(client, 0x96+ch*0x20, 0x00);
1357
-	nvp6188_write_reg(client, 0x98+ch*0x20, 0x00);
1358
-	nvp6188_write_reg(client, ch*0x20+0x9e, 0x00);
1488
+	nvp6188_write_reg(client, 0x96 + (ch * 0x20), 0x00);
1489
+	nvp6188_write_reg(client, 0x98 + (ch * 0x20), 0x00);
1490
+	nvp6188_write_reg(client, 0x9e + (ch * 0x20), 0x00);
1491
+	nvp6188_write_reg(client, 0xff, 0x11);
1492
+	nvp6188_write_reg(client, 0x00 + (ch * 0x20), 0x00);
13591493 	nvp6188_write_reg(client, 0xff, _MAR_BANK_);
13601494 	nvp6188_read_reg(client, 0x01, &val_20x01);
1361
-	val_20x01 &= (~(0x03<<(ch*2)));
1495
+	val_20x01 &= (~(0x03 << (ch * 2)));
13621496 	//val_20x01 |=(0x01<<(ch*2));
13631497 	nvp6188_write_reg(client, 0x01, val_20x01);
1364
-	nvp6188_write_reg(client, 0x12+ch*2, 0x80);
1365
-	nvp6188_write_reg(client, 0x13+ch*2, 0x02);
1498
+	nvp6188_write_reg(client, 0x12 + (ch * 2), 0x80);
1499
+	nvp6188_write_reg(client, 0x13 + (ch * 2), 0x02);
13661500 }
13671501 
13681502 //each channel setting
....@@ -1377,9 +1511,9 @@
13771511 	unsigned char val_0x54 = 0, val_20x01 = 0;
13781512 	struct i2c_client *client = nvp6188->client;
13791513 
1380
-	dev_info(&client->dev, "%s: ch %d ntpal %d", __func__, ch, ntpal);
1381
-
1514
+	dev_err(&client->dev, "%s: ch %d ntpal %d", __func__, ch, ntpal);
13821515 	nvp6188_write_reg(client, 0xff, 0x00);
1516
+	nvp6188_write_reg(client, 0x00 + ch, 0x10);
13831517 	nvp6188_write_reg(client, 0x08 + ch, ntpal ? 0xdd : 0xa0);
13841518 	nvp6188_write_reg(client, 0x18 + ch, 0x08);
13851519 	nvp6188_write_reg(client, 0x22 + ch * 4, 0x0b);
....@@ -1398,17 +1532,16 @@
13981532 	nvp6188_write_reg(client, 0x81 + ch, ntpal ? 0xf0 : 0xe0);
13991533 	nvp6188_write_reg(client, 0x85 + ch, 0x00);
14001534 	nvp6188_write_reg(client, 0x89 + ch, 0x00);
1401
-	nvp6188_write_reg(client, ch + 0x8e, 0x00);
1535
+	nvp6188_write_reg(client, 0x8e + ch, 0x00);
14021536 	nvp6188_write_reg(client, 0xa0 + ch, 0x05);
1403
-
14041537 	nvp6188_write_reg(client, 0xff, 0x01);
14051538 	nvp6188_write_reg(client, 0x84 + ch, 0x02);
14061539 	nvp6188_write_reg(client, 0x88 + ch, 0x00);
14071540 	nvp6188_write_reg(client, 0x8c + ch, 0x40);
14081541 	nvp6188_write_reg(client, 0xa0 + ch, 0x20);
14091542 	nvp6188_write_reg(client, 0xed, 0x00);
1410
-
14111543 	nvp6188_write_reg(client, 0xff, 0x05 + ch);
1544
+	nvp6188_write_reg(client, 0x00, 0xd0);
14121545 	nvp6188_write_reg(client, 0x01, 0x22);
14131546 	nvp6188_write_reg(client, 0x05, 0x00);
14141547 	nvp6188_write_reg(client, 0x08, 0x55);
....@@ -1437,19 +1570,19 @@
14371570 	nvp6188_write_reg(client, 0xb9, 0x72);
14381571 	nvp6188_write_reg(client, 0xd1, 0x00);
14391572 	nvp6188_write_reg(client, 0xd5, 0x80);
1440
-
14411573 	nvp6188_write_reg(client, 0xff, 0x09);
1442
-	nvp6188_write_reg(client, 0x96 + ch * 0x20, 0x10);
1443
-	nvp6188_write_reg(client, 0x98 + ch * 0x20, ntpal ? 0xc0 : 0xe0);
1444
-	nvp6188_write_reg(client, ch * 0x20 + 0x9e, 0x00);
1445
-
1574
+	nvp6188_write_reg(client, 0x96 + (ch * 0x20), 0x10);
1575
+	nvp6188_write_reg(client, 0x98 + (ch * 0x20), ntpal ? 0xc0 : 0xe0);
1576
+	nvp6188_write_reg(client, 0x9e + (ch * 0x20), 0x00);
1577
+	nvp6188_write_reg(client, 0xff, 0x11);
1578
+	nvp6188_write_reg(client, 0x00 + (ch * 0x20), 0x00);
14461579 	nvp6188_write_reg(client, 0xff, _MAR_BANK_);
14471580 	nvp6188_read_reg(client, 0x01, &val_20x01);
14481581 	val_20x01 &= (~(0x03 << (ch * 2)));
14491582 	val_20x01 |= (0x02 << (ch * 2));
14501583 	nvp6188_write_reg(client, 0x01, val_20x01);
1451
-	nvp6188_write_reg(client, 0x12 + ch * 2, 0xe0);
1452
-	nvp6188_write_reg(client, 0x13 + ch * 2, 0x01);
1584
+	nvp6188_write_reg(client, 0x12 + (ch * 2), 0xe0);
1585
+	nvp6188_write_reg(client, 0x13 + (ch * 2), 0x01);
14531586 }
14541587 
14551588 //each channel setting
....@@ -1465,10 +1598,10 @@
14651598 	struct i2c_client *client = nvp6188->client;
14661599 
14671600 	dev_info(&client->dev, "%s: ch %d ntpal %d", __func__, ch, ntpal);
1468
-
14691601 	nvp6188_write_reg(client, 0xff, 0x00);
1602
+	nvp6188_write_reg(client, 0x00 + ch, 0x00);
14701603 	nvp6188_write_reg(client, 0x08 + ch, 0x00);
1471
-	nvp6188_write_reg(client, 0x18 + ch, 0x3f);
1604
+	nvp6188_write_reg(client, 0x18 + ch, 0x10);
14721605 	nvp6188_write_reg(client, 0x30 + ch, 0x12);
14731606 	nvp6188_write_reg(client, 0x34 + ch, 0x00);
14741607 	nvp6188_read_reg(client, 0x54, &val_0x54);
....@@ -1480,16 +1613,15 @@
14801613 	nvp6188_write_reg(client, 0x81 + ch, ntpal ? 0x0d : 0x0c);
14811614 	nvp6188_write_reg(client, 0x85 + ch, 0x00);
14821615 	nvp6188_write_reg(client, 0x89 + ch, 0x00);
1483
-	nvp6188_write_reg(client, ch + 0x8e, 0x00);
1616
+	nvp6188_write_reg(client, 0x8e + ch, 0x00);
14841617 	nvp6188_write_reg(client, 0xa0 + ch, 0x05);
1485
-
14861618 	nvp6188_write_reg(client, 0xff, 0x01);
14871619 	nvp6188_write_reg(client, 0x84 + ch, 0x02);
14881620 	nvp6188_write_reg(client, 0x88 + ch, 0x00);
14891621 	nvp6188_write_reg(client, 0x8c + ch, 0x40);
14901622 	nvp6188_write_reg(client, 0xa0 + ch, 0x20);
1491
-
14921623 	nvp6188_write_reg(client, 0xff, 0x05 + ch);
1624
+	nvp6188_write_reg(client, 0x00, 0xf0);
14931625 	nvp6188_write_reg(client, 0x01, 0x22);
14941626 	nvp6188_write_reg(client, 0x05, 0x04);
14951627 	nvp6188_write_reg(client, 0x08, 0x55);
....@@ -1499,38 +1631,38 @@
14991631 	nvp6188_write_reg(client, 0x30, 0xe0);
15001632 	nvp6188_write_reg(client, 0x31, 0x43);
15011633 	nvp6188_write_reg(client, 0x32, 0xa2);
1502
-	nvp6188_write_reg(client, 0x47, 0xee);
1503
-	nvp6188_write_reg(client, 0x50, 0xc6);
1634
+	nvp6188_write_reg(client, 0x47, 0x04);
1635
+	nvp6188_write_reg(client, 0x50, 0x84);
15041636 	nvp6188_write_reg(client, 0x57, 0x00);
15051637 	nvp6188_write_reg(client, 0x58, 0x77);
15061638 	nvp6188_write_reg(client, 0x5b, 0x41);
1507
-	nvp6188_write_reg(client, 0x5c, 0x7C);
1639
+	nvp6188_write_reg(client, 0x5c, 0x78);
15081640 	nvp6188_write_reg(client, 0x5f, 0x00);
1509
-	nvp6188_write_reg(client, 0x62, 0x20);
1641
+	nvp6188_write_reg(client, 0x62, 0x00);
15101642 	nvp6188_write_reg(client, 0x7b, 0x11);
15111643 	nvp6188_write_reg(client, 0x7c, 0x01);
15121644 	nvp6188_write_reg(client, 0x7d, 0x80);
15131645 	nvp6188_write_reg(client, 0x80, 0x00);
15141646 	nvp6188_write_reg(client, 0x90, 0x01);
15151647 	nvp6188_write_reg(client, 0xa9, 0x00);
1516
-	nvp6188_write_reg(client, 0xb5, 0x40);
1517
-	nvp6188_write_reg(client, 0xb8, 0x39);
1648
+	nvp6188_write_reg(client, 0xb5, 0x00);
1649
+	nvp6188_write_reg(client, 0xb8, 0xb9);
15181650 	nvp6188_write_reg(client, 0xb9, 0x72);
15191651 	nvp6188_write_reg(client, 0xd1, 0x00);
15201652 	nvp6188_write_reg(client, 0xd5, 0x80);
1521
-
15221653 	nvp6188_write_reg(client, 0xff, 0x09);
1523
-	nvp6188_write_reg(client, 0x96 + ch * 0x20, 0x00);
1524
-	nvp6188_write_reg(client, 0x98 + ch * 0x20, 0x00);
1525
-	nvp6188_write_reg(client, ch * 0x20 + 0x9e, 0x00);
1526
-
1654
+	nvp6188_write_reg(client, 0x96 + (ch * 0x20), 0x00);
1655
+	nvp6188_write_reg(client, 0x98 + (ch * 0x20), 0x00);
1656
+	nvp6188_write_reg(client, 0x9e + (ch * 0x20), 0x00);
1657
+	nvp6188_write_reg(client, 0xff, 0x11);
1658
+	nvp6188_write_reg(client, 0x00 + (ch * 0x20), 0x00);
15271659 	nvp6188_write_reg(client, 0xff, _MAR_BANK_);
15281660 	nvp6188_read_reg(client, 0x01, &val_20x01);
15291661 	val_20x01 &= (~(0x03 << (ch * 2)));
15301662 	val_20x01 |= (0x01 << (ch * 2));
15311663 	nvp6188_write_reg(client, 0x01, val_20x01);
1532
-	nvp6188_write_reg(client, 0x12 + ch * 2, 0x80);
1533
-	nvp6188_write_reg(client, 0x13 + ch * 2, 0x02);
1664
+	nvp6188_write_reg(client, 0x12 + (ch * 2), 0x80);
1665
+	nvp6188_write_reg(client, 0x13 + (ch * 2), 0x02);
15341666 }
15351667 
15361668 //each channel setting
....@@ -1545,10 +1677,11 @@
15451677 	unsigned char val_0x54 = 0, val_20x01 = 0;
15461678 	struct i2c_client *client = nvp6188->client;
15471679 
1548
-	dev_info(&client->dev, "%s: ch %d ntpal %d", __func__, ch, ntpal);
1680
+	dev_info(&client->dev, "%s ch %d ntpal %d", __func__, ch, ntpal);
15491681 	nvp6188_write_reg(client, 0xff, 0x00);
1682
+	nvp6188_write_reg(client, 0x00 + ch, 0x10);
15501683 	nvp6188_write_reg(client, 0x08 + ch, 0x00);
1551
-	nvp6188_write_reg(client, 0x18 + ch, 0x3f);
1684
+	nvp6188_write_reg(client, 0x18 + ch, 0x10);
15521685 	nvp6188_write_reg(client, 0x30 + ch, 0x12);
15531686 	nvp6188_write_reg(client, 0x34 + ch, 0x00);
15541687 	nvp6188_read_reg(client, 0x54, &val_0x54);
....@@ -1560,16 +1693,15 @@
15601693 	nvp6188_write_reg(client, 0x81 + ch, ntpal ? 0x03 : 0x02);
15611694 	nvp6188_write_reg(client, 0x85 + ch, 0x00);
15621695 	nvp6188_write_reg(client, 0x89 + ch, 0x10);
1563
-	nvp6188_write_reg(client, ch + 0x8e, 0x00);
1696
+	nvp6188_write_reg(client, 0x8e + ch, 0x00);
15641697 	nvp6188_write_reg(client, 0xa0 + ch, 0x05);
1565
-
15661698 	nvp6188_write_reg(client, 0xff, 0x01);
15671699 	nvp6188_write_reg(client, 0x84 + ch, 0x02);
15681700 	nvp6188_write_reg(client, 0x88 + ch, 0x00);
15691701 	nvp6188_write_reg(client, 0x8c + ch, 0x40);
15701702 	nvp6188_write_reg(client, 0xa0 + ch, 0x20);
1571
-
15721703 	nvp6188_write_reg(client, 0xff, 0x05 + ch);
1704
+	nvp6188_write_reg(client, 0x00, 0xd0);
15731705 	nvp6188_write_reg(client, 0x01, 0x22);
15741706 	nvp6188_write_reg(client, 0x05, 0x04);
15751707 	nvp6188_write_reg(client, 0x08, 0x55);
....@@ -1598,18 +1730,115 @@
15981730 	nvp6188_write_reg(client, 0xb9, 0x72);
15991731 	nvp6188_write_reg(client, 0xd1, 0x00);
16001732 	nvp6188_write_reg(client, 0xd5, 0x80);
1601
-
16021733 	nvp6188_write_reg(client, 0xff, 0x09);
1603
-	nvp6188_write_reg(client, 0x96 + ch * 0x20, 0x00);
1604
-	nvp6188_write_reg(client, 0x98 + ch * 0x20, 0x00);
1605
-	nvp6188_write_reg(client, ch * 0x20 + 0x9e, 0x00);
1606
-
1734
+	nvp6188_write_reg(client, 0x96 + (ch * 0x20), 0x00);
1735
+	nvp6188_write_reg(client, 0x98 + (ch * 0x20), 0x00);
1736
+	nvp6188_write_reg(client, 0x9e + (ch * 0x20), 0x00);
1737
+	nvp6188_write_reg(client, 0xff, 0x11);
1738
+	nvp6188_write_reg(client, 0x00 + (ch * 0x20), 0x00);
16071739 	nvp6188_write_reg(client, 0xff, _MAR_BANK_);
16081740 	nvp6188_read_reg(client, 0x01, &val_20x01);
16091741 	val_20x01 &= (~(0x03 << (ch * 2)));
16101742 	nvp6188_write_reg(client, 0x01, val_20x01);
1611
-	nvp6188_write_reg(client, 0x12 + ch * 2, 0xc0);
1612
-	nvp6188_write_reg(client, 0x13 + ch * 2, 0x03);
1743
+	nvp6188_write_reg(client, 0x12 + (ch * 2), 0xc0);
1744
+	nvp6188_write_reg(client, 0x13 + (ch * 2), 0x03);
1745
+}
1746
+
1747
+//each channel setting
1748
+/*
1749
+ * 1600x1300p
1750
+ * dev:0x60 / 0x62 / 0x64 / 0x66
1751
+ * ch : 0 ~ 3
1752
+ * ntpal: 1:25p, 0:30p
1753
+ * detection: 5xf3<<8 | 5xf2 = 0x0708(30p) =0x0870(25p)
1754
+ */
1755
+static void nv6188_set_chn_1300p(struct nvp6188 *nvp6188, unsigned char ch, unsigned char ntpal)
1756
+{
1757
+	unsigned char val_0x54 = 0, val_20x01 = 0;
1758
+	struct i2c_client *client = nvp6188->client;
1759
+
1760
+	dev_info(&client->dev, "%s ch %d ntpal %d", __func__, ch, ntpal);
1761
+
1762
+	nvp6188_write_reg(client, 0xff, 0x00);
1763
+	nvp6188_write_reg(client, 0x00 + ch, 0x10);
1764
+	nvp6188_write_reg(client, 0x08 + ch, 0x00);
1765
+	nvp6188_write_reg(client, 0x18 + ch, 0x10);
1766
+	nvp6188_write_reg(client, 0x30 + ch, 0x12);
1767
+	nvp6188_write_reg(client, 0x34 + ch, 0x00);
1768
+	nvp6188_read_reg(client, 0x54, &val_0x54);
1769
+	val_0x54 &= ~(0x10 << ch);
1770
+	nvp6188_write_reg(client, 0x54, val_0x54);
1771
+	nvp6188_write_reg(client, 0x58 + ch, ntpal ? 0x80 : 0x80);
1772
+	nvp6188_write_reg(client, 0x5c + ch, ntpal ? 0x80 : 0x80);
1773
+	nvp6188_write_reg(client, 0x64 + ch, ntpal ? 0x00 : 0x01);
1774
+	nvp6188_write_reg(client, 0x81 + ch, ntpal ? 0x03 : 0x02);
1775
+	nvp6188_write_reg(client, 0x85 + ch, 0x00);
1776
+	nvp6188_write_reg(client, 0x89 + ch, 0x10);
1777
+	nvp6188_write_reg(client, 0x8e + ch, 0x00);
1778
+	nvp6188_write_reg(client, 0xa0 + ch, 0x05);
1779
+	nvp6188_write_reg(client, 0xff, 0x01);
1780
+	nvp6188_write_reg(client, 0x84 + ch, 0x02);
1781
+	nvp6188_write_reg(client, 0x88 + ch, 0x00);
1782
+	nvp6188_write_reg(client, 0x8c + ch, 0x40);
1783
+	nvp6188_write_reg(client, 0xa0 + ch, 0x20);
1784
+	nvp6188_write_reg(client, 0xff, 0x05 + ch);
1785
+	nvp6188_write_reg(client, 0x00, 0xd0);
1786
+	nvp6188_write_reg(client, 0x01, 0x22);
1787
+	nvp6188_write_reg(client, 0x05, 0x04);
1788
+	nvp6188_write_reg(client, 0x08, 0x55);
1789
+	nvp6188_write_reg(client, 0x25, 0xdc);
1790
+	nvp6188_write_reg(client, 0x28, 0x80);
1791
+	nvp6188_write_reg(client, 0x2f, 0x00);
1792
+	nvp6188_write_reg(client, 0x30, 0xe0);
1793
+	nvp6188_write_reg(client, 0x31, 0x41);
1794
+	nvp6188_write_reg(client, 0x32, 0xa2);
1795
+	nvp6188_write_reg(client, 0x47, 0xee);
1796
+	nvp6188_write_reg(client, 0x50, 0xc6);
1797
+	nvp6188_write_reg(client, 0x57, 0x00);
1798
+	nvp6188_write_reg(client, 0x58, 0x77);
1799
+	nvp6188_write_reg(client, 0x5b, 0x41);
1800
+	nvp6188_write_reg(client, 0x5c, 0x78);
1801
+	nvp6188_write_reg(client, 0x5f, 0x00);
1802
+	nvp6188_write_reg(client, 0x62, 0x00);
1803
+	nvp6188_write_reg(client, 0x6C, 0x00);
1804
+	nvp6188_write_reg(client, 0x6d, 0x00);
1805
+	nvp6188_write_reg(client, 0x6e, 0x00);
1806
+	nvp6188_write_reg(client, 0x6f, 0x00);
1807
+	nvp6188_write_reg(client, 0x7b, 0x11);
1808
+	nvp6188_write_reg(client, 0x7c, 0x01);
1809
+	nvp6188_write_reg(client, 0x7d, 0x80);
1810
+	nvp6188_write_reg(client, 0x80, 0x00);
1811
+	nvp6188_write_reg(client, 0x90, 0x01);
1812
+	nvp6188_write_reg(client, 0xa9, 0x00);
1813
+	nvp6188_write_reg(client, 0xb5, 0x00);
1814
+	nvp6188_write_reg(client, 0xb8, 0xb9);
1815
+	nvp6188_write_reg(client, 0xb9, 0x72);
1816
+	nvp6188_write_reg(client, 0xd1, 0x00);
1817
+	nvp6188_write_reg(client, 0xd5, 0x80);
1818
+	nvp6188_write_reg(client, 0xff, 0x09);
1819
+	nvp6188_write_reg(client, 0x96 + (ch * 0x20), 0x00);
1820
+	nvp6188_write_reg(client, 0x98 + (ch * 0x20), 0x00);
1821
+	nvp6188_write_reg(client, 0x9e + (ch * 0x20), 0x00);
1822
+	nvp6188_write_reg(client, 0xff, 0x11);  //additional settings for 1300p
1823
+	nvp6188_write_reg(client, 0x01 + (ch * 0x20), ntpal ? 0x01 : 0x00);
1824
+	nvp6188_write_reg(client, 0x02 + (ch * 0x20), ntpal ? 0xb2 : 0x50);
1825
+	nvp6188_write_reg(client, 0x03 + (ch * 0x20), 0x06);
1826
+	nvp6188_write_reg(client, 0x04 + (ch * 0x20), 0x40);
1827
+	nvp6188_write_reg(client, 0x05 + (ch * 0x20), ntpal ? 0x08 : 0x07);
1828
+	nvp6188_write_reg(client, 0x06 + (ch * 0x20), ntpal ? 0x70 : 0x08);
1829
+	nvp6188_write_reg(client, 0x07 + (ch * 0x20), 0x00);
1830
+	nvp6188_write_reg(client, 0x08 + (ch * 0x20), 0x00);
1831
+	nvp6188_write_reg(client, 0x0a + (ch * 0x20), 0x05);
1832
+	nvp6188_write_reg(client, 0x0b + (ch * 0x20), 0x14);
1833
+	nvp6188_write_reg(client, 0x0c + (ch * 0x20), 0x05);
1834
+	nvp6188_write_reg(client, 0x0d + (ch * 0x20), 0x5f);
1835
+	nvp6188_write_reg(client, 0x00 + (ch * 0x20), 0x03);
1836
+	nvp6188_write_reg(client, 0xff, 0x20);
1837
+	nvp6188_read_reg(client, 0x01, &val_20x01);
1838
+	val_20x01 &= (~(0x03 << (ch * 2)));
1839
+	nvp6188_write_reg(client, 0x01, val_20x01);
1840
+	nvp6188_write_reg(client, 0x12 + (ch * 2), 0x20);
1841
+	nvp6188_write_reg(client, 0x13 + (ch * 2), 0x03);
16131842 }
16141843 
16151844 static __maybe_unused void nvp6188_manual_mode(struct nvp6188 *nvp6188, u8 ch, u32 fmt)
....@@ -1617,14 +1846,15 @@
16171846 	unsigned char val_13x70 = 0, val_13x71 = 0;
16181847 	struct i2c_client *client = nvp6188->client;
16191848 
1620
-	nvp6188_write_reg(client, 0xFF, 0x13);
1621
-	nvp6188_read_reg(client, 0x70, &val_13x70);
1622
-	val_13x70 |= (0x01 << ch);
1623
-	nvp6188_write_reg(client, 0x70, val_13x70);
1624
-	nvp6188_read_reg(client, 0x71, &val_13x71);
1625
-	val_13x71 |= (0x01 << ch);
1626
-	nvp6188_write_reg(client, 0x71, val_13x71);
1627
-
1849
+	if (fmt != NVP_RESO_UNKOWN) {
1850
+		nvp6188_write_reg(client, 0xFF, 0x13);
1851
+		nvp6188_read_reg(client, 0x70, &val_13x70);
1852
+		val_13x70 |= (0x01 << ch);
1853
+		nvp6188_write_reg(client, 0x70, val_13x70);
1854
+		nvp6188_read_reg(client, 0x71, &val_13x71);
1855
+		val_13x71 |= (0x01 << ch);
1856
+		nvp6188_write_reg(client, 0x71, val_13x71);
1857
+	}
16281858 	switch (fmt) {
16291859 	case NVP_RESO_960H_PAL:
16301860 		nv6188_set_chn_960h(nvp6188, ch, 1);
....@@ -1638,6 +1868,9 @@
16381868 	case NVP_RESO_1080P_PAL:
16391869 		nv6188_set_chn_1080p(nvp6188, ch, 1);
16401870 		break;
1871
+	case NVP_RESO_1300P_PAL:
1872
+		nv6188_set_chn_1300p(nvp6188, ch, 1);
1873
+		break;
16411874 	case NVP_RESO_960H_NSTC:
16421875 		nv6188_set_chn_960h(nvp6188, ch, 0);
16431876 		break;
....@@ -1650,8 +1883,11 @@
16501883 	case NVP_RESO_1080P_NSTC:
16511884 		nv6188_set_chn_1080p(nvp6188, ch, 0);
16521885 		break;
1886
+	case NVP_RESO_1300P_NSTC:
1887
+		nv6188_set_chn_1300p(nvp6188, ch, 0);
1888
+		break;
16531889 	default:
1654
-		nv6188_set_chn_1080p(nvp6188, ch, 1);
1890
+		nv6188_set_chn_1080p(nvp6188, ch, 0);
16551891 
16561892 		dev_err(&client->dev, "channel %d not detect\n", ch);
16571893 		nvp6188_write_reg(client, 0xFF, 0x13);
....@@ -1659,71 +1895,96 @@
16591895 		val_13x70 &= ~(0x01 << ch);
16601896 		nvp6188_write_reg(client, 0x70, val_13x70);
16611897 		nvp6188_write_reg(client, 0xFF, 0x05 + ch);
1898
+		nvp6188_write_reg(client, 0x58, 0x77);
16621899 		nvp6188_write_reg(client, 0xb8, 0xb8);
16631900 		break;
16641901 	}
1902
+
1903
+	// clear unknown count status
1904
+	nvp6188->cur_mode.unkown_reso_count[ch] = 0;
16651905 }
16661906 
16671907 static __maybe_unused void nvp6188_auto_detect_fmt(struct nvp6188 *nvp6188)
16681908 {
16691909 	u8 ch = 0;
16701910 	u32 reso = 0;
1671
-	unsigned char ch_vfc = 0xff;
1911
+	unsigned char ch_vfc = 0xff, val_13x70 = 0xf0;
1912
+	int ch_htotal = 0;
16721913 	struct i2c_client *client = nvp6188->client;
16731914 
16741915 	for (ch = 0; ch < PAD_MAX; ch++) {
16751916 		ch_vfc = nv6188_read_vfc(nvp6188, ch);
1676
-
1917
+		if (ch_vfc == 0xFF) {
1918
+			ch_htotal = nv6188_read_htotal(nvp6188, ch);
1919
+			if (ch_htotal == 0x0708)
1920
+				ch_vfc = NVP_RESO_1300P_NSTC_VALUE;
1921
+			else if (ch_htotal == 0x0870)
1922
+				ch_vfc = NVP_RESO_1300P_PAL_VALUE;
1923
+		}
16771924 		switch (ch_vfc) {
16781925 		case NVP_RESO_960H_NSTC_VALUE:
1679
-				dev_dbg(&client->dev, "channel %d det 960h nstc", ch);
1680
-				reso = NVP_RESO_960H_NSTC;
1926
+			dev_dbg(&client->dev, "channel %d det 960h nstc", ch);
1927
+			reso = NVP_RESO_960H_NSTC;
16811928 			break;
16821929 		case NVP_RESO_960H_PAL_VALUE:
1683
-				dev_dbg(&client->dev, "channel %d det 960h pal", ch);
1684
-				reso = NVP_RESO_960H_PAL;
1930
+			dev_dbg(&client->dev, "channel %d det 960h pal", ch);
1931
+			reso = NVP_RESO_960H_PAL;
16851932 			break;
16861933 		case NVP_RESO_720P_NSTC_VALUE:
1687
-				dev_dbg(&client->dev, "channel %d det 720p nstc", ch);
1688
-				reso = NVP_RESO_720P_NSTC;
1934
+			dev_dbg(&client->dev, "channel %d det 720p nstc", ch);
1935
+			reso = NVP_RESO_720P_NSTC;
16891936 			break;
16901937 		case NVP_RESO_720P_PAL_VALUE:
1691
-				dev_dbg(&client->dev, "channel %d det 720p pal", ch);
1692
-				reso = NVP_RESO_720P_PAL;
1938
+			dev_dbg(&client->dev, "channel %d det 720p pal", ch);
1939
+			reso = NVP_RESO_720P_PAL;
16931940 			break;
16941941 		case NVP_RESO_1080P_NSTC_VALUE:
1695
-				dev_dbg(&client->dev, "channel %d det 1080p nstc", ch);
1696
-				reso = NVP_RESO_1080P_NSTC;
1942
+			dev_dbg(&client->dev, "channel %d det 1080p nstc", ch);
1943
+			reso = NVP_RESO_1080P_NSTC;
16971944 			break;
16981945 		case NVP_RESO_1080P_PAL_VALUE:
1699
-				dev_dbg(&client->dev, "channel %d det 1080p pal", ch);
1700
-				reso = NVP_RESO_1080P_PAL;
1946
+			dev_dbg(&client->dev, "channel %d det 1080p pal", ch);
1947
+			reso = NVP_RESO_1080P_PAL;
17011948 			break;
17021949 		case NVP_RESO_960P_NSTC_VALUE:
1703
-				dev_dbg(&client->dev, "channel %d det 960p nstc", ch);
1704
-				reso = NVP_RESO_960P_NSTC;
1950
+			dev_dbg(&client->dev, "channel %d det 960p nstc", ch);
1951
+			reso = NVP_RESO_960P_NSTC;
17051952 			break;
17061953 		case NVP_RESO_960P_PAL_VALUE:
1707
-				dev_dbg(&client->dev, "channel %d det 960p pal", ch);
1708
-				reso = NVP_RESO_960P_PAL;
1954
+			dev_dbg(&client->dev, "channel %d det 960p pal", ch);
1955
+			reso = NVP_RESO_960P_PAL;
1956
+			break;
1957
+		case NVP_RESO_1300P_NSTC_VALUE:
1958
+			dev_dbg(&client->dev, "channel %d det 1300p nstc", ch);
1959
+			reso = NVP_RESO_1300P_NSTC;
1960
+			break;
1961
+		case NVP_RESO_1300P_PAL_VALUE:
1962
+			dev_dbg(&client->dev, "channel %d det 1300p pal", ch);
1963
+			reso = NVP_RESO_1300P_PAL;
17091964 			break;
17101965 		default:
1711
-				dev_dbg(&client->dev, "channel %d not detect\n", ch);
1712
-				reso = NVP_RESO_UNKOWN;
1966
+			dev_dbg(&client->dev, "channel %d not detect\n", ch);
1967
+			reso = NVP_RESO_UNKOWN;
17131968 			break;
17141969 		}
17151970 
17161971 		if (reso != nvp6188->cur_mode.channel_reso[ch]) {
1717
-			if ((nvp6188->cur_mode.channel_reso[ch] != NVP_RESO_UNKOWN) &&
1718
-				(reso == NVP_RESO_UNKOWN) &&
1719
-				((nvp6188->detect_status & (0x01 << ch)) == 0)) {
1972
+			if (nvp6188->cur_mode.channel_reso[ch] != NVP_RESO_UNKOWN &&
1973
+			    reso == NVP_RESO_UNKOWN &&
1974
+			    (nvp6188->detect_status & (0x01 << ch)) == 0) {
17201975 				dev_info(&client->dev, "channel(%d) fmt(%d) -> invalid(0x%x)",
1721
-					ch, nvp6188->cur_mode.channel_reso[ch], ch_vfc);
1722
-				return;
1976
+					 ch, nvp6188->cur_mode.channel_reso[ch], ch_vfc);
1977
+				if (nvp6188->cur_mode.unkown_reso_count[ch] < 5) {
1978
+					nvp6188_write_reg(client, 0xFF, 0x13);
1979
+					nvp6188_read_reg(client, 0x70, &val_13x70);
1980
+					val_13x70 &= ~(0x01 << ch);
1981
+					nvp6188_write_reg(client, 0x70, val_13x70);
1982
+					nvp6188->cur_mode.unkown_reso_count[ch]++;
1983
+					continue;
1984
+				}
17231985 			}
1724
-
17251986 			dev_info(&client->dev, "channel(%d) fmt(%d) -> cur(%d)",
1726
-				ch, nvp6188->cur_mode.channel_reso[ch], reso);
1987
+					 ch, nvp6188->cur_mode.channel_reso[ch], reso);
17271988 			nvp6188_manual_mode(nvp6188, ch, reso);
17281989 			nvp6188->cur_mode.channel_reso[ch] = reso;
17291990 		}
....@@ -1745,21 +2006,22 @@
17452006 	struct nvp6188 *nvp6188 = (struct nvp6188 *) data;
17462007 	struct i2c_client *client = nvp6188->client;
17472008 	int need_reset_wait = -1;
1748
-
2009
+	nvp6188->disable_dump_register = true;
17492010 	if (nvp6188->power_on) {
17502011 		nvp6188_auto_detect_hotplug(nvp6188);
17512012 		nvp6188->last_detect_status = nvp6188->detect_status;
17522013 		nvp6188->is_reset = 0;
17532014 	}
17542015 	while (!kthread_should_stop()) {
1755
-		if (nvp6188->power_on) {
2016
+		if (nvp6188->disable_dump_register && nvp6188->power_on) {
17562017 			mutex_lock(&nvp6188->mutex);
17572018 			nvp6188_auto_detect_hotplug(nvp6188);
17582019 			nvp6188_auto_detect_fmt(nvp6188);
2020
+
17592021 			mutex_unlock(&nvp6188->mutex);
17602022 			if (nvp6188->last_detect_status != nvp6188->detect_status) {
17612023 				dev_info(&client->dev, "last_detect_status(0x%x) -> detect_status(0x%x)",
1762
-					nvp6188->last_detect_status, nvp6188->detect_status);
2024
+					 nvp6188->last_detect_status, nvp6188->detect_status);
17632025 				nvp6188->last_detect_status = nvp6188->detect_status;
17642026 				input_event(nvp6188->input_dev, EV_MSC, MSC_RAW, nvp6188->detect_status);
17652027 				input_sync(nvp6188->input_dev);
....@@ -1770,7 +2032,7 @@
17702032 			} else if (need_reset_wait == 0) {
17712033 				need_reset_wait = -1;
17722034 				nvp6188->is_reset = 1;
1773
-				dev_err(&client->dev, "trigger reset time up\n");
2035
+				dev_info(&client->dev, "trigger reset time up\n");
17742036 			}
17752037 		}
17762038 		set_current_state(TASK_INTERRUPTIBLE);
....@@ -1785,6 +2047,7 @@
17852047 	struct i2c_client *client = nvp6188->client;
17862048 	nvp6188->detect_thread = kthread_create(detect_thread_function,
17872049                                    nvp6188, "nvp6188_kthread");
2050
+
17882051 	if (IS_ERR(nvp6188->detect_thread)) {
17892052 		dev_err(&client->dev, "kthread_create nvp6188_kthread failed\n");
17902053 		ret = PTR_ERR(nvp6188->detect_thread);
....@@ -1800,19 +2063,21 @@
18002063 	if (nvp6188->detect_thread)
18012064 		kthread_stop(nvp6188->detect_thread);
18022065 	nvp6188->detect_thread = NULL;
2066
+
18032067 	return 0;
18042068 }
18052069 
1806
-static int nvp6188_reg_check(struct nvp6188 *nvp6188)
2070
+static int __maybe_unused nvp6188_reg_check(struct nvp6188 *nvp6188)
18072071 {
18082072 	unsigned char val_20x52 = 0, val_20x53 = 0;
1809
-	unsigned char val_20x52_bak = 0, val_20x53_bak = 0;
1810
-	int check_value1, check_value2, check_cnt = 10;
2073
+	int check_value1 = 0, check_value2 = 0, check_cnt = 10;
18112074 	struct i2c_client *client = nvp6188->client;
18122075 
1813
-	dev_dbg(&client->dev, "[%s::%d]\n", __func__, __LINE__);
18142076 	nvp6188_write_reg(client, 0xff, 0x20);
18152077 	nvp6188_write_reg(client, 0x00, 0xff); // open mipi
2078
+	usleep_range(100 * 1000, 100 * 1000);
2079
+	//nvp6188_write_reg(client, 0x40, 0x01);
2080
+	//nvp6188_write_reg(client, 0x40, 0x00);
18162081 	while (check_cnt--) {
18172082 		nvp6188_write_reg(client, 0xff, 0x20);
18182083 		nvp6188_read_reg(client, 0x52, &val_20x52);
....@@ -1820,25 +2085,48 @@
18202085 		check_value1 = (val_20x52 << 8) | val_20x53;
18212086 		usleep_range(80 * 1000, 100 * 1000);
18222087 		nvp6188_write_reg(client, 0xff, 0x20);
1823
-		nvp6188_read_reg(client, 0x52, &val_20x52_bak);
1824
-		nvp6188_read_reg(client, 0x53, &val_20x53_bak);
1825
-		check_value2 = (val_20x52_bak << 8) | val_20x53_bak;
1826
-		if (check_value1 == check_value2) {
1827
-			dev_info(&client->dev, "attention!!! check cnt = %d\n", check_cnt);
2088
+		nvp6188_read_reg(client, 0x52, &val_20x52);
2089
+		nvp6188_read_reg(client, 0x53, &val_20x53);
2090
+		check_value2 = (val_20x52 << 8) | val_20x53;
2091
+		if (check_value2 <= 2 || check_value1 == check_value2) {
2092
+			dev_err(&client->dev, "attention!!! check cnt = %d\n", check_cnt);
18282093 			nvp6188_write_reg(client, 0xff, 0x01);
18292094 			nvp6188_write_reg(client, 0x97, 0xf0);
18302095 			usleep_range(40 * 1000, 50 * 1000);
18312096 			nvp6188_write_reg(client, 0x97, 0x0f);
18322097 		} else {
18332098 			dev_err(&client->dev, "check_value1=%x, check_value2=%x,check cnt = %d\n",
1834
-				check_value1, check_value2, check_cnt);
2099
+					check_value1, check_value2, check_cnt);
18352100 			break;
18362101 		}
18372102 	}
1838
-
18392103 	return check_cnt;
18402104 }
1841
-static int __nvp6188_start_stream(struct nvp6188 *nvp6188)
2105
+
2106
+static int nvp6188_auto_det_set(struct nvp6188 *nvp6188)
2107
+{
2108
+	struct i2c_client *client = nvp6188->client;
2109
+
2110
+	dev_info(&client->dev, "[%s::%d]\n", __func__, __LINE__);
2111
+
2112
+	nvp6188_write_reg(client, 0xff, 0x13);
2113
+	nvp6188_write_reg(client, 0x30, 0x7f);
2114
+	nvp6188_write_reg(client, 0x70, 0xf0);
2115
+	nvp6188_write_reg(client, 0xff, 0x00);
2116
+	nvp6188_write_reg(client, 0x00, 0x18);
2117
+	nvp6188_write_reg(client, 0x01, 0x18);
2118
+	nvp6188_write_reg(client, 0x02, 0x18);
2119
+	nvp6188_write_reg(client, 0x03, 0x18);
2120
+	usleep_range(30 * 1000, 40 * 1000);
2121
+	nvp6188_write_reg(client, 0x00, 0x10);
2122
+	nvp6188_write_reg(client, 0x01, 0x10);
2123
+	nvp6188_write_reg(client, 0x02, 0x10);
2124
+	nvp6188_write_reg(client, 0x03, 0x10);
2125
+
2126
+	return 0;
2127
+}
2128
+
2129
+static int nvp6188_video_init(struct nvp6188 *nvp6188)
18422130 {
18432131 	int ret;
18442132 	int array_size = 0;
....@@ -1855,20 +2143,28 @@
18552143 	ret = nvp6188_write_array(nvp6188->client,
18562144 		nvp6188->cur_mode.global_reg_list, array_size);
18572145 	if (ret) {
1858
-		dev_err(&client->dev, "%s: global_reg_list failed", __func__);
1859
-		return ret;
1860
-	}
1861
-
1862
-	ret = nvp6188_write_array(nvp6188->client,
1863
-		auto_detect_regs, ARRAY_SIZE(auto_detect_regs));
1864
-	if (ret) {
1865
-		dev_err(&client->dev, "%s: auto_detect_regs failed", __func__);
2146
+		dev_err(&client->dev, "__nvp6188_start_stream global_reg_list faild");
18662147 		return ret;
18672148 	}
18682149 
18692150 	nvp6188_init_default_fmt(nvp6188, NVP_RESO_UNKOWN);
1870
-	usleep_range(500*1000, 1000*1000);
2151
+	nvp6188_auto_det_set(nvp6188);
2152
+	usleep_range(150*1000, 150*1000);
18712153 	nvp6188_auto_detect_fmt(nvp6188);
2154
+
2155
+	return 0;
2156
+}
2157
+
2158
+static int __nvp6188_start_stream(struct nvp6188 *nvp6188)
2159
+{
2160
+	struct i2c_client *client = nvp6188->client;
2161
+
2162
+	if (nvp6188->detect_thread) {
2163
+		nvp6188_write_reg(client, 0xff, 0x20);
2164
+		nvp6188_write_reg(client, 0x00, 0xff);
2165
+		return 0;
2166
+	}
2167
+
18722168 	nvp6188_audio_init(nvp6188);
18732169 	nvp6188_reg_check(nvp6188);
18742170 	detect_thread_start(nvp6188);
....@@ -1878,11 +2174,14 @@
18782174 static int __nvp6188_stop_stream(struct nvp6188 *nvp6188)
18792175 {
18802176 	struct i2c_client *client = nvp6188->client;
2177
+
18812178 	nvp6188_write_reg(client, 0xff, 0x20);
18822179 	nvp6188_write_reg(client, 0x00, 0x00);
18832180 	nvp6188_write_reg(client, 0x40, 0x01);
18842181 	nvp6188_write_reg(client, 0x40, 0x00);
1885
-	detect_thread_stop(nvp6188);
2182
+	//detect_thread_stop(nvp6188);
2183
+	usleep_range(100 * 1000, 150 * 1000);
2184
+
18862185 	return 0;
18872186 }
18882187 
....@@ -1891,7 +2190,7 @@
18912190 	struct nvp6188 *nvp6188 = to_nvp6188(sd);
18922191 	struct i2c_client *client = nvp6188->client;
18932192 
1894
-	dev_err(&client->dev, "s_stream: %d. %dx%d\n", on,
2193
+	dev_info(&client->dev, "s_stream: %d. %dx%d\n", on,
18952194 			nvp6188->cur_mode.width,
18962195 			nvp6188->cur_mode.height);
18972196 
....@@ -1925,8 +2224,6 @@
19252224 	/* If the power state is not modified - no work to do. */
19262225 	if (nvp6188->power_on == !!on)
19272226 		goto exit;
1928
-
1929
-	dev_err(&client->dev, "%s: on %d\n", __func__, on);
19302227 
19312228 	if (on) {
19322229 		ret = pm_runtime_get_sync(&client->dev);
....@@ -1985,7 +2282,7 @@
19852282 		gpiod_set_value_cansleep(nvp6188->reset_gpio, 0);
19862283 		usleep_range(10 * 1000, 20 * 1000);
19872284 		gpiod_set_value_cansleep(nvp6188->reset_gpio, 1);
1988
-		usleep_range(10 * 1000, 20 * 1000);
2285
+		usleep_range(100 * 1000, 110 * 1000);
19892286 
19902287 		//Resolve audio register reset caused by reset_gpio
19912288 		nvp6188_audio_init(nvp6188);
....@@ -2059,9 +2356,9 @@
20592356 		goto err_free_handler;
20602357 	}
20612358 
2062
-	dev_info(&nvp6188->client->dev, "mipi_freq_idx %d\n", mode->mipi_freq_idx);
2063
-	dev_info(&nvp6188->client->dev, "pixel_rate %lld\n", pixel_rate);
2064
-	dev_info(&nvp6188->client->dev, "link_freq %lld\n", link_freq_items[mode->mipi_freq_idx]);
2359
+	dev_dbg(&nvp6188->client->dev, "mipi_freq_idx %d\n", mode->mipi_freq_idx);
2360
+	dev_dbg(&nvp6188->client->dev, "pixel_rate %lld\n", pixel_rate);
2361
+	dev_dbg(&nvp6188->client->dev, "link_freq %lld\n", link_freq_items[mode->mipi_freq_idx]);
20652362 
20662363 	nvp6188->subdev.ctrl_handler = handler;
20672364 
....@@ -2073,7 +2370,7 @@
20732370 	return ret;
20742371 }
20752372 
2076
-static int nvp6188_runtime_resume(struct device *dev)
2373
+static int __maybe_unused nvp6188_runtime_resume(struct device *dev)
20772374 {
20782375 	struct i2c_client *client = to_i2c_client(dev);
20792376 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
....@@ -2082,7 +2379,7 @@
20822379 	return __nvp6188_power_on(nvp6188);
20832380 }
20842381 
2085
-static int nvp6188_runtime_suspend(struct device *dev)
2382
+static int __maybe_unused nvp6188_runtime_suspend(struct device *dev)
20862383 {
20872384 	struct i2c_client *client = to_i2c_client(dev);
20882385 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
....@@ -2125,14 +2422,16 @@
21252422 
21262423 static const struct v4l2_subdev_video_ops nvp6188_video_ops = {
21272424 	.s_stream = nvp6188_stream,
2128
-	.g_mbus_config = nvp6188_g_mbus_config,
2425
+	.g_frame_interval = nvp6188_g_frame_interval,
21292426 };
21302427 
21312428 static const struct v4l2_subdev_pad_ops nvp6188_subdev_pad_ops = {
21322429 	.enum_mbus_code = nvp6188_enum_mbus_code,
21332430 	.enum_frame_size = nvp6188_enum_frame_sizes,
2431
+	.enum_frame_interval = nvp6188_enum_frame_interval,
21342432 	.get_fmt = nvp6188_get_fmt,
21352433 	.set_fmt = nvp6188_set_fmt,
2434
+	.get_mbus_config = nvp6188_g_mbus_config,
21362435 };
21372436 
21382437 static const struct v4l2_subdev_core_ops nvp6188_core_ops = {
....@@ -2161,12 +2460,15 @@
21612460 	int ret;
21622461 	u8 val;
21632462 
2463
+	mutex_lock(&nvp6188->mutex);
21642464 	ret = nvp6188_read_reg(client, reg, &val);
21652465 	if (ret < 0) {
21662466 		dev_err(&client->dev, "%s failed: (%d)\n", __func__, ret);
2467
+		mutex_unlock(&nvp6188->mutex);
21672468 		return ret;
21682469 	}
21692470 
2471
+	mutex_unlock(&nvp6188->mutex);
21702472 	return val;
21712473 }
21722474 
....@@ -2178,12 +2480,15 @@
21782480 	struct i2c_client *client = nvp6188->client;
21792481 	int ret;
21802482 
2483
+	mutex_lock(&nvp6188->mutex);
21812484 	ret = nvp6188_write_reg(client, reg, val);
21822485 	if (ret < 0) {
21832486 		dev_err(&client->dev, "%s failed: (%d)\n", __func__, ret);
2487
+		mutex_unlock(&nvp6188->mutex);
21842488 		return ret;
21852489 	}
21862490 
2491
+	mutex_unlock(&nvp6188->mutex);
21872492 	return 0;
21882493 }
21892494 
....@@ -2204,7 +2509,9 @@
22042509 	struct nvp6188 *nvp6188 = to_nvp6188(sd);
22052510 	struct i2c_client *client = nvp6188->client;
22062511 	u8 val_rm = 0, val_pb = 0;
2512
+	int ret = 0;
22072513 
2514
+	mutex_lock(&nvp6188->mutex);
22082515 	nvp6188_write_reg(client, 0xff, 0x01); /* Switch to bank1 for audio */
22092516 	nvp6188_read_reg(client, 0x07, &val_rm);
22102517 	nvp6188_read_reg(client, 0x13, &val_pb);
....@@ -2219,7 +2526,8 @@
22192526 		val_pb &= (~0x80);
22202527 		break;
22212528 	default:
2222
-		return -EINVAL;
2529
+		ret = -EINVAL;
2530
+		goto unlock;
22232531 	}
22242532 
22252533 	/* interface format */
....@@ -2237,7 +2545,8 @@
22372545 		val_pb |= 0x03;
22382546 		break;
22392547 	default:
2240
-		return -EINVAL;
2548
+		ret = -EINVAL;
2549
+		goto unlock;
22412550 	}
22422551 
22432552 	/* clock inversion */
....@@ -2251,13 +2560,17 @@
22512560 		val_pb |= 0x40;
22522561 		break;
22532562 	default:
2254
-		return -EINVAL;
2563
+		ret = -EINVAL;
2564
+		goto unlock;
22552565 	}
22562566 
22572567 	nvp6188_write_reg(client, 0x07, val_rm);
22582568 	nvp6188_write_reg(client, 0x13, val_pb);
22592569 
2260
-	return 0;
2570
+unlock:
2571
+	mutex_unlock(&nvp6188->mutex);
2572
+
2573
+	return ret;
22612574 }
22622575 
22632576 static int nvp6188_pcm_hw_params(struct snd_pcm_substream *substream,
....@@ -2268,7 +2581,9 @@
22682581 	struct nvp6188 *nvp6188 = to_nvp6188(sd);
22692582 	struct i2c_client *client = nvp6188->client;
22702583 	u8 val = 0;
2584
+	int ret = 0;
22712585 
2586
+	mutex_lock(&nvp6188->mutex);
22722587 	nvp6188_write_reg(client, 0xff, 0x01); /* Switch to bank1 for audio */
22732588 
22742589 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
....@@ -2282,7 +2597,8 @@
22822597 			val &= (~0x04);
22832598 			break;
22842599 		default:
2285
-			return -EINVAL;
2600
+			ret = -EINVAL;
2601
+			goto unlock;
22862602 		}
22872603 
22882604 		switch (params_rate(params)) {
....@@ -2296,7 +2612,8 @@
22962612 			/* TODO */
22972613 			break;
22982614 		default:
2299
-			return -EINVAL;
2615
+			ret = -EINVAL;
2616
+			goto unlock;
23002617 		}
23012618 
23022619 		if (nvp6188->audio_out) {
....@@ -2313,7 +2630,8 @@
23132630 			default:
23142631 				dev_err(&client->dev, "Invalid audio_out mclk_fs: %d\n",
23152632 					nvp6188->audio_out->mclk_fs);
2316
-				return -EINVAL;
2633
+				ret = -EINVAL;
2634
+				goto unlock;
23172635 			}
23182636 		}
23192637 
....@@ -2329,7 +2647,8 @@
23292647 			val &= (~0x04);
23302648 			break;
23312649 		default:
2332
-			return -EINVAL;
2650
+			ret = -EINVAL;
2651
+			goto unlock;
23332652 		}
23342653 
23352654 		switch (params_rate(params)) {
....@@ -2343,7 +2662,8 @@
23432662 			/* TODO */
23442663 			break;
23452664 		default:
2346
-			return -EINVAL;
2665
+			ret = -EINVAL;
2666
+			goto unlock;
23472667 		}
23482668 
23492669 		if (nvp6188->audio_in) {
....@@ -2360,7 +2680,8 @@
23602680 			default:
23612681 				dev_err(&client->dev, "Invalid audio_in mclk_fs: %d\n",
23622682 					nvp6188->audio_in->mclk_fs);
2363
-				return -EINVAL;
2683
+				ret = -EINVAL;
2684
+				goto unlock;
23642685 			}
23652686 		}
23662687 		nvp6188_write_reg(client, 0x07, val);
....@@ -2376,12 +2697,16 @@
23762697 		default:
23772698 			dev_err(&client->dev, "Not supported channels: %d\n",
23782699 				params_channels(params));
2379
-			return -EINVAL;
2700
+			ret = -EINVAL;
2701
+			goto unlock;
23802702 		}
23812703 		nvp6188_write_reg(client, 0x08, val);
23822704 	}
23832705 
2384
-	return 0;
2706
+unlock:
2707
+	mutex_unlock(&nvp6188->mutex);
2708
+
2709
+	return ret;
23852710 }
23862711 
23872712 static int nvp6188_pcm_mute(struct snd_soc_dai *dai, int mute, int stream)
....@@ -2440,7 +2765,9 @@
24402765 	struct nvp6188 *nvp6188 = to_nvp6188(sd);
24412766 	struct i2c_client *client = nvp6188->client;
24422767 
2768
+	mutex_lock(&nvp6188->mutex);
24432769 	nvp6188_write_reg(client, 0xff, 0x01); /* Switch to bank1 for audio */
2770
+	mutex_unlock(&nvp6188->mutex);
24442771 	return snd_soc_get_volsw(kcontrol, ucontrol);
24452772 }
24462773 
....@@ -2826,6 +3153,8 @@
28263153 	pm_runtime_enable(dev);
28273154 	pm_runtime_idle(dev);
28283155 
3156
+	nvp6188_video_init(nvp6188);
3157
+
28293158 	return 0;
28303159 
28313160 err_clean_entity:
....@@ -2862,7 +3191,7 @@
28623191 	return 0;
28633192 }
28643193 
2865
-static const struct dev_pm_ops nvp6188_pm_ops = {
3194
+static const struct dev_pm_ops __maybe_unused nvp6188_pm_ops = {
28663195 	SET_RUNTIME_PM_OPS(nvp6188_runtime_suspend,
28673196 			   nvp6188_runtime_resume, NULL)
28683197 };
....@@ -2883,7 +3212,7 @@
28833212 static struct i2c_driver nvp6188_i2c_driver = {
28843213 	.driver = {
28853214 		.name = NVP6188_NAME,
2886
-		.pm = &nvp6188_pm_ops,
3215
+		//.pm = &nvp6188_pm_ops,
28873216 		.of_match_table = of_match_ptr(nvp6188_of_match),
28883217 	},
28893218 	.probe		= &nvp6188_probe,
....@@ -2891,17 +3220,20 @@
28913220 	.id_table	= nvp6188_match_id,
28923221 };
28933222 
2894
-static int __init sensor_mod_init(void)
3223
+int nvp6188_sensor_mod_init(void)
28953224 {
28963225 	return i2c_add_driver(&nvp6188_i2c_driver);
28973226 }
3227
+
3228
+#ifndef CONFIG_VIDEO_REVERSE_IMAGE
3229
+device_initcall_sync(nvp6188_sensor_mod_init);
3230
+#endif
28983231 
28993232 static void __exit sensor_mod_exit(void)
29003233 {
29013234 	i2c_del_driver(&nvp6188_i2c_driver);
29023235 }
29033236 
2904
-device_initcall_sync(sensor_mod_init);
29053237 module_exit(sensor_mod_exit);
29063238 
29073239 MODULE_AUTHOR("Vicent Chi <vicent.chi@rock-chips.com>");