forked from ~ljy/RK356X_SDK_RELEASE
kernel/drivers/media/i2c/nvp6158_drv/nvp6158_video_eq.c
.. .. @@ -355,7 +355,7 @@ 355 355 356 356 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ch, 0x00 ); 357 357 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3c + ch, 0x80 ); 358 358 359 359 360 360 #if 0 361 361 printk("ch[%d]: COLOR, dist:%d, contrast[%02x]\n", ch, dist, pcolor->contrast[dist] ); .. .. @@ -632,13 +632,13 @@ 632 632 unsigned char val_13x31; 633 633 unsigned char val_13x32; 634 634 unsigned char val_0x54; 635 635 636 636 unsigned char val_9x44; 637 637 638 638 unsigned char ch = pvin_eq_set->Ch; 639 639 unsigned char devnum = pvin_eq_set->devnum; 640 640 video_equalizer_value_table_s eq_value; 641 641 642 642 /* cable type => 0:coaxial, 1:utp, 2:reserved1, 3:reserved2 */ 643 643 //video_equalizer_value_table_s eq_value = (video_equalizer_value_table_s)nvp6158_equalizer_value_fmtdef[pvin_eq_set->FmtDef]; 644 644 memset(&eq_value, 0xFF,sizeof(video_equalizer_value_table_s)); .. .. @@ -655,7 +655,7 @@ 655 655 val_13x31 = gpio_i2c_read(nvp6158_iic_addr[pvin_eq_set->devnum], 0x31); 656 656 val_13x31 |= (0x11 << pvin_eq_set->Ch); 657 657 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0x31, val_13x31 ); 658 658 659 659 val_13x32 = gpio_i2c_read(nvp6158_iic_addr[pvin_eq_set->devnum], 0x32); 660 660 val_13x32 |= (0x01 << pvin_eq_set->Ch); 661 661 gpio_i2c_write(nvp6158_iic_addr[pvin_eq_set->devnum], 0x32, val_13x32 ); .. .. @@ -756,7 +756,7 @@ 756 756 { 757 757 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6E, 0x00 ); //VBLK default setting 758 758 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6F, 0x00 ); 759 759 760 760 } 761 761 762 762 /* Auto Mode Off */ .. .. @@ -882,7 +882,7 @@ 882 882 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x15 + ( ch * 0x20 ), 0x3c); 883 883 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ), 0x0d); 884 884 885 885 886 886 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch%4); 887 887 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x25, 0xda); 888 888 msleep(100); .. .. @@ -918,7 +918,7 @@ 918 918 { 919 919 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11); 920 920 921 921 922 922 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x02 + ( ch * 0x20 ), 0x30); 923 923 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x03 + ( ch * 0x20 ), 0x0a); 924 924 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x04 + ( ch * 0x20 ), 0x20); .. .. @@ -946,7 +946,7 @@ 946 946 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x04 + ( ch * 0x20 ), 0x00); 947 947 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ), 0x00); 948 948 } 949 949 950 950 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF,0x09); 951 951 val_9x44 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x44); 952 952 val_9x44 &= ~(1 << ch); .. .. @@ -1080,7 +1080,7 @@ 1080 1080 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff); 1081 1081 break; 1082 1082 case AHD20_1080P_30P : 1083 1083 1084 1084 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00); 1085 1085 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02); 1086 1086 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17); .. .. @@ -1097,7 +1097,7 @@ 1097 1097 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff); 1098 1098 break; 1099 1099 case AHD20_1080P_25P : 1100 1100 1101 1101 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x00); 1102 1102 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x22+(ch*4), 0x02); 1103 1103 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30 + ch, 0x17); .. .. @@ -1394,7 +1394,7 @@ 1394 1394 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x75, 0xff); 1395 1395 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x77, 0xff); 1396 1396 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x79, 0xff); 1397 1397 1398 1398 1399 1399 // TVI 1400 1400 case TVI_FHD_30P : .. .. @@ -1899,7 +1899,7 @@ 1899 1899 decoder_dev_ch_info_s pDecoder_info; 1900 1900 1901 1901 video_equalizer_value_table_s eq_value;// = (video_equalizer_value_table_s)nvp6168_equalizer_value_fmtdef[pvin_eq_set->FmtDef]; 1902 1902 1903 1903 /* cable type => 0:coaxial, 1:utp, 2:reserved1, 3:reserved2 */ 1904 1904 //video_equalizer_value_table_s eq_value = (video_equalizer_value_table_s)nvp6158_equalizer_value_fmtdef[pvin_eq_set->FmtDef]; 1905 1905 memset(&eq_value, 0xFF,sizeof(video_equalizer_value_table_s)); .. .. @@ -1935,12 +1935,12 @@ 1935 1935 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ( ch * 0x20 ) + ii, 0x00); //first set bank11 to default values. 1936 1936 } 1937 1937 1938 1938 1939 1939 if( pvin_eq_set->FmtDef == CVI_5M_20P) 1940 1940 { 1941 1941 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x11); 1942 1942 1943 1943 1944 1944 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x02 + ( ch * 0x20 ), 0x30); 1945 1945 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x03 + ( ch * 0x20 ), 0x0a); 1946 1946 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x04 + ( ch * 0x20 ), 0x20); .. .. @@ -1977,13 +1977,13 @@ 1977 1977 { 1978 1978 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch ); 1979 1979 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6E, 0x10 ); //VBLK setting 1980 1980 1981 1981 } 1982 1982 else 1983 1983 { 1984 1984 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch ); 1985 1985 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x6E, 0x00 ); //VBLK default setting 1986 1986 1987 1987 } 1988 1988 1989 1989 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch);
