hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/media/i2c/maxim4c/maxim4c_mipi_txphy.h
....@@ -53,6 +53,38 @@
5353 u8 vc_ext_en;
5454 u8 clock_master;
5555 u8 clock_mode;
56
+ u8 ssc_ratio;
57
+};
58
+
59
+struct maxim4c_txphy_timing {
60
+ /* 0x8A1 */
61
+ u8 t_hs_przero;
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+ u8 t_hs_prep;
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+ u8 t_clk_trail;
64
+ u8 t_clk_przero;
65
+
66
+ /* 0x8A2 */
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+ u8 t_lpx;
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+ u8 t_hs_trail;
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+
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+ /* 0x8A5 */
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+ u8 t_clk_prep;
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+
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+ /* 0x8A8 */
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+ u8 t_lpxesc;
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+
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+ /* 0x8AE */
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+ u8 t_t3_post;
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+ u8 t_t3_prep;
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+
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+ /* 0x905 */
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+ u8 csi2_t_pre;
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+ /* 0x906 */
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+ u8 csi2_t_post;
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+ /* 0x907 */
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+ u8 csi2_tx_gap;
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+ /* 0x908,0x909,0x90A */
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+ u32 csi2_twakeup;
5688 };
5789
5890 typedef struct maxim4c_mipi_txphy {
....@@ -61,6 +93,9 @@
6193 u8 force_clk0_en; /* DPHY0 enabled as clock */
6294 u8 force_clk3_en; /* DPHY3 enabled as clock */
6395
96
+ u8 timing_override_en;
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+ struct maxim4c_txphy_timing timing;
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+
6499 struct maxim4c_txphy_cfg phy_cfg[MAXIM4C_TXPHY_ID_MAX];
65100 } maxim4c_mipi_txphy_t;
66101