hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/infiniband/hw/mlx5/qp.c
....@@ -4164,7 +4164,7 @@
41644164 return -EINVAL;
41654165
41664166 if (attr->port_num == 0 ||
4167
- attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) {
4167
+ attr->port_num > dev->num_ports) {
41684168 mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n",
41694169 attr->port_num, dev->num_ports);
41704170 return -EINVAL;
....@@ -4256,6 +4256,40 @@
42564256 return true;
42574257
42584258 return false;
4259
+}
4260
+
4261
+static int validate_rd_atomic(struct mlx5_ib_dev *dev, struct ib_qp_attr *attr,
4262
+ int attr_mask, enum ib_qp_type qp_type)
4263
+{
4264
+ int log_max_ra_res;
4265
+ int log_max_ra_req;
4266
+
4267
+ if (qp_type == MLX5_IB_QPT_DCI) {
4268
+ log_max_ra_res = 1 << MLX5_CAP_GEN(dev->mdev,
4269
+ log_max_ra_res_dc);
4270
+ log_max_ra_req = 1 << MLX5_CAP_GEN(dev->mdev,
4271
+ log_max_ra_req_dc);
4272
+ } else {
4273
+ log_max_ra_res = 1 << MLX5_CAP_GEN(dev->mdev,
4274
+ log_max_ra_res_qp);
4275
+ log_max_ra_req = 1 << MLX5_CAP_GEN(dev->mdev,
4276
+ log_max_ra_req_qp);
4277
+ }
4278
+
4279
+ if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC &&
4280
+ attr->max_rd_atomic > log_max_ra_res) {
4281
+ mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n",
4282
+ attr->max_rd_atomic);
4283
+ return false;
4284
+ }
4285
+
4286
+ if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC &&
4287
+ attr->max_dest_rd_atomic > log_max_ra_req) {
4288
+ mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n",
4289
+ attr->max_dest_rd_atomic);
4290
+ return false;
4291
+ }
4292
+ return true;
42594293 }
42604294
42614295 int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
....@@ -4352,21 +4386,8 @@
43524386 }
43534387 }
43544388
4355
- if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC &&
4356
- attr->max_rd_atomic >
4357
- (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) {
4358
- mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n",
4359
- attr->max_rd_atomic);
4389
+ if (!validate_rd_atomic(dev, attr, attr_mask, qp_type))
43604390 goto out;
4361
- }
4362
-
4363
- if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC &&
4364
- attr->max_dest_rd_atomic >
4365
- (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) {
4366
- mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n",
4367
- attr->max_dest_rd_atomic);
4368
- goto out;
4369
- }
43704391
43714392 if (cur_state == new_state && cur_state == IB_QPS_RESET) {
43724393 err = 0;