.. | .. |
---|
4164 | 4164 | return -EINVAL; |
---|
4165 | 4165 | |
---|
4166 | 4166 | if (attr->port_num == 0 || |
---|
4167 | | - attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { |
---|
| 4167 | + attr->port_num > dev->num_ports) { |
---|
4168 | 4168 | mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", |
---|
4169 | 4169 | attr->port_num, dev->num_ports); |
---|
4170 | 4170 | return -EINVAL; |
---|
.. | .. |
---|
4256 | 4256 | return true; |
---|
4257 | 4257 | |
---|
4258 | 4258 | return false; |
---|
| 4259 | +} |
---|
| 4260 | + |
---|
| 4261 | +static int validate_rd_atomic(struct mlx5_ib_dev *dev, struct ib_qp_attr *attr, |
---|
| 4262 | + int attr_mask, enum ib_qp_type qp_type) |
---|
| 4263 | +{ |
---|
| 4264 | + int log_max_ra_res; |
---|
| 4265 | + int log_max_ra_req; |
---|
| 4266 | + |
---|
| 4267 | + if (qp_type == MLX5_IB_QPT_DCI) { |
---|
| 4268 | + log_max_ra_res = 1 << MLX5_CAP_GEN(dev->mdev, |
---|
| 4269 | + log_max_ra_res_dc); |
---|
| 4270 | + log_max_ra_req = 1 << MLX5_CAP_GEN(dev->mdev, |
---|
| 4271 | + log_max_ra_req_dc); |
---|
| 4272 | + } else { |
---|
| 4273 | + log_max_ra_res = 1 << MLX5_CAP_GEN(dev->mdev, |
---|
| 4274 | + log_max_ra_res_qp); |
---|
| 4275 | + log_max_ra_req = 1 << MLX5_CAP_GEN(dev->mdev, |
---|
| 4276 | + log_max_ra_req_qp); |
---|
| 4277 | + } |
---|
| 4278 | + |
---|
| 4279 | + if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && |
---|
| 4280 | + attr->max_rd_atomic > log_max_ra_res) { |
---|
| 4281 | + mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", |
---|
| 4282 | + attr->max_rd_atomic); |
---|
| 4283 | + return false; |
---|
| 4284 | + } |
---|
| 4285 | + |
---|
| 4286 | + if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && |
---|
| 4287 | + attr->max_dest_rd_atomic > log_max_ra_req) { |
---|
| 4288 | + mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", |
---|
| 4289 | + attr->max_dest_rd_atomic); |
---|
| 4290 | + return false; |
---|
| 4291 | + } |
---|
| 4292 | + return true; |
---|
4259 | 4293 | } |
---|
4260 | 4294 | |
---|
4261 | 4295 | int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, |
---|
.. | .. |
---|
4352 | 4386 | } |
---|
4353 | 4387 | } |
---|
4354 | 4388 | |
---|
4355 | | - if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && |
---|
4356 | | - attr->max_rd_atomic > |
---|
4357 | | - (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { |
---|
4358 | | - mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", |
---|
4359 | | - attr->max_rd_atomic); |
---|
| 4389 | + if (!validate_rd_atomic(dev, attr, attr_mask, qp_type)) |
---|
4360 | 4390 | goto out; |
---|
4361 | | - } |
---|
4362 | | - |
---|
4363 | | - if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && |
---|
4364 | | - attr->max_dest_rd_atomic > |
---|
4365 | | - (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { |
---|
4366 | | - mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", |
---|
4367 | | - attr->max_dest_rd_atomic); |
---|
4368 | | - goto out; |
---|
4369 | | - } |
---|
4370 | 4391 | |
---|
4371 | 4392 | if (cur_state == new_state && cur_state == IB_QPS_RESET) { |
---|
4372 | 4393 | err = 0; |
---|