update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/infiniband/hw/hfi1/common.h
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@@ -1,5 +1,5 @@
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 /*
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- * Copyright(c) 2015, 2016 Intel Corporation.
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+ * Copyright(c) 2015 - 2020 Intel Corporation.
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  *
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  * This file is provided under a dual BSD/GPLv2 license.  When using or
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  * redistributing this file, you may do so under either license.
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@@ -72,13 +72,6 @@
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  * compilation unit
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  */
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-/*
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- * If a packet's QP[23:16] bits match this value, then it is
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- * a PSM packet and the hardware will expect a KDETH header
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- * following the BTH.
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- */
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-#define DEFAULT_KDETH_QP 0x80
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-
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 /* driver/hw feature set bitmask */
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 #define HFI1_CAP_USER_SHIFT      24
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 #define HFI1_CAP_MASK            ((1UL << HFI1_CAP_USER_SHIFT) - 1)
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@@ -136,18 +129,22 @@
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 				  HFI1_CAP_ALLOW_PERM_JKEY |		\
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 				  HFI1_CAP_STATIC_RATE_CTRL |		\
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 				  HFI1_CAP_PRINT_UNIMPL |		\
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-				  HFI1_CAP_TID_UNMAP)
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+				  HFI1_CAP_TID_UNMAP |			\
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+				  HFI1_CAP_OPFN)
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 /*
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  * A set of capability bits that are "global" and are not allowed to be
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  * set in the user bitmask.
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  */
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 #define HFI1_CAP_RESERVED_MASK   ((HFI1_CAP_SDMA |			\
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-				  HFI1_CAP_USE_SDMA_HEAD |		\
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-				  HFI1_CAP_EXTENDED_PSN |		\
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-				  HFI1_CAP_PRINT_UNIMPL |		\
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-				  HFI1_CAP_NO_INTEGRITY |		\
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-				  HFI1_CAP_PKEY_CHECK) <<		\
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-				 HFI1_CAP_USER_SHIFT)
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+				   HFI1_CAP_USE_SDMA_HEAD |		\
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+				   HFI1_CAP_EXTENDED_PSN |		\
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+				   HFI1_CAP_PRINT_UNIMPL |		\
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+				   HFI1_CAP_NO_INTEGRITY |		\
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+				   HFI1_CAP_PKEY_CHECK |		\
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+				   HFI1_CAP_TID_RDMA |			\
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+				   HFI1_CAP_OPFN |			\
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+				   HFI1_CAP_AIP) <<			\
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+				  HFI1_CAP_USER_SHIFT)
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 /*
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  * Set of capabilities that need to be enabled for kernel context in
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  * order to be allowed for user contexts, as well.
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@@ -163,6 +160,7 @@
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 				 HFI1_CAP_PKEY_CHECK |			\
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 				 HFI1_CAP_MULTI_PKT_EGR |		\
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 				 HFI1_CAP_EXTENDED_PSN |		\
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+				 HFI1_CAP_AIP |				\
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 				 ((HFI1_CAP_HDRSUPP |			\
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 				   HFI1_CAP_MULTI_PKT_EGR |		\
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 				   HFI1_CAP_STATIC_RATE_CTRL |		\
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@@ -283,7 +281,7 @@
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 #define RHF_TID_ERR		(0x1ull << 59)
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 #define RHF_LEN_ERR		(0x1ull << 60)
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 #define RHF_ECC_ERR		(0x1ull << 61)
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-#define RHF_VCRC_ERR		(0x1ull << 62)
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+#define RHF_RESERVED		(0x1ull << 62)
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 #define RHF_ICRC_ERR		(0x1ull << 63)
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 #define RHF_ERROR_SMASK 0xffe0000000000000ull		/* bits 63:53 */
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@@ -320,6 +318,9 @@
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 /* RHF receive type error - bypass packet errors */
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 #define RHF_RTE_BYPASS_NO_ERR		0x0
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+/* MAX RcvSEQ */
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+#define RHF_MAX_SEQ 13
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+
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 /* IB - LRH header constants */
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 #define HFI1_LRH_GRH 0x0003      /* 1. word of IB LRH - next header: GRH */
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 #define HFI1_LRH_BTH 0x0002      /* 1. word of IB LRH - next header: BTH */
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@@ -337,6 +338,10 @@
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 #define HFI1_PSM_IOC_BASE_SEQ 0x0
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+/* Number of BTH.PSN bits used for sequence number in expected rcvs */
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+#define HFI1_KDETH_BTH_SEQ_SHIFT 11
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+#define HFI1_KDETH_BTH_SEQ_MASK (BIT(HFI1_KDETH_BTH_SEQ_SHIFT) - 1)
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+
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 static inline __u64 rhf_to_cpu(const __le32 *rbuf)
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 {
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 	return __le64_to_cpu(*((__le64 *)rbuf));