.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2013 Capella Microsystems Inc. |
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3 | 4 | * Author: Kevin Tsai <ktsai@capellamicro.com> |
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4 | | - * |
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5 | | - * This program is free software; you can redistribute it and/or modify it |
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6 | | - * under the terms of the GNU General Public License version 2, as published |
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7 | | - * by the Free Software Foundation. |
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8 | 5 | */ |
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9 | 6 | |
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| 7 | +#include <linux/acpi.h> |
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10 | 8 | #include <linux/delay.h> |
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11 | 9 | #include <linux/err.h> |
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12 | 10 | #include <linux/i2c.h> |
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13 | 11 | #include <linux/mutex.h> |
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14 | 12 | #include <linux/module.h> |
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| 13 | +#include <linux/mod_devicetable.h> |
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15 | 14 | #include <linux/interrupt.h> |
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16 | 15 | #include <linux/regulator/consumer.h> |
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17 | 16 | #include <linux/iio/iio.h> |
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.. | .. |
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21 | 20 | |
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22 | 21 | /* Registers Address */ |
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23 | 22 | #define CM32181_REG_ADDR_CMD 0x00 |
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| 23 | +#define CM32181_REG_ADDR_WH 0x01 |
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| 24 | +#define CM32181_REG_ADDR_WL 0x02 |
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| 25 | +#define CM32181_REG_ADDR_TEST 0x03 |
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24 | 26 | #define CM32181_REG_ADDR_ALS 0x04 |
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25 | 27 | #define CM32181_REG_ADDR_STATUS 0x06 |
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26 | 28 | #define CM32181_REG_ADDR_ID 0x07 |
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27 | 29 | |
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28 | 30 | /* Number of Configurable Registers */ |
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29 | | -#define CM32181_CONF_REG_NUM 0x01 |
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| 31 | +#define CM32181_CONF_REG_NUM 4 |
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30 | 32 | |
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31 | 33 | /* CMD register */ |
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32 | | -#define CM32181_CMD_ALS_ENABLE 0x00 |
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33 | | -#define CM32181_CMD_ALS_DISABLE 0x01 |
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34 | | -#define CM32181_CMD_ALS_INT_EN 0x02 |
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| 34 | +#define CM32181_CMD_ALS_DISABLE BIT(0) |
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| 35 | +#define CM32181_CMD_ALS_INT_EN BIT(1) |
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| 36 | +#define CM32181_CMD_ALS_THRES_WINDOW BIT(2) |
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| 37 | + |
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| 38 | +#define CM32181_CMD_ALS_PERS_SHIFT 4 |
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| 39 | +#define CM32181_CMD_ALS_PERS_MASK (0x03 << CM32181_CMD_ALS_PERS_SHIFT) |
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| 40 | +#define CM32181_CMD_ALS_PERS_DEFAULT (0x01 << CM32181_CMD_ALS_PERS_SHIFT) |
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35 | 41 | |
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36 | 42 | #define CM32181_CMD_ALS_IT_SHIFT 6 |
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37 | 43 | #define CM32181_CMD_ALS_IT_MASK (0x0F << CM32181_CMD_ALS_IT_SHIFT) |
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.. | .. |
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41 | 47 | #define CM32181_CMD_ALS_SM_MASK (0x03 << CM32181_CMD_ALS_SM_SHIFT) |
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42 | 48 | #define CM32181_CMD_ALS_SM_DEFAULT (0x01 << CM32181_CMD_ALS_SM_SHIFT) |
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43 | 49 | |
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44 | | -#define CM32181_MLUX_PER_BIT 5 /* ALS_SM=01 IT=800ms */ |
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45 | | -#define CM32181_MLUX_PER_BIT_BASE_IT 800000 /* Based on IT=800ms */ |
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46 | | -#define CM32181_CALIBSCALE_DEFAULT 1000 |
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47 | | -#define CM32181_CALIBSCALE_RESOLUTION 1000 |
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48 | | -#define MLUX_PER_LUX 1000 |
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| 50 | +#define CM32181_LUX_PER_BIT 500 /* ALS_SM=01 IT=800ms */ |
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| 51 | +#define CM32181_LUX_PER_BIT_RESOLUTION 100000 |
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| 52 | +#define CM32181_LUX_PER_BIT_BASE_IT 800000 /* Based on IT=800ms */ |
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| 53 | +#define CM32181_CALIBSCALE_DEFAULT 100000 |
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| 54 | +#define CM32181_CALIBSCALE_RESOLUTION 100000 |
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49 | 55 | |
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50 | | -static const u8 cm32181_reg[CM32181_CONF_REG_NUM] = { |
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51 | | - CM32181_REG_ADDR_CMD, |
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| 56 | +#define SMBUS_ALERT_RESPONSE_ADDRESS 0x0c |
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| 57 | + |
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| 58 | +/* CPM0 Index 0: device-id (3218 or 32181), 1: Unknown, 2: init_regs_bitmap */ |
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| 59 | +#define CPM0_REGS_BITMAP 2 |
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| 60 | +#define CPM0_HEADER_SIZE 3 |
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| 61 | + |
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| 62 | +/* CPM1 Index 0: lux_per_bit, 1: calibscale, 2: resolution (100000) */ |
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| 63 | +#define CPM1_LUX_PER_BIT 0 |
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| 64 | +#define CPM1_CALIBSCALE 1 |
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| 65 | +#define CPM1_SIZE 3 |
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| 66 | + |
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| 67 | +/* CM3218 Family */ |
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| 68 | +static const int cm3218_als_it_bits[] = { 0, 1, 2, 3 }; |
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| 69 | +static const int cm3218_als_it_values[] = { 100000, 200000, 400000, 800000 }; |
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| 70 | + |
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| 71 | +/* CM32181 Family */ |
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| 72 | +static const int cm32181_als_it_bits[] = { 12, 8, 0, 1, 2, 3 }; |
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| 73 | +static const int cm32181_als_it_values[] = { |
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| 74 | + 25000, 50000, 100000, 200000, 400000, 800000 |
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52 | 75 | }; |
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53 | | - |
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54 | | -static const int als_it_bits[] = {12, 8, 0, 1, 2, 3}; |
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55 | | -static const int als_it_value[] = {25000, 50000, 100000, 200000, 400000, |
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56 | | - 800000}; |
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57 | 76 | |
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58 | 77 | struct cm32181_chip { |
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59 | 78 | struct i2c_client *client; |
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| 79 | + struct device *dev; |
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60 | 80 | struct mutex lock; |
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61 | 81 | u16 conf_regs[CM32181_CONF_REG_NUM]; |
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| 82 | + unsigned long init_regs_bitmap; |
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62 | 83 | int calibscale; |
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| 84 | + int lux_per_bit; |
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| 85 | + int lux_per_bit_base_it; |
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| 86 | + int num_als_it; |
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| 87 | + const int *als_it_bits; |
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| 88 | + const int *als_it_values; |
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63 | 89 | }; |
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| 90 | + |
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| 91 | +static int cm32181_read_als_it(struct cm32181_chip *cm32181, int *val2); |
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| 92 | + |
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| 93 | +#ifdef CONFIG_ACPI |
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| 94 | +/** |
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| 95 | + * cm32181_acpi_get_cpm() - Get CPM object from ACPI |
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| 96 | + * @dev: pointer of struct device. |
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| 97 | + * @obj_name: pointer of ACPI object name. |
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| 98 | + * @values: pointer of array for return elements. |
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| 99 | + * @count: maximum size of return array. |
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| 100 | + * |
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| 101 | + * Convert ACPI CPM table to array. |
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| 102 | + * |
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| 103 | + * Return: -ENODEV for fail. Otherwise is number of elements. |
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| 104 | + */ |
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| 105 | +static int cm32181_acpi_get_cpm(struct device *dev, char *obj_name, |
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| 106 | + u64 *values, int count) |
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| 107 | +{ |
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| 108 | + struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
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| 109 | + union acpi_object *cpm, *elem; |
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| 110 | + acpi_handle handle; |
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| 111 | + acpi_status status; |
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| 112 | + int i; |
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| 113 | + |
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| 114 | + handle = ACPI_HANDLE(dev); |
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| 115 | + if (!handle) |
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| 116 | + return -ENODEV; |
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| 117 | + |
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| 118 | + status = acpi_evaluate_object(handle, obj_name, NULL, &buffer); |
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| 119 | + if (ACPI_FAILURE(status)) { |
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| 120 | + dev_err(dev, "object %s not found\n", obj_name); |
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| 121 | + return -ENODEV; |
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| 122 | + } |
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| 123 | + |
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| 124 | + cpm = buffer.pointer; |
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| 125 | + if (cpm->package.count > count) |
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| 126 | + dev_warn(dev, "%s table contains %u values, only using first %d values\n", |
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| 127 | + obj_name, cpm->package.count, count); |
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| 128 | + |
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| 129 | + count = min_t(int, cpm->package.count, count); |
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| 130 | + for (i = 0; i < count; i++) { |
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| 131 | + elem = &(cpm->package.elements[i]); |
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| 132 | + values[i] = elem->integer.value; |
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| 133 | + } |
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| 134 | + |
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| 135 | + kfree(buffer.pointer); |
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| 136 | + |
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| 137 | + return count; |
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| 138 | +} |
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| 139 | + |
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| 140 | +static void cm32181_acpi_parse_cpm_tables(struct cm32181_chip *cm32181) |
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| 141 | +{ |
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| 142 | + u64 vals[CPM0_HEADER_SIZE + CM32181_CONF_REG_NUM]; |
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| 143 | + struct device *dev = cm32181->dev; |
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| 144 | + int i, count; |
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| 145 | + |
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| 146 | + count = cm32181_acpi_get_cpm(dev, "CPM0", vals, ARRAY_SIZE(vals)); |
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| 147 | + if (count <= CPM0_HEADER_SIZE) |
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| 148 | + return; |
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| 149 | + |
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| 150 | + count -= CPM0_HEADER_SIZE; |
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| 151 | + |
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| 152 | + cm32181->init_regs_bitmap = vals[CPM0_REGS_BITMAP]; |
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| 153 | + cm32181->init_regs_bitmap &= GENMASK(count - 1, 0); |
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| 154 | + for_each_set_bit(i, &cm32181->init_regs_bitmap, count) |
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| 155 | + cm32181->conf_regs[i] = vals[CPM0_HEADER_SIZE + i]; |
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| 156 | + |
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| 157 | + count = cm32181_acpi_get_cpm(dev, "CPM1", vals, ARRAY_SIZE(vals)); |
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| 158 | + if (count != CPM1_SIZE) |
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| 159 | + return; |
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| 160 | + |
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| 161 | + cm32181->lux_per_bit = vals[CPM1_LUX_PER_BIT]; |
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| 162 | + |
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| 163 | + /* Check for uncalibrated devices */ |
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| 164 | + if (vals[CPM1_CALIBSCALE] == CM32181_CALIBSCALE_DEFAULT) |
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| 165 | + return; |
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| 166 | + |
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| 167 | + cm32181->calibscale = vals[CPM1_CALIBSCALE]; |
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| 168 | + /* CPM1 lux_per_bit is for the current it value */ |
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| 169 | + cm32181_read_als_it(cm32181, &cm32181->lux_per_bit_base_it); |
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| 170 | +} |
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| 171 | +#else |
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| 172 | +static void cm32181_acpi_parse_cpm_tables(struct cm32181_chip *cm32181) |
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| 173 | +{ |
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| 174 | +} |
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| 175 | +#endif /* CONFIG_ACPI */ |
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64 | 176 | |
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65 | 177 | /** |
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66 | 178 | * cm32181_reg_init() - Initialize CM32181 registers |
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.. | .. |
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81 | 193 | return ret; |
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82 | 194 | |
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83 | 195 | /* check device ID */ |
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84 | | - if ((ret & 0xFF) != 0x81) |
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| 196 | + switch (ret & 0xFF) { |
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| 197 | + case 0x18: /* CM3218 */ |
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| 198 | + cm32181->num_als_it = ARRAY_SIZE(cm3218_als_it_bits); |
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| 199 | + cm32181->als_it_bits = cm3218_als_it_bits; |
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| 200 | + cm32181->als_it_values = cm3218_als_it_values; |
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| 201 | + break; |
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| 202 | + case 0x81: /* CM32181 */ |
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| 203 | + case 0x82: /* CM32182, fully compat. with CM32181 */ |
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| 204 | + cm32181->num_als_it = ARRAY_SIZE(cm32181_als_it_bits); |
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| 205 | + cm32181->als_it_bits = cm32181_als_it_bits; |
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| 206 | + cm32181->als_it_values = cm32181_als_it_values; |
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| 207 | + break; |
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| 208 | + default: |
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85 | 209 | return -ENODEV; |
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| 210 | + } |
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86 | 211 | |
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87 | 212 | /* Default Values */ |
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88 | | - cm32181->conf_regs[CM32181_REG_ADDR_CMD] = CM32181_CMD_ALS_ENABLE | |
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| 213 | + cm32181->conf_regs[CM32181_REG_ADDR_CMD] = |
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89 | 214 | CM32181_CMD_ALS_IT_DEFAULT | CM32181_CMD_ALS_SM_DEFAULT; |
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| 215 | + cm32181->init_regs_bitmap = BIT(CM32181_REG_ADDR_CMD); |
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90 | 216 | cm32181->calibscale = CM32181_CALIBSCALE_DEFAULT; |
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| 217 | + cm32181->lux_per_bit = CM32181_LUX_PER_BIT; |
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| 218 | + cm32181->lux_per_bit_base_it = CM32181_LUX_PER_BIT_BASE_IT; |
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| 219 | + |
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| 220 | + if (ACPI_HANDLE(cm32181->dev)) |
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| 221 | + cm32181_acpi_parse_cpm_tables(cm32181); |
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91 | 222 | |
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92 | 223 | /* Initialize registers*/ |
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93 | | - for (i = 0; i < CM32181_CONF_REG_NUM; i++) { |
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94 | | - ret = i2c_smbus_write_word_data(client, cm32181_reg[i], |
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95 | | - cm32181->conf_regs[i]); |
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| 224 | + for_each_set_bit(i, &cm32181->init_regs_bitmap, CM32181_CONF_REG_NUM) { |
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| 225 | + ret = i2c_smbus_write_word_data(client, i, |
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| 226 | + cm32181->conf_regs[i]); |
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96 | 227 | if (ret < 0) |
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97 | 228 | return ret; |
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98 | 229 | } |
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.. | .. |
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105 | 236 | * @cm32181: pointer of struct cm32181 |
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106 | 237 | * @val2: pointer of int to load the als_it value. |
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107 | 238 | * |
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108 | | - * Report the current integartion time by millisecond. |
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| 239 | + * Report the current integration time in milliseconds. |
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109 | 240 | * |
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110 | 241 | * Return: IIO_VAL_INT_PLUS_MICRO for success, otherwise -EINVAL. |
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111 | 242 | */ |
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.. | .. |
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117 | 248 | als_it = cm32181->conf_regs[CM32181_REG_ADDR_CMD]; |
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118 | 249 | als_it &= CM32181_CMD_ALS_IT_MASK; |
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119 | 250 | als_it >>= CM32181_CMD_ALS_IT_SHIFT; |
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120 | | - for (i = 0; i < ARRAY_SIZE(als_it_bits); i++) { |
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121 | | - if (als_it == als_it_bits[i]) { |
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122 | | - *val2 = als_it_value[i]; |
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| 251 | + for (i = 0; i < cm32181->num_als_it; i++) { |
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| 252 | + if (als_it == cm32181->als_it_bits[i]) { |
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| 253 | + *val2 = cm32181->als_it_values[i]; |
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123 | 254 | return IIO_VAL_INT_PLUS_MICRO; |
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124 | 255 | } |
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125 | 256 | } |
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.. | .. |
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142 | 273 | u16 als_it; |
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143 | 274 | int ret, i, n; |
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144 | 275 | |
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145 | | - n = ARRAY_SIZE(als_it_value); |
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| 276 | + n = cm32181->num_als_it; |
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146 | 277 | for (i = 0; i < n; i++) |
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147 | | - if (val <= als_it_value[i]) |
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| 278 | + if (val <= cm32181->als_it_values[i]) |
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148 | 279 | break; |
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149 | 280 | if (i >= n) |
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150 | 281 | i = n - 1; |
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151 | 282 | |
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152 | | - als_it = als_it_bits[i]; |
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| 283 | + als_it = cm32181->als_it_bits[i]; |
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153 | 284 | als_it <<= CM32181_CMD_ALS_IT_SHIFT; |
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154 | 285 | |
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155 | 286 | mutex_lock(&cm32181->lock); |
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.. | .. |
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178 | 309 | struct i2c_client *client = cm32181->client; |
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179 | 310 | int ret; |
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180 | 311 | int als_it; |
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181 | | - unsigned long lux; |
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| 312 | + u64 lux; |
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182 | 313 | |
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183 | 314 | ret = cm32181_read_als_it(cm32181, &als_it); |
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184 | 315 | if (ret < 0) |
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185 | 316 | return -EINVAL; |
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186 | 317 | |
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187 | | - lux = CM32181_MLUX_PER_BIT; |
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188 | | - lux *= CM32181_MLUX_PER_BIT_BASE_IT; |
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189 | | - lux /= als_it; |
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| 318 | + lux = cm32181->lux_per_bit; |
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| 319 | + lux *= cm32181->lux_per_bit_base_it; |
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| 320 | + lux = div_u64(lux, als_it); |
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190 | 321 | |
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191 | 322 | ret = i2c_smbus_read_word_data(client, CM32181_REG_ADDR_ALS); |
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192 | 323 | if (ret < 0) |
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.. | .. |
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194 | 325 | |
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195 | 326 | lux *= ret; |
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196 | 327 | lux *= cm32181->calibscale; |
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197 | | - lux /= CM32181_CALIBSCALE_RESOLUTION; |
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198 | | - lux /= MLUX_PER_LUX; |
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| 328 | + lux = div_u64(lux, CM32181_CALIBSCALE_RESOLUTION); |
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| 329 | + lux = div_u64(lux, CM32181_LUX_PER_BIT_RESOLUTION); |
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199 | 330 | |
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200 | 331 | if (lux > 0xFFFF) |
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201 | 332 | lux = 0xFFFF; |
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.. | .. |
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261 | 392 | static ssize_t cm32181_get_it_available(struct device *dev, |
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262 | 393 | struct device_attribute *attr, char *buf) |
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263 | 394 | { |
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| 395 | + struct cm32181_chip *cm32181 = iio_priv(dev_to_iio_dev(dev)); |
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264 | 396 | int i, n, len; |
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265 | 397 | |
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266 | | - n = ARRAY_SIZE(als_it_value); |
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| 398 | + n = cm32181->num_als_it; |
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267 | 399 | for (i = 0, len = 0; i < n; i++) |
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268 | | - len += sprintf(buf + len, "0.%06u ", als_it_value[i]); |
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| 400 | + len += sprintf(buf + len, "0.%06u ", cm32181->als_it_values[i]); |
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269 | 401 | return len + sprintf(buf + len, "\n"); |
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270 | 402 | } |
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271 | 403 | |
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.. | .. |
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297 | 429 | .attrs = &cm32181_attribute_group, |
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298 | 430 | }; |
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299 | 431 | |
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300 | | -static int cm32181_probe(struct i2c_client *client, |
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301 | | - const struct i2c_device_id *id) |
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| 432 | +static void cm32181_unregister_dummy_client(void *data) |
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302 | 433 | { |
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| 434 | + struct i2c_client *client = data; |
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| 435 | + |
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| 436 | + /* Unregister the dummy client */ |
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| 437 | + i2c_unregister_device(client); |
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| 438 | +} |
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| 439 | + |
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| 440 | +static int cm32181_probe(struct i2c_client *client) |
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| 441 | +{ |
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| 442 | + struct device *dev = &client->dev; |
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303 | 443 | struct cm32181_chip *cm32181; |
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304 | 444 | struct iio_dev *indio_dev; |
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305 | 445 | int ret; |
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306 | 446 | |
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307 | | - indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*cm32181)); |
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308 | | - if (!indio_dev) { |
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309 | | - dev_err(&client->dev, "devm_iio_device_alloc failed\n"); |
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| 447 | + indio_dev = devm_iio_device_alloc(dev, sizeof(*cm32181)); |
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| 448 | + if (!indio_dev) |
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310 | 449 | return -ENOMEM; |
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| 450 | + |
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| 451 | + /* |
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| 452 | + * Some ACPI systems list 2 I2C resources for the CM3218 sensor, the |
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| 453 | + * SMBus Alert Response Address (ARA, 0x0c) and the actual I2C address. |
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| 454 | + * Detect this and take the following step to deal with it: |
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| 455 | + * 1. When a SMBus Alert capable sensor has an Alert asserted, it will |
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| 456 | + * not respond on its actual I2C address. Read a byte from the ARA |
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| 457 | + * to clear any pending Alerts. |
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| 458 | + * 2. Create a "dummy" client for the actual I2C address and |
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| 459 | + * use that client to communicate with the sensor. |
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| 460 | + */ |
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| 461 | + if (ACPI_HANDLE(dev) && client->addr == SMBUS_ALERT_RESPONSE_ADDRESS) { |
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| 462 | + struct i2c_board_info board_info = { .type = "dummy" }; |
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| 463 | + |
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| 464 | + i2c_smbus_read_byte(client); |
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| 465 | + |
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| 466 | + client = i2c_acpi_new_device(dev, 1, &board_info); |
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| 467 | + if (IS_ERR(client)) |
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| 468 | + return PTR_ERR(client); |
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| 469 | + |
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| 470 | + ret = devm_add_action_or_reset(dev, cm32181_unregister_dummy_client, client); |
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| 471 | + if (ret) |
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| 472 | + return ret; |
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311 | 473 | } |
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312 | 474 | |
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313 | 475 | cm32181 = iio_priv(indio_dev); |
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314 | | - i2c_set_clientdata(client, indio_dev); |
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315 | 476 | cm32181->client = client; |
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| 477 | + cm32181->dev = dev; |
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316 | 478 | |
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317 | 479 | mutex_init(&cm32181->lock); |
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318 | | - indio_dev->dev.parent = &client->dev; |
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319 | 480 | indio_dev->channels = cm32181_channels; |
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320 | 481 | indio_dev->num_channels = ARRAY_SIZE(cm32181_channels); |
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321 | 482 | indio_dev->info = &cm32181_info; |
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322 | | - indio_dev->name = id->name; |
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| 483 | + indio_dev->name = dev_name(dev); |
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323 | 484 | indio_dev->modes = INDIO_DIRECT_MODE; |
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324 | 485 | |
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325 | 486 | ret = cm32181_reg_init(cm32181); |
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326 | 487 | if (ret) { |
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327 | | - dev_err(&client->dev, |
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328 | | - "%s: register init failed\n", |
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329 | | - __func__); |
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| 488 | + dev_err(dev, "%s: register init failed\n", __func__); |
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330 | 489 | return ret; |
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331 | 490 | } |
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332 | 491 | |
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333 | | - ret = devm_iio_device_register(&client->dev, indio_dev); |
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| 492 | + ret = devm_iio_device_register(dev, indio_dev); |
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334 | 493 | if (ret) { |
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335 | | - dev_err(&client->dev, |
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336 | | - "%s: regist device failed\n", |
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337 | | - __func__); |
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| 494 | + dev_err(dev, "%s: regist device failed\n", __func__); |
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338 | 495 | return ret; |
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339 | 496 | } |
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340 | 497 | |
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341 | 498 | return 0; |
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342 | 499 | } |
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343 | 500 | |
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344 | | -static const struct i2c_device_id cm32181_id[] = { |
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345 | | - { "cm32181", 0 }, |
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346 | | - { } |
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347 | | -}; |
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348 | | - |
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349 | | -MODULE_DEVICE_TABLE(i2c, cm32181_id); |
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350 | | - |
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351 | 501 | static const struct of_device_id cm32181_of_match[] = { |
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| 502 | + { .compatible = "capella,cm3218" }, |
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352 | 503 | { .compatible = "capella,cm32181" }, |
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353 | 504 | { } |
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354 | 505 | }; |
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355 | 506 | MODULE_DEVICE_TABLE(of, cm32181_of_match); |
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356 | 507 | |
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| 508 | +#ifdef CONFIG_ACPI |
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| 509 | +static const struct acpi_device_id cm32181_acpi_match[] = { |
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| 510 | + { "CPLM3218", 0 }, |
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| 511 | + { } |
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| 512 | +}; |
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| 513 | +MODULE_DEVICE_TABLE(acpi, cm32181_acpi_match); |
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| 514 | +#endif |
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| 515 | + |
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357 | 516 | static struct i2c_driver cm32181_driver = { |
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358 | 517 | .driver = { |
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359 | 518 | .name = "cm32181", |
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360 | | - .of_match_table = of_match_ptr(cm32181_of_match), |
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| 519 | + .acpi_match_table = ACPI_PTR(cm32181_acpi_match), |
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| 520 | + .of_match_table = cm32181_of_match, |
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361 | 521 | }, |
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362 | | - .id_table = cm32181_id, |
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363 | | - .probe = cm32181_probe, |
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| 522 | + .probe_new = cm32181_probe, |
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364 | 523 | }; |
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365 | 524 | |
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366 | 525 | module_i2c_driver(cm32181_driver); |
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