hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/iio/dac/ltc2632.c
....@@ -1,10 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * LTC2632 Digital to analog convertors spi driver
34 *
45 * Copyright 2017 Maxime Roussin-Bélanger
56 * expanded by Silvan Murer <silvan.murer@gmail.com>
6
- *
7
- * Licensed under the GPL-2.
87 */
98
109 #include <linux/device.h>
....@@ -13,10 +12,7 @@
1312 #include <linux/iio/iio.h>
1413 #include <linux/regulator/consumer.h>
1514
16
-#define LTC2632_DAC_CHANNELS 2
17
-
18
-#define LTC2632_ADDR_DAC0 0x0
19
-#define LTC2632_ADDR_DAC1 0x1
15
+#include <asm/unaligned.h>
2016
2117 #define LTC2632_CMD_WRITE_INPUT_N 0x0
2218 #define LTC2632_CMD_UPDATE_DAC_N 0x1
....@@ -30,19 +26,21 @@
3026 /**
3127 * struct ltc2632_chip_info - chip specific information
3228 * @channels: channel spec for the DAC
29
+ * @num_channels: DAC channel count of the chip
3330 * @vref_mv: internal reference voltage
3431 */
3532 struct ltc2632_chip_info {
3633 const struct iio_chan_spec *channels;
34
+ const size_t num_channels;
3735 const int vref_mv;
3836 };
3937
4038 /**
4139 * struct ltc2632_state - driver instance specific data
4240 * @spi_dev: pointer to the spi_device struct
43
- * @powerdown_cache_mask used to show current channel powerdown state
44
- * @vref_mv used reference voltage (internal or external)
45
- * @vref_reg regulator for the reference voltage
41
+ * @powerdown_cache_mask: used to show current channel powerdown state
42
+ * @vref_mv: used reference voltage (internal or external)
43
+ * @vref_reg: regulator for the reference voltage
4644 */
4745 struct ltc2632_state {
4846 struct spi_device *spi_dev;
....@@ -58,6 +56,18 @@
5856 ID_LTC2632H12,
5957 ID_LTC2632H10,
6058 ID_LTC2632H8,
59
+ ID_LTC2634L12,
60
+ ID_LTC2634L10,
61
+ ID_LTC2634L8,
62
+ ID_LTC2634H12,
63
+ ID_LTC2634H10,
64
+ ID_LTC2634H8,
65
+ ID_LTC2636L12,
66
+ ID_LTC2636L10,
67
+ ID_LTC2636L8,
68
+ ID_LTC2636H12,
69
+ ID_LTC2636H10,
70
+ ID_LTC2636H8,
6171 };
6272
6373 static int ltc2632_spi_write(struct spi_device *spi,
....@@ -74,9 +84,7 @@
7484 * 10-, 8-bit input code followed by 4, 6, or 8 don't care bits.
7585 */
7686 data = (cmd << 20) | (addr << 16) | (val << shift);
77
- msg[0] = data >> 16;
78
- msg[1] = data >> 8;
79
- msg[2] = data;
87
+ put_unaligned_be24(data, &msg[0]);
8088
8189 return spi_write(spi, msg, sizeof(msg));
8290 }
....@@ -191,39 +199,107 @@
191199 const struct iio_chan_spec _name ## _channels[] = { \
192200 LTC2632_CHANNEL(0, _bits), \
193201 LTC2632_CHANNEL(1, _bits), \
202
+ LTC2632_CHANNEL(2, _bits), \
203
+ LTC2632_CHANNEL(3, _bits), \
204
+ LTC2632_CHANNEL(4, _bits), \
205
+ LTC2632_CHANNEL(5, _bits), \
206
+ LTC2632_CHANNEL(6, _bits), \
207
+ LTC2632_CHANNEL(7, _bits), \
194208 }
195209
196
-static DECLARE_LTC2632_CHANNELS(ltc2632l12, 12);
197
-static DECLARE_LTC2632_CHANNELS(ltc2632l10, 10);
198
-static DECLARE_LTC2632_CHANNELS(ltc2632l8, 8);
199
-
200
-static DECLARE_LTC2632_CHANNELS(ltc2632h12, 12);
201
-static DECLARE_LTC2632_CHANNELS(ltc2632h10, 10);
202
-static DECLARE_LTC2632_CHANNELS(ltc2632h8, 8);
210
+static DECLARE_LTC2632_CHANNELS(ltc2632x12, 12);
211
+static DECLARE_LTC2632_CHANNELS(ltc2632x10, 10);
212
+static DECLARE_LTC2632_CHANNELS(ltc2632x8, 8);
203213
204214 static const struct ltc2632_chip_info ltc2632_chip_info_tbl[] = {
205215 [ID_LTC2632L12] = {
206
- .channels = ltc2632l12_channels,
216
+ .channels = ltc2632x12_channels,
217
+ .num_channels = 2,
207218 .vref_mv = 2500,
208219 },
209220 [ID_LTC2632L10] = {
210
- .channels = ltc2632l10_channels,
221
+ .channels = ltc2632x10_channels,
222
+ .num_channels = 2,
211223 .vref_mv = 2500,
212224 },
213225 [ID_LTC2632L8] = {
214
- .channels = ltc2632l8_channels,
226
+ .channels = ltc2632x8_channels,
227
+ .num_channels = 2,
215228 .vref_mv = 2500,
216229 },
217230 [ID_LTC2632H12] = {
218
- .channels = ltc2632h12_channels,
231
+ .channels = ltc2632x12_channels,
232
+ .num_channels = 2,
219233 .vref_mv = 4096,
220234 },
221235 [ID_LTC2632H10] = {
222
- .channels = ltc2632h10_channels,
236
+ .channels = ltc2632x10_channels,
237
+ .num_channels = 2,
223238 .vref_mv = 4096,
224239 },
225240 [ID_LTC2632H8] = {
226
- .channels = ltc2632h8_channels,
241
+ .channels = ltc2632x8_channels,
242
+ .num_channels = 2,
243
+ .vref_mv = 4096,
244
+ },
245
+ [ID_LTC2634L12] = {
246
+ .channels = ltc2632x12_channels,
247
+ .num_channels = 4,
248
+ .vref_mv = 2500,
249
+ },
250
+ [ID_LTC2634L10] = {
251
+ .channels = ltc2632x10_channels,
252
+ .num_channels = 4,
253
+ .vref_mv = 2500,
254
+ },
255
+ [ID_LTC2634L8] = {
256
+ .channels = ltc2632x8_channels,
257
+ .num_channels = 4,
258
+ .vref_mv = 2500,
259
+ },
260
+ [ID_LTC2634H12] = {
261
+ .channels = ltc2632x12_channels,
262
+ .num_channels = 4,
263
+ .vref_mv = 4096,
264
+ },
265
+ [ID_LTC2634H10] = {
266
+ .channels = ltc2632x10_channels,
267
+ .num_channels = 4,
268
+ .vref_mv = 4096,
269
+ },
270
+ [ID_LTC2634H8] = {
271
+ .channels = ltc2632x8_channels,
272
+ .num_channels = 4,
273
+ .vref_mv = 4096,
274
+ },
275
+ [ID_LTC2636L12] = {
276
+ .channels = ltc2632x12_channels,
277
+ .num_channels = 8,
278
+ .vref_mv = 2500,
279
+ },
280
+ [ID_LTC2636L10] = {
281
+ .channels = ltc2632x10_channels,
282
+ .num_channels = 8,
283
+ .vref_mv = 2500,
284
+ },
285
+ [ID_LTC2636L8] = {
286
+ .channels = ltc2632x8_channels,
287
+ .num_channels = 8,
288
+ .vref_mv = 2500,
289
+ },
290
+ [ID_LTC2636H12] = {
291
+ .channels = ltc2632x12_channels,
292
+ .num_channels = 8,
293
+ .vref_mv = 4096,
294
+ },
295
+ [ID_LTC2636H10] = {
296
+ .channels = ltc2632x10_channels,
297
+ .num_channels = 8,
298
+ .vref_mv = 4096,
299
+ },
300
+ [ID_LTC2636H8] = {
301
+ .channels = ltc2632x8_channels,
302
+ .num_channels = 8,
227303 .vref_mv = 4096,
228304 },
229305 };
....@@ -286,13 +362,12 @@
286362 }
287363 }
288364
289
- indio_dev->dev.parent = &spi->dev;
290365 indio_dev->name = dev_of_node(&spi->dev) ? dev_of_node(&spi->dev)->name
291366 : spi_get_device_id(spi)->name;
292367 indio_dev->info = &ltc2632_info;
293368 indio_dev->modes = INDIO_DIRECT_MODE;
294369 indio_dev->channels = chip_info->channels;
295
- indio_dev->num_channels = LTC2632_DAC_CHANNELS;
370
+ indio_dev->num_channels = chip_info->num_channels;
296371
297372 return iio_device_register(indio_dev);
298373 }
....@@ -317,6 +392,18 @@
317392 { "ltc2632-h12", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2632H12] },
318393 { "ltc2632-h10", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2632H10] },
319394 { "ltc2632-h8", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2632H8] },
395
+ { "ltc2634-l12", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2634L12] },
396
+ { "ltc2634-l10", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2634L10] },
397
+ { "ltc2634-l8", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2634L8] },
398
+ { "ltc2634-h12", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2634H12] },
399
+ { "ltc2634-h10", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2634H10] },
400
+ { "ltc2634-h8", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2634H8] },
401
+ { "ltc2636-l12", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2636L12] },
402
+ { "ltc2636-l10", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2636L10] },
403
+ { "ltc2636-l8", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2636L8] },
404
+ { "ltc2636-h12", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2636H12] },
405
+ { "ltc2636-h10", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2636H10] },
406
+ { "ltc2636-h8", (kernel_ulong_t)&ltc2632_chip_info_tbl[ID_LTC2636H8] },
320407 {}
321408 };
322409 MODULE_DEVICE_TABLE(spi, ltc2632_id);
....@@ -340,6 +427,42 @@
340427 }, {
341428 .compatible = "lltc,ltc2632-h8",
342429 .data = &ltc2632_chip_info_tbl[ID_LTC2632H8]
430
+ }, {
431
+ .compatible = "lltc,ltc2634-l12",
432
+ .data = &ltc2632_chip_info_tbl[ID_LTC2634L12]
433
+ }, {
434
+ .compatible = "lltc,ltc2634-l10",
435
+ .data = &ltc2632_chip_info_tbl[ID_LTC2634L10]
436
+ }, {
437
+ .compatible = "lltc,ltc2634-l8",
438
+ .data = &ltc2632_chip_info_tbl[ID_LTC2634L8]
439
+ }, {
440
+ .compatible = "lltc,ltc2634-h12",
441
+ .data = &ltc2632_chip_info_tbl[ID_LTC2634H12]
442
+ }, {
443
+ .compatible = "lltc,ltc2634-h10",
444
+ .data = &ltc2632_chip_info_tbl[ID_LTC2634H10]
445
+ }, {
446
+ .compatible = "lltc,ltc2634-h8",
447
+ .data = &ltc2632_chip_info_tbl[ID_LTC2634H8]
448
+ }, {
449
+ .compatible = "lltc,ltc2636-l12",
450
+ .data = &ltc2632_chip_info_tbl[ID_LTC2636L12]
451
+ }, {
452
+ .compatible = "lltc,ltc2636-l10",
453
+ .data = &ltc2632_chip_info_tbl[ID_LTC2636L10]
454
+ }, {
455
+ .compatible = "lltc,ltc2636-l8",
456
+ .data = &ltc2632_chip_info_tbl[ID_LTC2636L8]
457
+ }, {
458
+ .compatible = "lltc,ltc2636-h12",
459
+ .data = &ltc2632_chip_info_tbl[ID_LTC2636H12]
460
+ }, {
461
+ .compatible = "lltc,ltc2636-h10",
462
+ .data = &ltc2632_chip_info_tbl[ID_LTC2636H10]
463
+ }, {
464
+ .compatible = "lltc,ltc2636-h8",
465
+ .data = &ltc2632_chip_info_tbl[ID_LTC2636H8]
343466 },
344467 {}
345468 };