hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/iio/adc/stx104.c
....@@ -15,7 +15,9 @@
1515 #include <linux/kernel.h>
1616 #include <linux/module.h>
1717 #include <linux/moduleparam.h>
18
+#include <linux/mutex.h>
1819 #include <linux/spinlock.h>
20
+#include <linux/types.h>
1921
2022 #define STX104_OUT_CHAN(chan) { \
2123 .type = IIO_VOLTAGE, \
....@@ -45,13 +47,37 @@
4547 MODULE_PARM_DESC(base, "Apex Embedded Systems STX104 base addresses");
4648
4749 /**
50
+ * struct stx104_reg - device register structure
51
+ * @ssr_ad: Software Strobe Register and ADC Data
52
+ * @achan: ADC Channel
53
+ * @dio: Digital I/O
54
+ * @dac: DAC Channels
55
+ * @cir_asr: Clear Interrupts and ADC Status
56
+ * @acr: ADC Control
57
+ * @pccr_fsh: Pacer Clock Control and FIFO Status MSB
58
+ * @acfg: ADC Configuration
59
+ */
60
+struct stx104_reg {
61
+ u16 ssr_ad;
62
+ u8 achan;
63
+ u8 dio;
64
+ u16 dac[2];
65
+ u8 cir_asr;
66
+ u8 acr;
67
+ u8 pccr_fsh;
68
+ u8 acfg;
69
+};
70
+
71
+/**
4872 * struct stx104_iio - IIO device private data structure
73
+ * @lock: synchronization lock to prevent I/O race conditions
4974 * @chan_out_states: channels' output states
50
- * @base: base port address of the IIO device
75
+ * @reg: I/O address offset for the device registers
5176 */
5277 struct stx104_iio {
78
+ struct mutex lock;
5379 unsigned int chan_out_states[STX104_NUM_OUT_CHAN];
54
- unsigned int base;
80
+ struct stx104_reg __iomem *reg;
5581 };
5682
5783 /**
....@@ -64,7 +90,7 @@
6490 struct stx104_gpio {
6591 struct gpio_chip chip;
6692 spinlock_t lock;
67
- unsigned int base;
93
+ u8 __iomem *base;
6894 unsigned int out_state;
6995 };
7096
....@@ -72,6 +98,7 @@
7298 struct iio_chan_spec const *chan, int *val, int *val2, long mask)
7399 {
74100 struct stx104_iio *const priv = iio_priv(indio_dev);
101
+ struct stx104_reg __iomem *const reg = priv->reg;
75102 unsigned int adc_config;
76103 int adbu;
77104 int gain;
....@@ -79,7 +106,7 @@
79106 switch (mask) {
80107 case IIO_CHAN_INFO_HARDWAREGAIN:
81108 /* get gain configuration */
82
- adc_config = inb(priv->base + 11);
109
+ adc_config = ioread8(&reg->acfg);
83110 gain = adc_config & 0x3;
84111
85112 *val = 1 << gain;
....@@ -90,25 +117,31 @@
90117 return IIO_VAL_INT;
91118 }
92119
120
+ mutex_lock(&priv->lock);
121
+
93122 /* select ADC channel */
94
- outb(chan->channel | (chan->channel << 4), priv->base + 2);
123
+ iowrite8(chan->channel | (chan->channel << 4), &reg->achan);
95124
96
- /* trigger ADC sample capture and wait for completion */
97
- outb(0, priv->base);
98
- while (inb(priv->base + 8) & BIT(7));
125
+ /* trigger ADC sample capture by writing to the 8-bit
126
+ * Software Strobe Register and wait for completion
127
+ */
128
+ iowrite8(0, &reg->ssr_ad);
129
+ while (ioread8(&reg->cir_asr) & BIT(7));
99130
100
- *val = inw(priv->base);
131
+ *val = ioread16(&reg->ssr_ad);
132
+
133
+ mutex_unlock(&priv->lock);
101134 return IIO_VAL_INT;
102135 case IIO_CHAN_INFO_OFFSET:
103136 /* get ADC bipolar/unipolar configuration */
104
- adc_config = inb(priv->base + 11);
137
+ adc_config = ioread8(&reg->acfg);
105138 adbu = !(adc_config & BIT(2));
106139
107140 *val = -32768 * adbu;
108141 return IIO_VAL_INT;
109142 case IIO_CHAN_INFO_SCALE:
110143 /* get ADC bipolar/unipolar and gain configuration */
111
- adc_config = inb(priv->base + 11);
144
+ adc_config = ioread8(&reg->acfg);
112145 adbu = !(adc_config & BIT(2));
113146 gain = adc_config & 0x3;
114147
....@@ -130,16 +163,16 @@
130163 /* Only four gain states (x1, x2, x4, x8) */
131164 switch (val) {
132165 case 1:
133
- outb(0, priv->base + 11);
166
+ iowrite8(0, &priv->reg->acfg);
134167 break;
135168 case 2:
136
- outb(1, priv->base + 11);
169
+ iowrite8(1, &priv->reg->acfg);
137170 break;
138171 case 4:
139
- outb(2, priv->base + 11);
172
+ iowrite8(2, &priv->reg->acfg);
140173 break;
141174 case 8:
142
- outb(3, priv->base + 11);
175
+ iowrite8(3, &priv->reg->acfg);
143176 break;
144177 default:
145178 return -EINVAL;
....@@ -152,9 +185,12 @@
152185 if ((unsigned int)val > 65535)
153186 return -EINVAL;
154187
155
- priv->chan_out_states[chan->channel] = val;
156
- outw(val, priv->base + 4 + 2 * chan->channel);
188
+ mutex_lock(&priv->lock);
157189
190
+ priv->chan_out_states[chan->channel] = val;
191
+ iowrite16(val, &priv->reg->dac[chan->channel]);
192
+
193
+ mutex_unlock(&priv->lock);
158194 return 0;
159195 }
160196 return -EINVAL;
....@@ -222,7 +258,7 @@
222258 if (offset >= 4)
223259 return -EINVAL;
224260
225
- return !!(inb(stx104gpio->base) & BIT(offset));
261
+ return !!(ioread8(stx104gpio->base) & BIT(offset));
226262 }
227263
228264 static int stx104_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
....@@ -230,7 +266,7 @@
230266 {
231267 struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip);
232268
233
- *bits = inb(stx104gpio->base);
269
+ *bits = ioread8(stx104gpio->base);
234270
235271 return 0;
236272 }
....@@ -252,7 +288,7 @@
252288 else
253289 stx104gpio->out_state &= ~mask;
254290
255
- outb(stx104gpio->out_state, stx104gpio->base);
291
+ iowrite8(stx104gpio->out_state, stx104gpio->base);
256292
257293 spin_unlock_irqrestore(&stx104gpio->lock, flags);
258294 }
....@@ -279,7 +315,7 @@
279315
280316 stx104gpio->out_state &= ~*mask;
281317 stx104gpio->out_state |= *mask & *bits;
282
- outb(stx104gpio->out_state, stx104gpio->base);
318
+ iowrite8(stx104gpio->out_state, stx104gpio->base);
283319
284320 spin_unlock_irqrestore(&stx104gpio->lock, flags);
285321 }
....@@ -306,11 +342,16 @@
306342 return -EBUSY;
307343 }
308344
345
+ priv = iio_priv(indio_dev);
346
+ priv->reg = devm_ioport_map(dev, base[id], STX104_EXTENT);
347
+ if (!priv->reg)
348
+ return -ENOMEM;
349
+
309350 indio_dev->info = &stx104_info;
310351 indio_dev->modes = INDIO_DIRECT_MODE;
311352
312353 /* determine if differential inputs */
313
- if (inb(base[id] + 8) & BIT(5)) {
354
+ if (ioread8(&priv->reg->cir_asr) & BIT(5)) {
314355 indio_dev->num_channels = ARRAY_SIZE(stx104_channels_diff);
315356 indio_dev->channels = stx104_channels_diff;
316357 } else {
....@@ -320,18 +361,17 @@
320361
321362 indio_dev->name = dev_name(dev);
322363
323
- priv = iio_priv(indio_dev);
324
- priv->base = base[id];
364
+ mutex_init(&priv->lock);
325365
326366 /* configure device for software trigger operation */
327
- outb(0, base[id] + 9);
367
+ iowrite8(0, &priv->reg->acr);
328368
329369 /* initialize gain setting to x1 */
330
- outb(0, base[id] + 11);
370
+ iowrite8(0, &priv->reg->acfg);
331371
332372 /* initialize DAC output to 0V */
333
- outw(0, base[id] + 4);
334
- outw(0, base[id] + 6);
373
+ iowrite16(0, &priv->reg->dac[0]);
374
+ iowrite16(0, &priv->reg->dac[1]);
335375
336376 stx104gpio->chip.label = dev_name(dev);
337377 stx104gpio->chip.parent = dev;
....@@ -346,7 +386,7 @@
346386 stx104gpio->chip.get_multiple = stx104_gpio_get_multiple;
347387 stx104gpio->chip.set = stx104_gpio_set;
348388 stx104gpio->chip.set_multiple = stx104_gpio_set_multiple;
349
- stx104gpio->base = base[id] + 3;
389
+ stx104gpio->base = &priv->reg->dio;
350390 stx104gpio->out_state = 0x0;
351391
352392 spin_lock_init(&stx104gpio->lock);