update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/hwmon/pmbus/ucd9000.c
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@@ -7,6 +7,7 @@
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  */
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 #include <linux/debugfs.h>
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+#include <linux/delay.h>
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 #include <linux/kernel.h>
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 #include <linux/module.h>
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 #include <linux/of_device.h>
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@@ -16,6 +17,7 @@
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 #include <linux/i2c.h>
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 #include <linux/pmbus.h>
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 #include <linux/gpio/driver.h>
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+#include <linux/timekeeping.h>
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 #include "pmbus.h"
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 enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd90320, ucd9090,
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@@ -65,6 +67,7 @@
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 	struct gpio_chip gpio;
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 #endif
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 	struct dentry *debugfs;
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+	ktime_t write_time;
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 };
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 #define to_ucd9000_data(_info) container_of(_info, struct ucd9000_data, info)
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@@ -72,6 +75,73 @@
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 	struct i2c_client *client;
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 	u8 index;
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 };
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+
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+/*
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+ * It has been observed that the UCD90320 randomly fails register access when
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+ * doing another access right on the back of a register write. To mitigate this
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+ * make sure that there is a minimum delay between a write access and the
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+ * following access. The 250us is based on experimental data. At a delay of
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+ * 200us the issue seems to go away. Add a bit of extra margin to allow for
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+ * system to system differences.
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+ */
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+#define UCD90320_WAIT_DELAY_US 250
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+
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+static inline void ucd90320_wait(const struct ucd9000_data *data)
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+{
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+	s64 delta = ktime_us_delta(ktime_get(), data->write_time);
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+
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+	if (delta < UCD90320_WAIT_DELAY_US)
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+		udelay(UCD90320_WAIT_DELAY_US - delta);
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+}
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+
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+static int ucd90320_read_word_data(struct i2c_client *client, int page,
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+				   int phase, int reg)
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+{
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+	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
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+	struct ucd9000_data *data = to_ucd9000_data(info);
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+
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+	if (reg >= PMBUS_VIRT_BASE)
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+		return -ENXIO;
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+
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+	ucd90320_wait(data);
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+	return pmbus_read_word_data(client, page, phase, reg);
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+}
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+
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+static int ucd90320_read_byte_data(struct i2c_client *client, int page, int reg)
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+{
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+	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
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+	struct ucd9000_data *data = to_ucd9000_data(info);
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+
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+	ucd90320_wait(data);
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+	return pmbus_read_byte_data(client, page, reg);
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+}
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+
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+static int ucd90320_write_word_data(struct i2c_client *client, int page,
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+				    int reg, u16 word)
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+{
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+	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
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+	struct ucd9000_data *data = to_ucd9000_data(info);
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+	int ret;
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+
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+	ucd90320_wait(data);
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+	ret = pmbus_write_word_data(client, page, reg, word);
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+	data->write_time = ktime_get();
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+
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+	return ret;
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+}
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+
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+static int ucd90320_write_byte(struct i2c_client *client, int page, u8 value)
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+{
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+	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
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+	struct ucd9000_data *data = to_ucd9000_data(info);
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+	int ret;
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+
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+	ucd90320_wait(data);
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+	ret = pmbus_write_byte(client, page, value);
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+	data->write_time = ktime_get();
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+
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+	return ret;
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+}
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 static int ucd9000_get_fan_config(struct i2c_client *client, int fan)
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 {
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@@ -598,6 +668,11 @@
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 		info->read_byte_data = ucd9000_read_byte_data;
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 		info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12
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 		  | PMBUS_HAVE_FAN34 | PMBUS_HAVE_STATUS_FAN34;
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+	} else if (mid->driver_data == ucd90320) {
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+		info->read_byte_data = ucd90320_read_byte_data;
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+		info->read_word_data = ucd90320_read_word_data;
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+		info->write_byte = ucd90320_write_byte;
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+		info->write_word_data = ucd90320_write_word_data;
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 	}
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 	ucd9000_probe_gpio(client, mid, data);