hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/gpu/drm/radeon/cik.c
....@@ -9551,17 +9551,8 @@
95519551 u16 bridge_cfg2, gpu_cfg2;
95529552 u32 max_lw, current_lw, tmp;
95539553
9554
- pcie_capability_read_word(root, PCI_EXP_LNKCTL,
9555
- &bridge_cfg);
9556
- pcie_capability_read_word(rdev->pdev, PCI_EXP_LNKCTL,
9557
- &gpu_cfg);
9558
-
9559
- tmp16 = bridge_cfg | PCI_EXP_LNKCTL_HAWD;
9560
- pcie_capability_write_word(root, PCI_EXP_LNKCTL, tmp16);
9561
-
9562
- tmp16 = gpu_cfg | PCI_EXP_LNKCTL_HAWD;
9563
- pcie_capability_write_word(rdev->pdev, PCI_EXP_LNKCTL,
9564
- tmp16);
9554
+ pcie_capability_set_word(root, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_HAWD);
9555
+ pcie_capability_set_word(rdev->pdev, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_HAWD);
95659556
95669557 tmp = RREG32_PCIE_PORT(PCIE_LC_STATUS1);
95679558 max_lw = (tmp & LC_DETECTED_LINK_WIDTH_MASK) >> LC_DETECTED_LINK_WIDTH_SHIFT;
....@@ -9608,21 +9599,14 @@
96089599 msleep(100);
96099600
96109601 /* linkctl */
9611
- pcie_capability_read_word(root, PCI_EXP_LNKCTL,
9612
- &tmp16);
9613
- tmp16 &= ~PCI_EXP_LNKCTL_HAWD;
9614
- tmp16 |= (bridge_cfg & PCI_EXP_LNKCTL_HAWD);
9615
- pcie_capability_write_word(root, PCI_EXP_LNKCTL,
9616
- tmp16);
9617
-
9618
- pcie_capability_read_word(rdev->pdev,
9619
- PCI_EXP_LNKCTL,
9620
- &tmp16);
9621
- tmp16 &= ~PCI_EXP_LNKCTL_HAWD;
9622
- tmp16 |= (gpu_cfg & PCI_EXP_LNKCTL_HAWD);
9623
- pcie_capability_write_word(rdev->pdev,
9624
- PCI_EXP_LNKCTL,
9625
- tmp16);
9602
+ pcie_capability_clear_and_set_word(root, PCI_EXP_LNKCTL,
9603
+ PCI_EXP_LNKCTL_HAWD,
9604
+ bridge_cfg &
9605
+ PCI_EXP_LNKCTL_HAWD);
9606
+ pcie_capability_clear_and_set_word(rdev->pdev, PCI_EXP_LNKCTL,
9607
+ PCI_EXP_LNKCTL_HAWD,
9608
+ gpu_cfg &
9609
+ PCI_EXP_LNKCTL_HAWD);
96269610
96279611 /* linkctl2 */
96289612 pcie_capability_read_word(root, PCI_EXP_LNKCTL2,