hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/gpu/drm/nouveau/dispnv50/sor507d.c
....@@ -21,24 +21,39 @@
2121 */
2222 #include "core.h"
2323
24
-static void
24
+#include <nvif/push507c.h>
25
+
26
+#include <nvhw/class/cl507d.h>
27
+#include <nvhw/class/cl837d.h>
28
+
29
+static int
2530 sor507d_ctrl(struct nv50_core *core, int or, u32 ctrl,
2631 struct nv50_head_atom *asyh)
2732 {
28
- u32 *push;
29
- if ((push = evo_wait(&core->chan, 2))) {
30
- if (asyh) {
31
- ctrl |= asyh->or.depth << 16;
32
- ctrl |= asyh->or.nvsync << 13;
33
- ctrl |= asyh->or.nhsync << 12;
34
- }
35
- evo_mthd(push, 0x0600 + (or * 0x40), 1);
36
- evo_data(push, ctrl);
37
- evo_kick(push, &core->chan);
33
+ struct nvif_push *push = core->chan.push;
34
+ int ret;
35
+
36
+ if (asyh) {
37
+ ctrl |= NVVAL(NV507D, SOR_SET_CONTROL, HSYNC_POLARITY, asyh->or.nhsync);
38
+ ctrl |= NVVAL(NV507D, SOR_SET_CONTROL, VSYNC_POLARITY, asyh->or.nvsync);
39
+ ctrl |= NVVAL(NV837D, SOR_SET_CONTROL, PIXEL_DEPTH, asyh->or.depth);
3840 }
41
+
42
+ if ((ret = PUSH_WAIT(push, 2)))
43
+ return ret;
44
+
45
+ PUSH_MTHD(push, NV507D, SOR_SET_CONTROL(or), ctrl);
46
+ return 0;
47
+}
48
+
49
+static void
50
+sor507d_get_caps(struct nv50_disp *core, struct nouveau_encoder *outp, int or)
51
+{
52
+ outp->caps.dp_interlace = true;
3953 }
4054
4155 const struct nv50_outp_func
4256 sor507d = {
4357 .ctrl = sor507d_ctrl,
58
+ .get_caps = sor507d_get_caps,
4459 };