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2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf 
 kernel/drivers/gpu/drm/nouveau/dispnv50/headc37d.c
....@@ -23,96 +23,134 @@
2323 #include "atom.h"
2424 #include "core.h"
2525 
26
-static void
26
+#include <nvif/pushc37b.h>
27
+
28
+#include <nvhw/class/clc37d.h>
29
+
30
+static int
2731 headc37d_or(struct nv50_head *head, struct nv50_head_atom *asyh)
2832 {
29
-	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
30
-	u32 *push;
31
-	if ((push = evo_wait(core, 2))) {
32
-		/*XXX: This is a dirty hack until OR depth handling is
33
-		 *     improved later for deep colour etc.
34
-		 */
35
-		switch (asyh->or.depth) {
36
-		case 6: asyh->or.depth = 5; break;
37
-		case 5: asyh->or.depth = 4; break;
38
-		case 2: asyh->or.depth = 1; break;
39
-		case 0:	asyh->or.depth = 4; break;
40
-		default:
41
-			WARN_ON(1);
42
-			break;
43
-		}
33
+	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
34
+	const int i = head->base.index;
35
+	u8 depth;
36
+	int ret;
4437 
45
-		evo_mthd(push, 0x2004 + (head->base.index * 0x400), 1);
46
-		evo_data(push, 0x00000001 |
47
-			       asyh->or.depth << 4 |
48
-			       asyh->or.nvsync << 3 |
49
-			       asyh->or.nhsync << 2);
50
-		evo_kick(push, core);
38
+	/*XXX: This is a dirty hack until OR depth handling is
39
+	 *     improved later for deep colour etc.
40
+	 */
41
+	switch (asyh->or.depth) {
42
+	case 6: depth = 5; break;
43
+	case 5: depth = 4; break;
44
+	case 2: depth = 1; break;
45
+	case 0:	depth = 4; break;
46
+	default:
47
+		depth = asyh->or.depth;
48
+		WARN_ON(1);
49
+		break;
5150 	}
52
-}
5351 
54
-static void
55
-headc37d_procamp(struct nv50_head *head, struct nv50_head_atom *asyh)
56
-{
57
-	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
58
-	u32 *push;
59
-	if ((push = evo_wait(core, 2))) {
60
-		evo_mthd(push, 0x2000 + (head->base.index * 0x400), 1);
61
-		evo_data(push, 0x80000000 |
62
-			       asyh->procamp.sat.sin << 16 |
63
-			       asyh->procamp.sat.cos << 4);
64
-		evo_kick(push, core);
65
-	}
66
-}
52
+	if ((ret = PUSH_WAIT(push, 2)))
53
+		return ret;
6754 
68
-static void
69
-headc37d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
70
-{
71
-	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
72
-	u32 *push;
73
-	if ((push = evo_wait(core, 2))) {
74
-		evo_mthd(push, 0x2018 + (head->base.index * 0x0400), 1);
75
-		evo_data(push, asyh->dither.mode << 8 |
76
-			       asyh->dither.bits << 4 |
77
-			       asyh->dither.enable);
78
-		evo_kick(push, core);
79
-	}
80
-}
81
-
82
-static void
83
-headc37d_curs_clr(struct nv50_head *head)
84
-{
85
-	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
86
-	u32 *push;
87
-	if ((push = evo_wait(core, 4))) {
88
-		evo_mthd(push, 0x209c + head->base.index * 0x400, 1);
89
-		evo_data(push, 0x000000cf);
90
-		evo_mthd(push, 0x2088 + head->base.index * 0x400, 1);
91
-		evo_data(push, 0x00000000);
92
-		evo_kick(push, core);
93
-	}
94
-}
95
-
96
-static void
97
-headc37d_curs_set(struct nv50_head *head, struct nv50_head_atom *asyh)
98
-{
99
-	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
100
-	u32 *push;
101
-	if ((push = evo_wait(core, 7))) {
102
-		evo_mthd(push, 0x209c + head->base.index * 0x400, 2);
103
-		evo_data(push, 0x80000000 |
104
-			       asyh->curs.layout << 8 |
105
-			       asyh->curs.format << 0);
106
-		evo_data(push, 0x000072ff);
107
-		evo_mthd(push, 0x2088 + head->base.index * 0x400, 1);
108
-		evo_data(push, asyh->curs.handle);
109
-		evo_mthd(push, 0x2090 + head->base.index * 0x400, 1);
110
-		evo_data(push, asyh->curs.offset >> 8);
111
-		evo_kick(push, core);
112
-	}
55
+	PUSH_MTHD(push, NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE(i),
56
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) |
57
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) |
58
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) |
59
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, depth) |
60
+		  NVDEF(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, COLOR_SPACE_OVERRIDE, DISABLE));
61
+	return 0;
11362 }
11463 
11564 static int
65
+headc37d_procamp(struct nv50_head *head, struct nv50_head_atom *asyh)
66
+{
67
+	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
68
+	const int i = head->base.index;
69
+	int ret;
70
+
71
+	if ((ret = PUSH_WAIT(push, 2)))
72
+		return ret;
73
+
74
+	PUSH_MTHD(push, NVC37D, HEAD_SET_PROCAMP(i),
75
+		  NVDEF(NVC37D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) |
76
+		  NVDEF(NVC37D, HEAD_SET_PROCAMP, CHROMA_LPF, DISABLE) |
77
+		  NVVAL(NVC37D, HEAD_SET_PROCAMP, SAT_COS, asyh->procamp.sat.cos) |
78
+		  NVVAL(NVC37D, HEAD_SET_PROCAMP, SAT_SINE, asyh->procamp.sat.sin) |
79
+		  NVDEF(NVC37D, HEAD_SET_PROCAMP, DYNAMIC_RANGE, VESA) |
80
+		  NVDEF(NVC37D, HEAD_SET_PROCAMP, RANGE_COMPRESSION, DISABLE) |
81
+		  NVDEF(NVC37D, HEAD_SET_PROCAMP, BLACK_LEVEL, GRAPHICS));
82
+	return 0;
83
+}
84
+
85
+int
86
+headc37d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
87
+{
88
+	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
89
+	const int i = head->base.index;
90
+	int ret;
91
+
92
+	if ((ret = PUSH_WAIT(push, 2)))
93
+		return ret;
94
+
95
+	PUSH_MTHD(push, NVC37D, HEAD_SET_DITHER_CONTROL(i),
96
+		  NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) |
97
+		  NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
98
+		  NVDEF(NVC37D, HEAD_SET_DITHER_CONTROL, OFFSET_ENABLE, DISABLE) |
99
+		  NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) |
100
+		  NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, PHASE, 0));
101
+	return 0;
102
+}
103
+
104
+int
105
+headc37d_curs_clr(struct nv50_head *head)
106
+{
107
+	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
108
+	const int i = head->base.index;
109
+	int ret;
110
+
111
+	if ((ret = PUSH_WAIT(push, 4)))
112
+		return ret;
113
+
114
+	PUSH_MTHD(push, NVC37D, HEAD_SET_CONTROL_CURSOR(i),
115
+		  NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) |
116
+		  NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8));
117
+
118
+	PUSH_MTHD(push, NVC37D, HEAD_SET_CONTEXT_DMA_CURSOR(i, 0), 0x00000000);
119
+	return 0;
120
+}
121
+
122
+int
123
+headc37d_curs_set(struct nv50_head *head, struct nv50_head_atom *asyh)
124
+{
125
+	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
126
+	const int i = head->base.index;
127
+	int ret;
128
+
129
+	if ((ret = PUSH_WAIT(push, 7)))
130
+		return ret;
131
+
132
+	PUSH_MTHD(push, NVC37D, HEAD_SET_CONTROL_CURSOR(i),
133
+		  NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) |
134
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |
135
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |
136
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |
137
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) |
138
+		  NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, DE_GAMMA, NONE),
139
+
140
+				HEAD_SET_CONTROL_CURSOR_COMPOSITION(i),
141
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR_COMPOSITION, K1, 0xff) |
142
+		  NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR_COMPOSITION, CURSOR_COLOR_FACTOR_SELECT,
143
+								     K1) |
144
+		  NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR_COMPOSITION, VIEWPORT_COLOR_FACTOR_SELECT,
145
+								     NEG_K1_TIMES_SRC) |
146
+		  NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR_COMPOSITION, MODE, BLEND));
147
+
148
+	PUSH_MTHD(push, NVC37D, HEAD_SET_CONTEXT_DMA_CURSOR(i, 0), asyh->curs.handle);
149
+	PUSH_MTHD(push, NVC37D, HEAD_SET_OFFSET_CURSOR(i, 0), asyh->curs.offset >> 8);
150
+	return 0;
151
+}
152
+
153
+int
116154 headc37d_curs_format(struct nv50_head *head, struct nv50_wndw_atom *asyw,
117155 		     struct nv50_head_atom *asyh)
118156 {
....@@ -120,79 +158,126 @@
120158 	return 0;
121159 }
122160 
123
-static void
161
+static int
124162 headc37d_olut_clr(struct nv50_head *head)
125163 {
126
-	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
127
-	u32 *push;
128
-	if ((push = evo_wait(core, 2))) {
129
-		evo_mthd(push, 0x20ac + (head->base.index * 0x400), 1);
130
-		evo_data(push, 0x00000000);
131
-		evo_kick(push, core);
132
-	}
164
+	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
165
+	const int i = head->base.index;
166
+	int ret;
167
+
168
+	if ((ret = PUSH_WAIT(push, 2)))
169
+		return ret;
170
+
171
+	PUSH_MTHD(push, NVC37D, HEAD_SET_CONTEXT_DMA_OUTPUT_LUT(i), 0x00000000);
172
+	return 0;
133173 }
134174 
135
-static void
175
+static int
136176 headc37d_olut_set(struct nv50_head *head, struct nv50_head_atom *asyh)
137177 {
138
-	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
139
-	u32 *push;
140
-	if ((push = evo_wait(core, 4))) {
141
-		evo_mthd(push, 0x20a4 + (head->base.index * 0x400), 3);
142
-		evo_data(push, asyh->olut.output_mode << 8 |
143
-			       asyh->olut.range << 4 |
144
-			       asyh->olut.size);
145
-		evo_data(push, asyh->olut.offset >> 8);
146
-		evo_data(push, asyh->olut.handle);
147
-		evo_kick(push, core);
148
-	}
178
+	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
179
+	const int i = head->base.index;
180
+	int ret;
181
+
182
+	if ((ret = PUSH_WAIT(push, 4)))
183
+		return ret;
184
+
185
+	PUSH_MTHD(push, NVC37D, HEAD_SET_CONTROL_OUTPUT_LUT(i),
186
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_LUT, SIZE, asyh->olut.size) |
187
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_LUT, RANGE, asyh->olut.range) |
188
+		  NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_LUT, OUTPUT_MODE, asyh->olut.output_mode),
189
+
190
+				HEAD_SET_OFFSET_OUTPUT_LUT(i), asyh->olut.offset >> 8,
191
+				HEAD_SET_CONTEXT_DMA_OUTPUT_LUT(i), asyh->olut.handle);
192
+	return 0;
149193 }
150194 
151
-static void
152
-headc37d_olut(struct nv50_head *head, struct nv50_head_atom *asyh)
195
+static bool
196
+headc37d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size)
153197 {
154
-	asyh->olut.mode = 2;
155
-	asyh->olut.size = 0;
156
-	asyh->olut.range = 0;
157
-	asyh->olut.output_mode = 1;
198
+	if (size != 256 && size != 1024)
199
+		return false;
200
+
201
+	asyh->olut.size = size == 1024 ? NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_SIZE_SIZE_1025 :
202
+					 NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_SIZE_SIZE_257;
203
+	asyh->olut.range = NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_RANGE_UNITY;
204
+	asyh->olut.output_mode = NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_OUTPUT_MODE_INTERPOLATE;
205
+	asyh->olut.load = head907d_olut_load;
206
+	return true;
158207 }
159208 
160
-static void
209
+static int
161210 headc37d_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
162211 {
163
-	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
212
+	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
164213 	struct nv50_head_mode *m = &asyh->mode;
165
-	u32 *push;
166
-	if ((push = evo_wait(core, 12))) {
167
-		evo_mthd(push, 0x2064 + (head->base.index * 0x400), 5);
168
-		evo_data(push, (m->v.active  << 16) | m->h.active );
169
-		evo_data(push, (m->v.synce   << 16) | m->h.synce  );
170
-		evo_data(push, (m->v.blanke  << 16) | m->h.blanke );
171
-		evo_data(push, (m->v.blanks  << 16) | m->h.blanks );
172
-		evo_data(push, (m->v.blank2e << 16) | m->v.blank2s);
173
-		evo_mthd(push, 0x200c + (head->base.index * 0x400), 1);
174
-		evo_data(push, m->clock * 1000);
175
-		evo_mthd(push, 0x2028 + (head->base.index * 0x400), 1);
176
-		evo_data(push, m->clock * 1000);
177
-		/*XXX: HEAD_USAGE_BOUNDS, doesn't belong here. */
178
-		evo_mthd(push, 0x2030 + (head->base.index * 0x400), 1);
179
-		evo_data(push, 0x00000124);
180
-		evo_kick(push, core);
181
-	}
214
+	const int i = head->base.index;
215
+	int ret;
216
+
217
+	if ((ret = PUSH_WAIT(push, 15)))
218
+		return ret;
219
+
220
+	PUSH_MTHD(push, NVC37D, HEAD_SET_RASTER_SIZE(i),
221
+		  NVVAL(NVC37D, HEAD_SET_RASTER_SIZE, WIDTH, m->h.active) |
222
+		  NVVAL(NVC37D, HEAD_SET_RASTER_SIZE, HEIGHT, m->v.active),
223
+
224
+				HEAD_SET_RASTER_SYNC_END(i),
225
+		  NVVAL(NVC37D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) |
226
+		  NVVAL(NVC37D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce),
227
+
228
+				HEAD_SET_RASTER_BLANK_END(i),
229
+		  NVVAL(NVC37D, HEAD_SET_RASTER_BLANK_END, X, m->h.blanke) |
230
+		  NVVAL(NVC37D, HEAD_SET_RASTER_BLANK_END, Y, m->v.blanke),
231
+
232
+				HEAD_SET_RASTER_BLANK_START(i),
233
+		  NVVAL(NVC37D, HEAD_SET_RASTER_BLANK_START, X, m->h.blanks) |
234
+		  NVVAL(NVC37D, HEAD_SET_RASTER_BLANK_START, Y, m->v.blanks));
235
+
236
+	//XXX:
237
+	PUSH_NVSQ(push, NVC37D, 0x2074 + (i * 0x400), m->v.blank2e << 16 | m->v.blank2s);
238
+	PUSH_NVSQ(push, NVC37D, 0x2008 + (i * 0x400), m->interlace);
239
+
240
+	PUSH_MTHD(push, NVC37D, HEAD_SET_PIXEL_CLOCK_FREQUENCY(i),
241
+		  NVVAL(NVC37D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000));
242
+
243
+	PUSH_MTHD(push, NVC37D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(i),
244
+		  NVVAL(NVC37D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000));
245
+
246
+	/*XXX: HEAD_USAGE_BOUNDS, doesn't belong here. */
247
+	PUSH_MTHD(push, NVC37D, HEAD_SET_HEAD_USAGE_BOUNDS(i),
248
+		  NVDEF(NVC37D, HEAD_SET_HEAD_USAGE_BOUNDS, CURSOR, USAGE_W256_H256) |
249
+		  NVDEF(NVC37D, HEAD_SET_HEAD_USAGE_BOUNDS, OUTPUT_LUT, USAGE_1025) |
250
+		  NVDEF(NVC37D, HEAD_SET_HEAD_USAGE_BOUNDS, UPSCALING_ALLOWED, TRUE));
251
+	return 0;
182252 }
183253 
184
-static void
254
+int
185255 headc37d_view(struct nv50_head *head, struct nv50_head_atom *asyh)
186256 {
187
-	struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
188
-	u32 *push;
189
-	if ((push = evo_wait(core, 4))) {
190
-		evo_mthd(push, 0x204c + (head->base.index * 0x400), 1);
191
-		evo_data(push, (asyh->view.iH << 16) | asyh->view.iW);
192
-		evo_mthd(push, 0x2058 + (head->base.index * 0x400), 1);
193
-		evo_data(push, (asyh->view.oH << 16) | asyh->view.oW);
194
-		evo_kick(push, core);
195
-	}
257
+	struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
258
+	const int i = head->base.index;
259
+	int ret;
260
+
261
+	if ((ret = PUSH_WAIT(push, 4)))
262
+		return ret;
263
+
264
+	PUSH_MTHD(push, NVC37D, HEAD_SET_VIEWPORT_SIZE_IN(i),
265
+		  NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_IN, WIDTH, asyh->view.iW) |
266
+		  NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_IN, HEIGHT, asyh->view.iH));
267
+
268
+	PUSH_MTHD(push, NVC37D, HEAD_SET_VIEWPORT_SIZE_OUT(i),
269
+		  NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_OUT, WIDTH, asyh->view.oW) |
270
+		  NVVAL(NVC37D, HEAD_SET_VIEWPORT_SIZE_OUT, HEIGHT, asyh->view.oH));
271
+	return 0;
272
+}
273
+
274
+void
275
+headc37d_static_wndw_map(struct nv50_head *head, struct nv50_head_atom *asyh)
276
+{
277
+	int i, end;
278
+
279
+	for (i = head->base.index * 2, end = i + 2; i < end; i++)
280
+		asyh->wndw.owned |= BIT(i);
196281 }
197282 
198283 const struct nv50_head_func
....@@ -200,6 +285,7 @@
200285 	.view = headc37d_view,
201286 	.mode = headc37d_mode,
202287 	.olut = headc37d_olut,
288
+	.olut_size = 1024,
203289 	.olut_set = headc37d_olut_set,
204290 	.olut_clr = headc37d_olut_clr,
205291 	.curs_layout = head917d_curs_layout,
....@@ -209,4 +295,5 @@
209295 	.dither = headc37d_dither,
210296 	.procamp = headc37d_procamp,
211297 	.or = headc37d_or,
298
+	.static_wndw_map = headc37d_static_wndw_map,
212299 };