update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
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@@ -1,13 +1,5 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 and
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- * only version 2 as published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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  */
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 #ifndef _DPU_HW_INTF_H
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@@ -59,9 +51,9 @@
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  * @ setup_prog_fetch : enables/disables the programmable fetch logic
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  * @ enable_timing: enable/disable timing engine
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  * @ get_status: returns if timing engine is enabled or not
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- * @ setup_misr: enables/disables MISR in HW register
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- * @ collect_misr: reads and stores MISR data from HW register
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  * @ get_line_count: reads current vertical line counter
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+ * @bind_pingpong_blk: enable/disable the connection with pingpong which will
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+ *                     feed pixels to this interface
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  */
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 struct dpu_hw_intf_ops {
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 	void (*setup_timing_gen)(struct dpu_hw_intf *intf,
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@@ -77,12 +69,11 @@
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 	void (*get_status)(struct dpu_hw_intf *intf,
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 			struct intf_status *status);
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-	void (*setup_misr)(struct dpu_hw_intf *intf,
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-			bool enable, u32 frame_count);
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-
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-	u32 (*collect_misr)(struct dpu_hw_intf *intf);
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-
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 	u32 (*get_line_count)(struct dpu_hw_intf *intf);
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+
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+	void (*bind_pingpong_blk)(struct dpu_hw_intf *intf,
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+			bool enable,
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+			const enum dpu_pingpong pp);
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 };
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 struct dpu_hw_intf {
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@@ -117,7 +108,7 @@
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  */
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 struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
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 		void __iomem *addr,
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-		struct dpu_mdss_cfg *m);
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+		const struct dpu_mdss_cfg *m);
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 /**
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  * dpu_hw_intf_destroy(): Destroys INTF driver context