~hc/RK356X_SDK_RELEASE.git

..	..	@@ -36,7 +36,7 @@
36	36	OUT_RING(ring, upper_32_bits(shadowptr(a5xx_gpu, ring)));
37	37	}
38	38
39		- spin_lock_irqsave(&ring->lock, flags);
	39	+ spin_lock_irqsave(&ring->preempt_lock, flags);
40	40
41	41	/* Copy the shadow to the actual register */
42	42	ring->cur = ring->next;
..	..	@@ -44,7 +44,7 @@
44	44	/* Make sure to wrap wptr if we need to */
45	45	wptr = get_wptr(ring);
46	46
47		- spin_unlock_irqrestore(&ring->lock, flags);
	47	+ spin_unlock_irqrestore(&ring->preempt_lock, flags);
48	48
49	49	/* Make sure everything is posted before making a decision */
50	50	mb();
..	..	@@ -81,7 +81,7 @@
81	81	* since we've already mapped it once in
82	82	* submit_reloc()
83	83	*/
84		- if (WARN_ON(!ptr))
	84	+ if (WARN_ON(IS_ERR_OR_NULL(ptr)))
85	85	return;
86	86
87	87	for (i = 0; i < dwords; i++) {
..	..	@@ -144,8 +144,8 @@
144	144	OUT_RING(ring, 1);
145	145
146	146	/* Enable local preemption for finegrain preemption */
147		- OUT_PKT7(ring, CP_PREEMPT_ENABLE_GLOBAL, 1);
148		- OUT_RING(ring, 0x02);
	147	+ OUT_PKT7(ring, CP_PREEMPT_ENABLE_LOCAL, 1);
	148	+ OUT_RING(ring, 0x1);
149	149
150	150	/* Allow CP_CONTEXT_SWITCH_YIELD packets in the IB2 */
151	151	OUT_PKT7(ring, CP_YIELD_ENABLE, 1);
..	..	@@ -1569,6 +1569,7 @@
1569	1569	struct a5xx_gpu *a5xx_gpu = NULL;
1570	1570	struct adreno_gpu *adreno_gpu;
1571	1571	struct msm_gpu *gpu;
	1572	+ unsigned int nr_rings;
1572	1573	int ret;
1573	1574
1574	1575	if (!pdev) {
..	..	@@ -1589,7 +1590,12 @@
1589	1590
1590	1591	check_speed_bin(&pdev->dev);
1591	1592
1592		- ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 4);
	1593	+ nr_rings = 4;
	1594	+
	1595	+ if (adreno_is_a510(adreno_gpu))
	1596	+ nr_rings = 1;
	1597	+
	1598	+ ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, nr_rings);
1593	1599	if (ret) {
1594	1600	a5xx_destroy(&(a5xx_gpu->base.base));
1595	1601	return ERR_PTR(ret);