hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/gpu/drm/bridge/lontium-lt9611.c
....@@ -185,12 +185,14 @@
185185
186186 regmap_write(lt9611->regmap, 0x8319, (u8)(hfront_porch % 256));
187187
188
- regmap_write(lt9611->regmap, 0x831a, (u8)(hsync_porch / 256));
188
+ regmap_write(lt9611->regmap, 0x831a, (u8)(hsync_porch / 256) |
189
+ ((hfront_porch / 256) << 4));
189190 regmap_write(lt9611->regmap, 0x831b, (u8)(hsync_porch % 256));
190191 }
191192
192
-static void lt9611_pcr_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode)
193
+static void lt9611_pcr_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode, unsigned int postdiv)
193194 {
195
+ unsigned int pcr_m = mode->clock * 5 * postdiv / 27000;
194196 const struct reg_sequence reg_cfg[] = {
195197 { 0x830b, 0x01 },
196198 { 0x830c, 0x10 },
....@@ -205,7 +207,6 @@
205207
206208 /* stage 2 */
207209 { 0x834a, 0x40 },
208
- { 0x831d, 0x10 },
209210
210211 /* MK limit */
211212 { 0x832d, 0x38 },
....@@ -220,30 +221,28 @@
220221 { 0x8325, 0x00 },
221222 { 0x832a, 0x01 },
222223 { 0x834a, 0x10 },
223
- { 0x831d, 0x10 },
224
- { 0x8326, 0x37 },
225224 };
225
+ u8 pol = 0x10;
226226
227
- regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
227
+ if (mode->flags & DRM_MODE_FLAG_NHSYNC)
228
+ pol |= 0x2;
229
+ if (mode->flags & DRM_MODE_FLAG_NVSYNC)
230
+ pol |= 0x1;
231
+ regmap_write(lt9611->regmap, 0x831d, pol);
228232
229
- switch (mode->hdisplay) {
230
- case 640:
231
- regmap_write(lt9611->regmap, 0x8326, 0x14);
232
- break;
233
- case 1920:
234
- regmap_write(lt9611->regmap, 0x8326, 0x37);
235
- break;
236
- case 3840:
233
+ if (mode->hdisplay == 3840)
237234 regmap_multi_reg_write(lt9611->regmap, reg_cfg2, ARRAY_SIZE(reg_cfg2));
238
- break;
239
- }
235
+ else
236
+ regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
237
+
238
+ regmap_write(lt9611->regmap, 0x8326, pcr_m);
240239
241240 /* pcr rst */
242241 regmap_write(lt9611->regmap, 0x8011, 0x5a);
243242 regmap_write(lt9611->regmap, 0x8011, 0xfa);
244243 }
245244
246
-static int lt9611_pll_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode)
245
+static int lt9611_pll_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode, unsigned int *postdiv)
247246 {
248247 unsigned int pclk = mode->clock;
249248 const struct reg_sequence reg_cfg[] = {
....@@ -257,16 +256,21 @@
257256 { 0x8126, 0x55 },
258257 { 0x8127, 0x66 },
259258 { 0x8128, 0x88 },
259
+ { 0x812a, 0x20 },
260260 };
261261
262262 regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
263263
264
- if (pclk > 150000)
264
+ if (pclk > 150000) {
265265 regmap_write(lt9611->regmap, 0x812d, 0x88);
266
- else if (pclk > 70000)
266
+ *postdiv = 1;
267
+ } else if (pclk > 70000) {
267268 regmap_write(lt9611->regmap, 0x812d, 0x99);
268
- else
269
+ *postdiv = 2;
270
+ } else {
269271 regmap_write(lt9611->regmap, 0x812d, 0xaa);
272
+ *postdiv = 4;
273
+ }
270274
271275 /*
272276 * first divide pclk by 2 first
....@@ -446,12 +450,11 @@
446450 { 0x8023, 0x01 },
447451 { 0x8157, 0x03 }, /* set addr pin as output */
448452 { 0x8149, 0x0b },
449
- { 0x8151, 0x30 }, /* disable IRQ */
453
+
450454 { 0x8102, 0x48 }, /* MIPI Rx power down */
451455 { 0x8123, 0x80 },
452456 { 0x8130, 0x00 },
453
- { 0x8100, 0x01 }, /* bandgap power down */
454
- { 0x8101, 0x00 }, /* system clk power down */
457
+ { 0x8011, 0x0a },
455458 };
456459
457460 regmap_multi_reg_write(lt9611->regmap,
....@@ -757,7 +760,7 @@
757760 static struct mipi_dsi_device *lt9611_attach_dsi(struct lt9611 *lt9611,
758761 struct device_node *dsi_node)
759762 {
760
- const struct mipi_dsi_device_info info = { "lt9611", 0, NULL };
763
+ const struct mipi_dsi_device_info info = { "lt9611", 0, lt9611->dev->of_node};
761764 struct mipi_dsi_device *dsi;
762765 struct mipi_dsi_host *host;
763766 int ret;
....@@ -881,12 +884,18 @@
881884 static void lt9611_bridge_pre_enable(struct drm_bridge *bridge)
882885 {
883886 struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
887
+ static const struct reg_sequence reg_cfg[] = {
888
+ { 0x8102, 0x12 },
889
+ { 0x8123, 0x40 },
890
+ { 0x8130, 0xea },
891
+ { 0x8011, 0xfa },
892
+ };
884893
885894 if (!lt9611->sleep)
886895 return;
887896
888
- lt9611_reset(lt9611);
889
- regmap_write(lt9611->regmap, 0x80ee, 0x01);
897
+ regmap_multi_reg_write(lt9611->regmap,
898
+ reg_cfg, ARRAY_SIZE(reg_cfg));
890899
891900 lt9611->sleep = false;
892901 }
....@@ -904,14 +913,15 @@
904913 {
905914 struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
906915 struct hdmi_avi_infoframe avi_frame;
916
+ unsigned int postdiv;
907917 int ret;
908918
909919 lt9611_bridge_pre_enable(bridge);
910920
911921 lt9611_mipi_input_digital(lt9611, mode);
912
- lt9611_pll_setup(lt9611, mode);
922
+ lt9611_pll_setup(lt9611, mode, &postdiv);
913923 lt9611_mipi_video_setup(lt9611, mode);
914
- lt9611_pcr_setup(lt9611, mode);
924
+ lt9611_pcr_setup(lt9611, mode, postdiv);
915925
916926 ret = drm_hdmi_avi_infoframe_from_display_mode(&avi_frame,
917927 &lt9611->connector,