hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.h
....@@ -41,7 +41,7 @@
4141 // See also: <display_rq_regs_st>
4242 void dml30_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib,
4343 display_rq_regs_st *rq_regs,
44
- const display_pipe_params_st pipe_param);
44
+ const display_pipe_params_st *pipe_param);
4545
4646 // Function: dml_rq_dlg_get_dlg_reg
4747 // Calculate and return DLG and TTU register struct given the system setting
....@@ -57,7 +57,7 @@
5757 void dml30_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
5858 display_dlg_regs_st *dlg_regs,
5959 display_ttu_regs_st *ttu_regs,
60
- display_e2e_pipe_params_st *e2e_pipe_param,
60
+ const display_e2e_pipe_params_st *e2e_pipe_param,
6161 const unsigned int num_pipes,
6262 const unsigned int pipe_idx,
6363 const bool cstate_en,