update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
..
..
@@ -694,7 +694,7 @@
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 		display_data_rq_sizing_params_st *rq_sizing_param,
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 		display_data_rq_dlg_params_st *rq_dlg_param,
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 		display_data_rq_misc_params_st *rq_misc_param,
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-		const display_pipe_params_st pipe_param,
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+		const display_pipe_params_st *pipe_param,
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 		bool is_chroma)
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 {
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 	bool mode_422 = false;
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@@ -706,30 +706,30 @@
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 	// FIXME check if ppe apply for both luma and chroma in 422 case
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 	if (is_chroma) {
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-		vp_width = pipe_param.src.viewport_width_c / ppe;
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-		vp_height = pipe_param.src.viewport_height_c;
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-		data_pitch = pipe_param.src.data_pitch_c;
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-		meta_pitch = pipe_param.src.meta_pitch_c;
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+		vp_width = pipe_param->src.viewport_width_c / ppe;
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+		vp_height = pipe_param->src.viewport_height_c;
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+		data_pitch = pipe_param->src.data_pitch_c;
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+		meta_pitch = pipe_param->src.meta_pitch_c;
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 	} else {
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-		vp_width = pipe_param.src.viewport_width / ppe;
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-		vp_height = pipe_param.src.viewport_height;
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-		data_pitch = pipe_param.src.data_pitch;
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-		meta_pitch = pipe_param.src.meta_pitch;
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+		vp_width = pipe_param->src.viewport_width / ppe;
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+		vp_height = pipe_param->src.viewport_height;
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+		data_pitch = pipe_param->src.data_pitch;
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+		meta_pitch = pipe_param->src.meta_pitch;
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 	}
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-	if (pipe_param.dest.odm_combine) {
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+	if (pipe_param->dest.odm_combine) {
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 		unsigned int access_dir;
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 		unsigned int full_src_vp_width;
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 		unsigned int hactive_half;
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 		unsigned int src_hactive_half;
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-		access_dir = (pipe_param.src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
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-		hactive_half  = pipe_param.dest.hactive / 2;
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+		access_dir = (pipe_param->src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
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+		hactive_half  = pipe_param->dest.hactive / 2;
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 		if (is_chroma) {
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-			full_src_vp_width = pipe_param.scale_ratio_depth.hscl_ratio_c * pipe_param.dest.full_recout_width;
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-			src_hactive_half  = pipe_param.scale_ratio_depth.hscl_ratio_c * hactive_half;
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+			full_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio_c * pipe_param->dest.full_recout_width;
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+			src_hactive_half  = pipe_param->scale_ratio_depth.hscl_ratio_c * hactive_half;
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 		} else {
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-			full_src_vp_width = pipe_param.scale_ratio_depth.hscl_ratio * pipe_param.dest.full_recout_width;
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-			src_hactive_half  = pipe_param.scale_ratio_depth.hscl_ratio * hactive_half;
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+			full_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio * pipe_param->dest.full_recout_width;
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+			src_hactive_half  = pipe_param->scale_ratio_depth.hscl_ratio * hactive_half;
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 		}
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 		if (access_dir == 0) {
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@@ -754,7 +754,7 @@
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 	rq_sizing_param->meta_chunk_bytes = 2048;
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 	rq_sizing_param->min_meta_chunk_bytes = 256;
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-	if (pipe_param.src.hostvm)
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+	if (pipe_param->src.hostvm)
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 		rq_sizing_param->mpte_group_bytes = 512;
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 	else
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 		rq_sizing_param->mpte_group_bytes = 2048;
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@@ -768,23 +768,23 @@
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 			vp_height,
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 			data_pitch,
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 			meta_pitch,
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-			pipe_param.src.source_format,
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-			pipe_param.src.sw_mode,
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-			pipe_param.src.macro_tile_size,
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-			pipe_param.src.source_scan,
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-			pipe_param.src.hostvm,
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+			pipe_param->src.source_format,
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+			pipe_param->src.sw_mode,
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+			pipe_param->src.macro_tile_size,
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+			pipe_param->src.source_scan,
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+			pipe_param->src.hostvm,
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 			is_chroma);
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 }
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 static void dml_rq_dlg_get_rq_params(
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 		struct display_mode_lib *mode_lib,
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 		display_rq_params_st *rq_param,
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-		const display_pipe_params_st pipe_param)
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+		const display_pipe_params_st *pipe_param)
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 {
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 	// get param for luma surface
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-	rq_param->yuv420 = pipe_param.src.source_format == dm_420_8
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-			|| pipe_param.src.source_format == dm_420_10;
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-	rq_param->yuv420_10bpc = pipe_param.src.source_format == dm_420_10;
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+	rq_param->yuv420 = pipe_param->src.source_format == dm_420_8
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+			|| pipe_param->src.source_format == dm_420_10;
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+	rq_param->yuv420_10bpc = pipe_param->src.source_format == dm_420_10;
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 	get_surf_rq_param(
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 			mode_lib,
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@@ -794,7 +794,7 @@
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 			pipe_param,
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 			0);
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-	if (is_dual_plane((enum source_format_class) (pipe_param.src.source_format))) {
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+	if (is_dual_plane((enum source_format_class) (pipe_param->src.source_format))) {
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 		// get param for chroma surface
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 		get_surf_rq_param(
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 				mode_lib,
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@@ -806,14 +806,14 @@
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 	}
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 	// calculate how to split the det buffer space between luma and chroma
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-	handle_det_buf_split(mode_lib, rq_param, pipe_param.src);
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+	handle_det_buf_split(mode_lib, rq_param, pipe_param->src);
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 	print__rq_params_st(mode_lib, *rq_param);
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 }
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 void dml21_rq_dlg_get_rq_reg(
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 		struct display_mode_lib *mode_lib,
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 		display_rq_regs_st *rq_regs,
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-		const display_pipe_params_st pipe_param)
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+		const display_pipe_params_st *pipe_param)
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 {
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 	display_rq_params_st rq_param = {0};
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@@ -1658,7 +1658,7 @@
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 		struct display_mode_lib *mode_lib,
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 		display_dlg_regs_st *dlg_regs,
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 		display_ttu_regs_st *ttu_regs,
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-		display_e2e_pipe_params_st *e2e_pipe_param,
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+		const display_e2e_pipe_params_st *e2e_pipe_param,
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 		const unsigned int num_pipes,
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 		const unsigned int pipe_idx,
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 		const bool cstate_en,
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@@ -1696,7 +1696,7 @@
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 	// system parameter calculation done
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 	dml_print("DML_DLG: Calculation for pipe[%d] start\n\n", pipe_idx);
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-	dml_rq_dlg_get_rq_params(mode_lib, &rq_param, e2e_pipe_param[pipe_idx].pipe);
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+	dml_rq_dlg_get_rq_params(mode_lib, &rq_param, &e2e_pipe_param[pipe_idx].pipe);
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 	dml_rq_dlg_get_dlg_params(
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 			mode_lib,
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 			e2e_pipe_param,