hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
....@@ -3897,14 +3897,14 @@
38973897 mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine = mode_lib->vba.PixelClock[k] / 2
38983898 * (1 + mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading / 100.0);
38993899
3900
- locals->ODMCombineEnablePerState[i][k] = false;
3900
+ locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled;
39013901 mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithoutODMCombine;
39023902 if (mode_lib->vba.ODMCapability) {
39033903 if (locals->PlaneRequiredDISPCLKWithoutODMCombine > mode_lib->vba.MaxDispclkRoundedDownToDFSGranularity) {
3904
- locals->ODMCombineEnablePerState[i][k] = true;
3904
+ locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1;
39053905 mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine;
39063906 } else if (locals->HActive[k] > DCN20_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) {
3907
- locals->ODMCombineEnablePerState[i][k] = true;
3907
+ locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1;
39083908 mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine;
39093909 }
39103910 }
....@@ -3957,7 +3957,7 @@
39573957 locals->RequiredDISPCLK[i][j] = 0.0;
39583958 locals->DISPCLK_DPPCLK_Support[i][j] = true;
39593959 for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) {
3960
- locals->ODMCombineEnablePerState[i][k] = false;
3960
+ locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled;
39613961 if (locals->SwathWidthYSingleDPP[k] <= locals->MaximumSwathWidth[k]) {
39623962 locals->NoOfDPP[i][j][k] = 1;
39633963 locals->RequiredDPPCLK[i][j][k] = locals->MinDPPCLKUsingSingleDPP[k]